drm/amd/display: Use sync version of indirect register access.[Why]Access to indirect registers by DC and other components are not synchronized.[How]Use sync version of indirect register access
drm/amd/display: Use sync version of indirect register access.[Why]Access to indirect registers by DC and other components are not synchronized.[How]Use sync version of indirect register access.Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>Signed-off-by: JinZe.Xu <JinZe.Xu@amd.com>Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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drm/amd/display: Guard against setting dispclk low for dcn31x[WHY]We should never apply a minimum dispclk value while inprepare_bandwidth or while displays are active. This isalways an optimizai
drm/amd/display: Guard against setting dispclk low for dcn31x[WHY]We should never apply a minimum dispclk value while inprepare_bandwidth or while displays are active. This isalways an optimizaiton for when all displays are disabled.[HOW]Defer dispclk optimization until safe_to_lower = trueand display_count reaches 0.Since 0 has a special value in this logic (ie. no dispclkrequired) we also need adjust the logic that clamps it forthe actual request to PMFW.Reviewed-by: Charlene Liu <charlene.liu@amd.com>Reviewed-by: Chris Park <chris.park@amd.com>Reviewed-by: Eric Yang <eric.yang@amd.com>Signed-off-by: Jing Zhou <Jing.Zhou@amd.com>Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>Signed-off-by: Alex Hung <alex.hung@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: remove minimum Dispclk and apply oem panel timing.[why & how]1. apply oem panel timing (not only on OLED)2. remove MIN_DPP_DISP_CLK request in driver.This fix will apply for dc
drm/amd/display: remove minimum Dispclk and apply oem panel timing.[why & how]1. apply oem panel timing (not only on OLED)2. remove MIN_DPP_DISP_CLK request in driver.This fix will apply for dcn31x but notsync with DML's output.Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Remove redundant checks for ctx->dc_biosThe null checks for ctx->dc_bios are redundant as it was alreadydereferenced previously, as reported by Coverity; therefore thenull checks
drm/amd/display: Remove redundant checks for ctx->dc_biosThe null checks for ctx->dc_bios are redundant as it was alreadydereferenced previously, as reported by Coverity; therefore thenull checks are removed.This fixes 7 REVERSE_INULL issues reported by Coverity.Reviewed-by: Harry Wentland <harry.wentland@amd.com>Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>Signed-off-by: Alex Hung <alex.hung@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add dtbclk access to dcn315[Why & How]Currently DCN315 clk manager is missing code to enable/disable dtbclk.Because of this, "optimized_required" flag is constantly setand this
drm/amd/display: Add dtbclk access to dcn315[Why & How]Currently DCN315 clk manager is missing code to enable/disable dtbclk.Because of this, "optimized_required" flag is constantly setand this prevents FreeSync from engaging for certain high bandwidthdisplay Modes which require DTBCLK.Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>Signed-off-by: Swapnil Patel <swapnil.patel@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Adjust some includes used by displaySome of the includes used in the DC can be removed and others need to beupdate. This commit adjusts some of those headers in the display code.
drm/amd/display: Adjust some includes used by displaySome of the includes used in the DC can be removed and others need to beupdate. This commit adjusts some of those headers in the display code.Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Drop legacy codeDisplay code keeps getting improvements, and because of that, somelegacy code is left behind. This commit drops some of those unusedcodes.Acked-by: Hamza Mahfoo
drm/amd/display: Drop legacy codeDisplay code keeps getting improvements, and because of that, somelegacy code is left behind. This commit drops some of those unusedcodes.Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Wake DMCUB before sending a command[Why]We can hang in place trying to send commands when the DMCUB isn'tpowered on.[How]For functions that execute within a DC context or DC l
drm/amd/display: Wake DMCUB before sending a command[Why]We can hang in place trying to send commands when the DMCUB isn'tpowered on.[How]For functions that execute within a DC context or DC lock we canwrap the direct calls to dm_execute_dmub_cmd/list with code thatexits idle power optimizations and reallows once we're done withthe command submission on success.For DM direct submissions the DM will need to manage the enter/exitsequencing manually.We cannot invoke a DMCUB command directly within the DM executionhelper or we can deadlock.Cc: Mario Limonciello <mario.limonciello@amd.com>Cc: Alex Deucher <alexander.deucher@amd.com>Cc: stable@vger.kernel.orgReviewed-by: Hansen Dsouza <hansen.dsouza@amd.com>Acked-by: Wayne Lin <wayne.lin@amd.com>Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: update dcn315 lpddr pstate latency[WHY/HOW]Increase the pstate latency to improve ac/dc transitionReviewed-by: Charlene Liu <charlene.liu@amd.com>Acked-by: Tom Chung <chiahsuan
drm/amd/display: update dcn315 lpddr pstate latency[WHY/HOW]Increase the pstate latency to improve ac/dc transitionReviewed-by: Charlene Liu <charlene.liu@amd.com>Acked-by: Tom Chung <chiahsuan.chung@amd.com>Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add smu write msg id fail retry processA benchmark stress test (12-40 machines x 48hours) found that DCN315 hascases where DC writes to an indirect register to set the smu clock m
drm/amd/display: Add smu write msg id fail retry processA benchmark stress test (12-40 machines x 48hours) found that DCN315 hascases where DC writes to an indirect register to set the smu clock msgid, but when we go to read the same indirect register the returned msgid doesn't match with what we just set it to. So, to fix this retry thewrite until the register's value matches with the requested value.Cc: stable@vger.kernel.org # 6.1+Fixes: f94903996140 ("drm/amd/display: Add DCN315 CLK_MGR")Reviewed-by: Charlene Liu <charlene.liu@amd.com>Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>Signed-off-by: Fudong Wang <fudong.wang@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Clean up errors in dcn315_smu.cFix the following errors reported by checkpatch:ERROR: open brace '{' following struct go on the same lineERROR: code indent should use tabs where
drm/amd/display: Clean up errors in dcn315_smu.cFix the following errors reported by checkpatch:ERROR: open brace '{' following struct go on the same lineERROR: code indent should use tabs where possibleSigned-off-by: Ran Sun <sunran001@208suo.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Clean FPGA code in dc[Why]Drop dead code for Linux.[How]Remove all IS_FPGA_MAXIMUS_DC and IS_DIAG_DCReviewed-by: Ariel Bernstein <eric.bernstein@amd.com>Acked-by: Tom Chung
drm/amd/display: Clean FPGA code in dc[Why]Drop dead code for Linux.[How]Remove all IS_FPGA_MAXIMUS_DC and IS_DIAG_DCReviewed-by: Ariel Bernstein <eric.bernstein@amd.com>Acked-by: Tom Chung <chiahsuan.chung@amd.com>Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: refactor dmub commands into single function[Why & How]Consolidate dmub access to a single interface. This makes it easier toadd code in the future that needs to run every time a
drm/amd/display: refactor dmub commands into single function[Why & How]Consolidate dmub access to a single interface. This makes it easier toadd code in the future that needs to run every time a dmub command isrequested (e.g. instrumentation, locking etc).Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: w/a for dcn315 inconsistent smu clock table[Why & How]w/a for dcn315 inconsistent smu clock.Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>Acked-by: Qingqing Zhu
drm/amd/display: w/a for dcn315 inconsistent smu clock table[Why & How]w/a for dcn315 inconsistent smu clock.Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: set should_disable_otg storage-class-specifier to staticsmatch reportsdrivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c:90:6: warning: symbol 'should_disa
drm/amd/display: set should_disable_otg storage-class-specifier to staticsmatch reportsdrivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c:90:6: warning: symbol 'should_disable_otg' was not declared. Should it be static?should_disable_otg() is only used in dcn315_clk_mgr.c, so it should be staticSigned-off-by: Tom Rix <trix@redhat.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: avoid disable otg when dig was disabled[Why]This is a workaround for an dcn3.15 hangthat happens if otg dispclk is ramped whileotg is on and stream enc is off. But thisw/a shou
drm/amd/display: avoid disable otg when dig was disabled[Why]This is a workaround for an dcn3.15 hangthat happens if otg dispclk is ramped whileotg is on and stream enc is off. But thisw/a should not trigger when we have a dig active.[How]Avoid disable otg when dig was disabled.[Note]Reapplying commit b07bb766b6d5 ("drm/amd/display: avoid disable otg when dig was disabled")which was incorrectly reverted.Reviewed-by: Josip Pavic <Josip.Pavic@amd.com>Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>Signed-off-by: Jingwen Zhu <Jingwen.Zhu@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Revert "avoid disable otg when dig was disabled"This reverts commit 7cf5ceb30d4d527d763ae78c5405e3faca1fb8b1.Acked-by: Alex Hung <alex.hung@amd.com>Signed-off-by: Aric Cyr <aric
drm/amd/display: Revert "avoid disable otg when dig was disabled"This reverts commit 7cf5ceb30d4d527d763ae78c5405e3faca1fb8b1.Acked-by: Alex Hung <alex.hung@amd.com>Signed-off-by: Aric Cyr <aric.cyr@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: avoid disable otg when dig was disabled[Why]This is a workaround for an dcn3.1 hang that happens if otg dispclkis ramped while otg is on and stream enc is off.But this w/a shoul
drm/amd/display: avoid disable otg when dig was disabled[Why]This is a workaround for an dcn3.1 hang that happens if otg dispclkis ramped while otg is on and stream enc is off.But this w/a should not trigger when we have a dig active.[How]Avoid disable otg when dig was disabled.Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>Acked-by: Alan Liu <HaoPing.Liu@amd.com>Signed-off-by: Jingwen Zhu <Jingwen.Zhu@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: merge dc_link_dp into dc_link[why]Temporarly merge dc_link_dp functions into dc_link for thepurpose of removing dc_link_dp files. This is a transitionalchange for later commits
drm/amd/display: merge dc_link_dp into dc_link[why]Temporarly merge dc_link_dp functions into dc_link for thepurpose of removing dc_link_dp files. This is a transitionalchange for later commits where we will further refactor dc_linkfile.Reviewed-by: George Shen <George.Shen@amd.com>Acked-by: Alan Liu <HaoPing.Liu@amd.com>Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: correctly populate dcn315 clock tableFix incorrect pstate read order as well as min and max state logic.Tested-by: Mark Broadworth <mark.broadworth@amd.com>Reviewed-by: Charlene
drm/amd/display: correctly populate dcn315 clock tableFix incorrect pstate read order as well as min and max state logic.Tested-by: Mark Broadworth <mark.broadworth@amd.com>Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: increase dcn315 pstate change latency[Why & How]Update after new measurment came inReviewed-by: Jun Lei <Jun.Lei@amd.com>Acked-by: Wayne Lin <wayne.lin@amd.com>Signed-off-by:
drm/amd/display: increase dcn315 pstate change latency[Why & How]Update after new measurment came inReviewed-by: Jun Lei <Jun.Lei@amd.com>Acked-by: Wayne Lin <wayne.lin@amd.com>Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Display distortion after hotplug 5K tiled display[Why]During hot plug of specific 5K tiled display, sometimes both the tilesare not synchronized resulting in distortion. The reas
drm/amd/display: Display distortion after hotplug 5K tiled display[Why]During hot plug of specific 5K tiled display, sometimes both the tilesare not synchronized resulting in distortion. The reason is that otgs ofboth the tiles goes out of sync when otg workaround (dcnxxx_disable_otg_wa)is applied for bandwidth optimization. The otg workaround reenables otgbut otg synchronization context is not reset and hence dc_trigger_sync()does not resynchronize otg again.[How]Implement reset_sync_context_for_pipe() to reset the otg synchronizationcontext for the disabled pipe and its slave pipes when otg workaround isapplied.Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>Acked-by: Wayne Lin <wayne.lin@amd.com>Signed-off-by: Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: fix dcn315 memory channel count and width read[Why & How]Correctly set ddr5 channel width to 8 bytesReviewed-by: Jun Lei <Jun.Lei@amd.com>Acked-by: Wayne Lin <wayne.lin@amd.com
drm/amd/display: fix dcn315 memory channel count and width read[Why & How]Correctly set ddr5 channel width to 8 bytesReviewed-by: Jun Lei <Jun.Lei@amd.com>Acked-by: Wayne Lin <wayne.lin@amd.com>Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Adding log clock table from SMU[Why & How]Adding log for clock table from SMU helps with the debugging process.Implemented using DC_LOG_SMU to output log.Reviewed-by: Charlene
drm/amd/display: Adding log clock table from SMU[Why & How]Adding log for clock table from SMU helps with the debugging process.Implemented using DC_LOG_SMU to output log.Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>Acked-by: Brian Chang <Brian.Chang@amd.com>Signed-off-by: Leo Chen <sancchen@amd.com>Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Unneeded semicolonThere is no semicolon after '}' in line 510.Signed-off-by: min tang <tangmin@cdjrlc.com>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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