stm32_spdifrx.c (1913c7f3fc2514e09262baf2267a82dfdb215c39) | stm32_spdifrx.c (0c93c291321f2ba8dc4cd3d4df74801caaa297db) |
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1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * STM32 ALSA SoC Digital Audio Interface (SPDIF-rx) driver. 4 * 5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved 6 * Author(s): Olivier Moysan <olivier.moysan@st.com> for STMicroelectronics. 7 */ 8 --- 337 unchanged lines hidden (view full) --- 346 * to issue sync errors when spdif signal is missing on input. 347 * Preamble, CS, user, validity and parity error bits not copied 348 * to DR register. 349 */ 350 cr = SPDIFRX_CR_WFA | SPDIFRX_CR_PMSK | SPDIFRX_CR_VMSK | 351 SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK | SPDIFRX_CR_RXSTEO; 352 cr_mask = cr; 353 | 1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * STM32 ALSA SoC Digital Audio Interface (SPDIF-rx) driver. 4 * 5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved 6 * Author(s): Olivier Moysan <olivier.moysan@st.com> for STMicroelectronics. 7 */ 8 --- 337 unchanged lines hidden (view full) --- 346 * to issue sync errors when spdif signal is missing on input. 347 * Preamble, CS, user, validity and parity error bits not copied 348 * to DR register. 349 */ 350 cr = SPDIFRX_CR_WFA | SPDIFRX_CR_PMSK | SPDIFRX_CR_VMSK | 351 SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK | SPDIFRX_CR_RXSTEO; 352 cr_mask = cr; 353 |
354 cr |= SPDIFRX_CR_NBTRSET(SPDIFRX_NBTR_63); 355 cr_mask |= SPDIFRX_CR_NBTR_MASK; |
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354 cr |= SPDIFRX_CR_SPDIFENSET(SPDIFRX_SPDIFEN_SYNC); 355 cr_mask |= SPDIFRX_CR_SPDIFEN_MASK; 356 ret = regmap_update_bits(spdifrx->regmap, STM32_SPDIFRX_CR, 357 cr_mask, cr); 358 if (ret < 0) 359 dev_err(&spdifrx->pdev->dev, 360 "Failed to start synchronization\n"); 361 } --- 299 unchanged lines hidden (view full) --- 661}; 662 663static irqreturn_t stm32_spdifrx_isr(int irq, void *devid) 664{ 665 struct stm32_spdifrx_data *spdifrx = (struct stm32_spdifrx_data *)devid; 666 struct snd_pcm_substream *substream = spdifrx->substream; 667 struct platform_device *pdev = spdifrx->pdev; 668 unsigned int cr, mask, sr, imr; | 356 cr |= SPDIFRX_CR_SPDIFENSET(SPDIFRX_SPDIFEN_SYNC); 357 cr_mask |= SPDIFRX_CR_SPDIFEN_MASK; 358 ret = regmap_update_bits(spdifrx->regmap, STM32_SPDIFRX_CR, 359 cr_mask, cr); 360 if (ret < 0) 361 dev_err(&spdifrx->pdev->dev, 362 "Failed to start synchronization\n"); 363 } --- 299 unchanged lines hidden (view full) --- 663}; 664 665static irqreturn_t stm32_spdifrx_isr(int irq, void *devid) 666{ 667 struct stm32_spdifrx_data *spdifrx = (struct stm32_spdifrx_data *)devid; 668 struct snd_pcm_substream *substream = spdifrx->substream; 669 struct platform_device *pdev = spdifrx->pdev; 670 unsigned int cr, mask, sr, imr; |
669 unsigned int flags; | 671 unsigned int flags, sync_state; |
670 int err = 0, err_xrun = 0; 671 672 regmap_read(spdifrx->regmap, STM32_SPDIFRX_SR, &sr); 673 regmap_read(spdifrx->regmap, STM32_SPDIFRX_IMR, &imr); 674 675 mask = imr & SPDIFRX_XIMR_MASK; 676 /* SERR, TERR, FERR IRQs are generated if IFEIE is set */ 677 if (mask & SPDIFRX_IMR_IFEIE) --- 43 unchanged lines hidden (view full) --- 721 } 722 723 if (flags & SPDIFRX_SR_TERR) { 724 dev_dbg(&pdev->dev, "Timeout error\n"); 725 err = 1; 726 } 727 728 if (err) { | 672 int err = 0, err_xrun = 0; 673 674 regmap_read(spdifrx->regmap, STM32_SPDIFRX_SR, &sr); 675 regmap_read(spdifrx->regmap, STM32_SPDIFRX_IMR, &imr); 676 677 mask = imr & SPDIFRX_XIMR_MASK; 678 /* SERR, TERR, FERR IRQs are generated if IFEIE is set */ 679 if (mask & SPDIFRX_IMR_IFEIE) --- 43 unchanged lines hidden (view full) --- 723 } 724 725 if (flags & SPDIFRX_SR_TERR) { 726 dev_dbg(&pdev->dev, "Timeout error\n"); 727 err = 1; 728 } 729 730 if (err) { |
729 /* SPDIFRX in STATE_STOP. Disable SPDIFRX to clear errors */ | 731 regmap_read(spdifrx->regmap, STM32_SPDIFRX_CR, &cr); 732 sync_state = FIELD_GET(SPDIFRX_CR_SPDIFEN_MASK, cr) && 733 SPDIFRX_SPDIFEN_SYNC; 734 735 /* SPDIFRX is in STATE_STOP. Disable SPDIFRX to clear errors */ |
730 cr = SPDIFRX_CR_SPDIFENSET(SPDIFRX_SPDIFEN_DISABLE); 731 regmap_update_bits(spdifrx->regmap, STM32_SPDIFRX_CR, 732 SPDIFRX_CR_SPDIFEN_MASK, cr); 733 | 736 cr = SPDIFRX_CR_SPDIFENSET(SPDIFRX_SPDIFEN_DISABLE); 737 regmap_update_bits(spdifrx->regmap, STM32_SPDIFRX_CR, 738 SPDIFRX_CR_SPDIFEN_MASK, cr); 739 |
740 /* If SPDIFRX was in STATE_SYNC, retry synchro */ 741 if (sync_state) { 742 cr = SPDIFRX_CR_SPDIFENSET(SPDIFRX_SPDIFEN_SYNC); 743 regmap_update_bits(spdifrx->regmap, STM32_SPDIFRX_CR, 744 SPDIFRX_CR_SPDIFEN_MASK, cr); 745 return IRQ_HANDLED; 746 } 747 |
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734 if (substream) 735 snd_pcm_stop(substream, SNDRV_PCM_STATE_DISCONNECTED); 736 737 return IRQ_HANDLED; 738 } 739 740 if (err_xrun && substream) 741 snd_pcm_stop_xrun(substream); --- 317 unchanged lines hidden --- | 748 if (substream) 749 snd_pcm_stop(substream, SNDRV_PCM_STATE_DISCONNECTED); 750 751 return IRQ_HANDLED; 752 } 753 754 if (err_xrun && substream) 755 snd_pcm_stop_xrun(substream); --- 317 unchanged lines hidden --- |