ivpu_hw.c (52ab5be191c42fe1bffac97ee248a237b9712889) ivpu_hw.c (3f440e0b4852288268df4f0757c53ad3031df80c)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2020 - 2024 Intel Corporation
4 */
5
6#include "ivpu_drv.h"
7#include "ivpu_hw.h"
8#include "ivpu_hw_btrs.h"

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72 IVPU_PRINT_WA(clear_runtime_mem);
73 IVPU_PRINT_WA(interrupt_clear_with_0);
74 IVPU_PRINT_WA(disable_clock_relinquish);
75 IVPU_PRINT_WA(wp0_during_power_up);
76}
77
78static void timeouts_init(struct ivpu_device *vdev)
79{
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2020 - 2024 Intel Corporation
4 */
5
6#include "ivpu_drv.h"
7#include "ivpu_hw.h"
8#include "ivpu_hw_btrs.h"

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72 IVPU_PRINT_WA(clear_runtime_mem);
73 IVPU_PRINT_WA(interrupt_clear_with_0);
74 IVPU_PRINT_WA(disable_clock_relinquish);
75 IVPU_PRINT_WA(wp0_during_power_up);
76}
77
78static void timeouts_init(struct ivpu_device *vdev)
79{
80 if (ivpu_is_fpga(vdev)) {
80 if (ivpu_test_mode & IVPU_TEST_MODE_DISABLE_TIMEOUTS) {
81 vdev->timeout.boot = -1;
82 vdev->timeout.jsm = -1;
83 vdev->timeout.tdr = -1;
84 vdev->timeout.autosuspend = -1;
85 vdev->timeout.d0i3_entry_msg = -1;
86 } else if (ivpu_is_fpga(vdev)) {
81 vdev->timeout.boot = 100000;
82 vdev->timeout.jsm = 50000;
83 vdev->timeout.tdr = 2000000;
87 vdev->timeout.boot = 100000;
88 vdev->timeout.jsm = 50000;
89 vdev->timeout.tdr = 2000000;
84 vdev->timeout.reschedule_suspend = 1000;
85 vdev->timeout.autosuspend = -1;
86 vdev->timeout.d0i3_entry_msg = 500;
87 } else if (ivpu_is_simics(vdev)) {
88 vdev->timeout.boot = 50;
89 vdev->timeout.jsm = 500;
90 vdev->timeout.tdr = 10000;
90 vdev->timeout.autosuspend = -1;
91 vdev->timeout.d0i3_entry_msg = 500;
92 } else if (ivpu_is_simics(vdev)) {
93 vdev->timeout.boot = 50;
94 vdev->timeout.jsm = 500;
95 vdev->timeout.tdr = 10000;
91 vdev->timeout.reschedule_suspend = 10;
92 vdev->timeout.autosuspend = -1;
93 vdev->timeout.d0i3_entry_msg = 100;
94 } else {
95 vdev->timeout.boot = 1000;
96 vdev->timeout.jsm = 500;
97 vdev->timeout.tdr = 2000;
96 vdev->timeout.autosuspend = -1;
97 vdev->timeout.d0i3_entry_msg = 100;
98 } else {
99 vdev->timeout.boot = 1000;
100 vdev->timeout.jsm = 500;
101 vdev->timeout.tdr = 2000;
98 vdev->timeout.reschedule_suspend = 10;
99 vdev->timeout.autosuspend = 10;
100 vdev->timeout.d0i3_entry_msg = 5;
101 }
102}
103
104static void memory_ranges_init(struct ivpu_device *vdev)
105{
106 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) {

--- 219 unchanged lines hidden --- 		102 vdev->timeout.autosuspend = 10;
103 vdev->timeout.d0i3_entry_msg = 5;
104 }
105}
106
107static void memory_ranges_init(struct ivpu_device *vdev)
108{
109 if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) {

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