cp1emu.c (93583e178ebfdd2fadf950eef1547f305cac12ca) cp1emu.c (4b820d95dc53c15e6e727da964430a3ed60e05ef)
1/*
2 * cp1emu.c: a MIPS coprocessor 1 (FPU) instruction emulator
3 *
4 * MIPS floating point support
5 * Copyright (C) 1994-2000 Algorithmics Ltd.
6 *
7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
8 * Copyright (C) 2000 MIPS Technologies, Inc.

--- 1661 unchanged lines hidden (view full) ---

1670
1671 MIPS_FPU_EMU_INC_STATS(cp1ops);
1672 switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) {
1673 case s_fmt: { /* 0 */
1674 union {
1675 union ieee754sp(*b) (union ieee754sp, union ieee754sp);
1676 union ieee754sp(*u) (union ieee754sp);
1677 } handler;
1/*
2 * cp1emu.c: a MIPS coprocessor 1 (FPU) instruction emulator
3 *
4 * MIPS floating point support
5 * Copyright (C) 1994-2000 Algorithmics Ltd.
6 *
7 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
8 * Copyright (C) 2000 MIPS Technologies, Inc.

--- 1661 unchanged lines hidden (view full) ---

1670
1671 MIPS_FPU_EMU_INC_STATS(cp1ops);
1672 switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) {
1673 case s_fmt: { /* 0 */
1674 union {
1675 union ieee754sp(*b) (union ieee754sp, union ieee754sp);
1676 union ieee754sp(*u) (union ieee754sp);
1677 } handler;
1678 union ieee754sp fs, ft;
1678 union ieee754sp fd, fs, ft;
1679
1680 switch (MIPSInst_FUNC(ir)) {
1681 /* binary ops */
1682 case fadd_op:
1683 handler.b = ieee754sp_add;
1684 goto scopbop;
1685 case fsub_op:
1686 handler.b = ieee754sp_sub;

--- 254 unchanged lines hidden (view full) ---

1941 oldrm = ieee754_csr.rm;
1942 SPFROMREG(fs, MIPSInst_FS(ir));
1943 ieee754_csr.rm = MIPSInst_FUNC(ir);
1944 rv.w = ieee754sp_tint(fs);
1945 ieee754_csr.rm = oldrm;
1946 rfmt = w_fmt;
1947 goto copcsr;
1948
1679
1680 switch (MIPSInst_FUNC(ir)) {
1681 /* binary ops */
1682 case fadd_op:
1683 handler.b = ieee754sp_add;
1684 goto scopbop;
1685 case fsub_op:
1686 handler.b = ieee754sp_sub;

--- 254 unchanged lines hidden (view full) ---

1941 oldrm = ieee754_csr.rm;
1942 SPFROMREG(fs, MIPSInst_FS(ir));
1943 ieee754_csr.rm = MIPSInst_FUNC(ir);
1944 rv.w = ieee754sp_tint(fs);
1945 ieee754_csr.rm = oldrm;
1946 rfmt = w_fmt;
1947 goto copcsr;
1948
1949 case fsel_op:
1950 if (!cpu_has_mips_r6)
1951 return SIGILL;
1952
1953 SPFROMREG(fd, MIPSInst_FD(ir));
1954 if (fd.bits & 0x1)
1955 SPFROMREG(rv.s, MIPSInst_FT(ir));
1956 else
1957 SPFROMREG(rv.s, MIPSInst_FS(ir));
1958 break;
1959
1949 case fcvtl_op:
1950 if (!cpu_has_mips_3_4_5_64_r2_r6)
1951 return SIGILL;
1952
1953 SPFROMREG(fs, MIPSInst_FS(ir));
1954 rv.l = ieee754sp_tlong(fs);
1955 rfmt = l_fmt;
1956 goto copcsr;

--- 32 unchanged lines hidden (view full) ---

1989 } else
1990 return SIGILL;
1991 break;
1992 }
1993 break;
1994 }
1995
1996 case d_fmt: {
1960 case fcvtl_op:
1961 if (!cpu_has_mips_3_4_5_64_r2_r6)
1962 return SIGILL;
1963
1964 SPFROMREG(fs, MIPSInst_FS(ir));
1965 rv.l = ieee754sp_tlong(fs);
1966 rfmt = l_fmt;
1967 goto copcsr;

--- 32 unchanged lines hidden (view full) ---

2000 } else
2001 return SIGILL;
2002 break;
2003 }
2004 break;
2005 }
2006
2007 case d_fmt: {
1997 union ieee754dp fs, ft;
2008 union ieee754dp fd, fs, ft;
1998 union {
1999 union ieee754dp(*b) (union ieee754dp, union ieee754dp);
2000 union ieee754dp(*u) (union ieee754dp);
2001 } handler;
2002
2003 switch (MIPSInst_FUNC(ir)) {
2004 /* binary ops */
2005 case fadd_op:

--- 233 unchanged lines hidden (view full) ---

2239 oldrm = ieee754_csr.rm;
2240 DPFROMREG(fs, MIPSInst_FS(ir));
2241 ieee754_csr.rm = MIPSInst_FUNC(ir);
2242 rv.w = ieee754dp_tint(fs);
2243 ieee754_csr.rm = oldrm;
2244 rfmt = w_fmt;
2245 goto copcsr;
2246
2009 union {
2010 union ieee754dp(*b) (union ieee754dp, union ieee754dp);
2011 union ieee754dp(*u) (union ieee754dp);
2012 } handler;
2013
2014 switch (MIPSInst_FUNC(ir)) {
2015 /* binary ops */
2016 case fadd_op:

--- 233 unchanged lines hidden (view full) ---

2250 oldrm = ieee754_csr.rm;
2251 DPFROMREG(fs, MIPSInst_FS(ir));
2252 ieee754_csr.rm = MIPSInst_FUNC(ir);
2253 rv.w = ieee754dp_tint(fs);
2254 ieee754_csr.rm = oldrm;
2255 rfmt = w_fmt;
2256 goto copcsr;
2257
2258 case fsel_op:
2259 if (!cpu_has_mips_r6)
2260 return SIGILL;
2261
2262 DPFROMREG(fd, MIPSInst_FD(ir));
2263 if (fd.bits & 0x1)
2264 DPFROMREG(rv.d, MIPSInst_FT(ir));
2265 else
2266 DPFROMREG(rv.d, MIPSInst_FS(ir));
2267 break;
2268
2247 case fcvtl_op:
2248 if (!cpu_has_mips_3_4_5_64_r2_r6)
2249 return SIGILL;
2250
2251 DPFROMREG(fs, MIPSInst_FS(ir));
2252 rv.l = ieee754dp_tlong(fs);
2253 rfmt = l_fmt;
2254 goto copcsr;

--- 343 unchanged lines hidden --- 		2269 case fcvtl_op:
2270 if (!cpu_has_mips_3_4_5_64_r2_r6)
2271 return SIGILL;
2272
2273 DPFROMREG(fs, MIPSInst_FS(ir));
2274 rv.l = ieee754dp_tlong(fs);
2275 rfmt = l_fmt;
2276 goto copcsr;

--- 343 unchanged lines hidden ---