| Kconfig (3eb85368460d942005ba305829e279d0fe4767e0) | Kconfig (8636a1f9677db4f883f29a072f401303acfc2edd) |
|---|---|
| 1config ARM64 2 def_bool y 3 select ACPI_CCA_REQUIRED if ACPI 4 select ACPI_GENERIC_GSI if ACPI 5 select ACPI_GTDT if ACPI 6 select ACPI_IORT if ACPI 7 select ACPI_REDUCED_HARDWARE_ONLY if ACPI | 1config ARM64 2 def_bool y 3 select ACPI_CCA_REQUIRED if ACPI 4 select ACPI_GENERIC_GSI if ACPI 5 select ACPI_GTDT if ACPI 6 select ACPI_IORT if ACPI 7 select ACPI_REDUCED_HARDWARE_ONLY if ACPI |
| 8 select ACPI_MCFG if (ACPI && PCI) | 8 select ACPI_MCFG if ACPI |
| 9 select ACPI_SPCR_TABLE if ACPI 10 select ACPI_PPTT if ACPI 11 select ARCH_CLOCKSOURCE_DATA 12 select ARCH_HAS_DEBUG_VIRTUAL 13 select ARCH_HAS_DEVMEM_IS_ALLOWED 14 select ARCH_HAS_DMA_COHERENT_TO_PFN 15 select ARCH_HAS_DMA_MMAP_PGPROT 16 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI --- 141 unchanged lines hidden (view full) --- 158 select IRQ_FORCED_THREADING 159 select MODULES_USE_ELF_RELA 160 select MULTI_IRQ_HANDLER 161 select NEED_DMA_MAP_STATE 162 select NEED_SG_DMA_LENGTH 163 select OF 164 select OF_EARLY_FLATTREE 165 select OF_RESERVED_MEM | 9 select ACPI_SPCR_TABLE if ACPI 10 select ACPI_PPTT if ACPI 11 select ARCH_CLOCKSOURCE_DATA 12 select ARCH_HAS_DEBUG_VIRTUAL 13 select ARCH_HAS_DEVMEM_IS_ALLOWED 14 select ARCH_HAS_DMA_COHERENT_TO_PFN 15 select ARCH_HAS_DMA_MMAP_PGPROT 16 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI --- 141 unchanged lines hidden (view full) --- 158 select IRQ_FORCED_THREADING 159 select MODULES_USE_ELF_RELA 160 select MULTI_IRQ_HANDLER 161 select NEED_DMA_MAP_STATE 162 select NEED_SG_DMA_LENGTH 163 select OF 164 select OF_EARLY_FLATTREE 165 select OF_RESERVED_MEM |
| 166 select PCI_ECAM if (ACPI && PCI) | 166 select PCI_ECAM if ACPI |
| 167 select POWER_RESET 168 select POWER_SUPPLY 169 select REFCOUNT_FULL 170 select SPARSE_IRQ 171 select SWIOTLB 172 select SYSCTL_EXCEPTION_TRACE 173 select THREAD_INFO_IN_TASK 174 help --- 317 unchanged lines hidden (view full) --- 492 This option adds work arounds for ARM Cortex-A76 erratum 1188873 493 494 Affected Cortex-A76 cores (r0p0, r1p0, r2p0) could cause 495 register corruption when accessing the timer registers from 496 AArch32 userspace. 497 498 If unsure, say Y. 499 | 167 select POWER_RESET 168 select POWER_SUPPLY 169 select REFCOUNT_FULL 170 select SPARSE_IRQ 171 select SWIOTLB 172 select SYSCTL_EXCEPTION_TRACE 173 select THREAD_INFO_IN_TASK 174 help --- 317 unchanged lines hidden (view full) --- 492 This option adds work arounds for ARM Cortex-A76 erratum 1188873 493 494 Affected Cortex-A76 cores (r0p0, r1p0, r2p0) could cause 495 register corruption when accessing the timer registers from 496 AArch32 userspace. 497 498 If unsure, say Y. 499 |
| 500config ARM64_ERRATUM_1286807 501 bool "Cortex-A76: Modification of the translation table for a virtual address might lead to read-after-read ordering violation" 502 default y 503 select ARM64_WORKAROUND_REPEAT_TLBI 504 help 505 This option adds workaround for ARM Cortex-A76 erratum 1286807 506 507 On the affected Cortex-A76 cores (r0p0 to r3p0), if a virtual 508 address for a cacheable mapping of a location is being 509 accessed by a core while another core is remapping the virtual 510 address to a new physical page using the recommended 511 break-before-make sequence, then under very rare circumstances 512 TLBI+DSB completes before a read using the translation being 513 invalidated has been observed by other observers. The 514 workaround repeats the TLBI+DSB operation. 515 516 If unsure, say Y. 517 | |
| 518config CAVIUM_ERRATUM_22375 519 bool "Cavium erratum 22375, 24313" 520 default y 521 help 522 Enable workaround for erratum 22375, 24313. 523 524 This implements two gicv3-its errata workarounds for ThunderX. Both 525 with small impact affecting only ITS table allocation. --- 53 unchanged lines hidden (view full) --- 579 help 580 On Falkor v1, an incorrect ASID may be cached in the TLB when ASID 581 and BADDR are changed together in TTBRx_EL1. Since we keep the ASID 582 in TTBR1_EL1, this situation only occurs in the entry trampoline and 583 then only for entries in the walk cache, since the leaf translation 584 is unchanged. Work around the erratum by invalidating the walk cache 585 entries for the trampoline before entering the kernel proper. 586 | 500config CAVIUM_ERRATUM_22375 501 bool "Cavium erratum 22375, 24313" 502 default y 503 help 504 Enable workaround for erratum 22375, 24313. 505 506 This implements two gicv3-its errata workarounds for ThunderX. Both 507 with small impact affecting only ITS table allocation. --- 53 unchanged lines hidden (view full) --- 561 help 562 On Falkor v1, an incorrect ASID may be cached in the TLB when ASID 563 and BADDR are changed together in TTBRx_EL1. Since we keep the ASID 564 in TTBR1_EL1, this situation only occurs in the entry trampoline and 565 then only for entries in the walk cache, since the leaf translation 566 is unchanged. Work around the erratum by invalidating the walk cache 567 entries for the trampoline before entering the kernel proper. 568 |
| 587config ARM64_WORKAROUND_REPEAT_TLBI 588 bool 589 help 590 Enable the repeat TLBI workaround for Falkor erratum 1009 and 591 Cortex-A76 erratum 1286807. 592 | |
| 593config QCOM_FALKOR_ERRATUM_1009 594 bool "Falkor E1009: Prematurely complete a DSB after a TLBI" 595 default y | 569config QCOM_FALKOR_ERRATUM_1009 570 bool "Falkor E1009: Prematurely complete a DSB after a TLBI" 571 default y |
| 596 select ARM64_WORKAROUND_REPEAT_TLBI | |
| 597 help 598 On Falkor v1, the CPU may prematurely complete a DSB following a 599 TLBI xxIS invalidate maintenance operation. Repeat the TLBI operation 600 one more time to fix the issue. 601 602 If unsure, say Y. 603 604config QCOM_QDF2400_ERRATUM_0065 --- 197 unchanged lines hidden (view full) --- 802 803config NEED_PER_CPU_EMBED_FIRST_CHUNK 804 def_bool y 805 depends on NUMA 806 807config HOLES_IN_ZONE 808 def_bool y 809 | 572 help 573 On Falkor v1, the CPU may prematurely complete a DSB following a 574 TLBI xxIS invalidate maintenance operation. Repeat the TLBI operation 575 one more time to fix the issue. 576 577 If unsure, say Y. 578 579config QCOM_QDF2400_ERRATUM_0065 --- 197 unchanged lines hidden (view full) --- 777 778config NEED_PER_CPU_EMBED_FIRST_CHUNK 779 def_bool y 780 depends on NUMA 781 782config HOLES_IN_ZONE 783 def_bool y 784 |
| 810source kernel/Kconfig.hz | 785source "kernel/Kconfig.hz" |
| 811 812config ARCH_SUPPORTS_DEBUG_PAGEALLOC 813 def_bool y 814 815config ARCH_SPARSEMEM_ENABLE 816 def_bool y 817 select SPARSEMEM_VMEMMAP_ENABLE 818 --- 577 unchanged lines hidden --- | 786 787config ARCH_SUPPORTS_DEBUG_PAGEALLOC 788 def_bool y 789 790config ARCH_SPARSEMEM_ENABLE 791 def_bool y 792 select SPARSEMEM_VMEMMAP_ENABLE 793 --- 577 unchanged lines hidden --- |