| 8250.yaml (eec2c477d9f45812193170a30fc12bf7eb75de4c) | 8250.yaml (770ba14bd7fca8a25e6f73ac25dc2cd1377be6fa) |
|---|---|
| 1# Copyright 2020 Lubomir Rintel <lkundrak@v3.sk> 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/serial/8250.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: UART (Universal Asynchronous Receiver/Transmitter) 8 9maintainers: 10 - devicetree@vger.kernel.org 11 12allOf: 13 - $ref: serial.yaml# | 1# Copyright 2020 Lubomir Rintel <lkundrak@v3.sk> 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/serial/8250.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: UART (Universal Asynchronous Receiver/Transmitter) 8 9maintainers: 10 - devicetree@vger.kernel.org 11 12allOf: 13 - $ref: serial.yaml# |
| 14 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml# |
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| 14 - if: 15 anyOf: 16 - required: 17 - aspeed,lpc-io-reg 18 - required: 19 - aspeed,lpc-interrupts 20 - required: 21 - aspeed,sirq-polarity-sense --- 35 unchanged lines hidden (view full) --- 57 - const: ns16550a 58 - const: ns16850 59 - const: aspeed,ast2400-vuart 60 - const: aspeed,ast2500-vuart 61 - const: intel,xscale-uart 62 - const: mrvl,pxa-uart 63 - const: nuvoton,wpcm450-uart 64 - const: nuvoton,npcm750-uart | 15 - if: 16 anyOf: 17 - required: 18 - aspeed,lpc-io-reg 19 - required: 20 - aspeed,lpc-interrupts 21 - required: 22 - aspeed,sirq-polarity-sense --- 35 unchanged lines hidden (view full) --- 58 - const: ns16550a 59 - const: ns16850 60 - const: aspeed,ast2400-vuart 61 - const: aspeed,ast2500-vuart 62 - const: intel,xscale-uart 63 - const: mrvl,pxa-uart 64 - const: nuvoton,wpcm450-uart 65 - const: nuvoton,npcm750-uart |
| 66 - const: nuvoton,npcm845-uart |
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| 65 - const: nvidia,tegra20-uart 66 - const: nxp,lpc3220-uart 67 - items: 68 - enum: 69 - exar,xr16l2552 70 - exar,xr16l2551 71 - exar,xr16l2550 72 - const: ns8250 --- 15 unchanged lines hidden (view full) --- 88 - cavium,octeon-3860-uart 89 - xlnx,xps-uart16550-2.00.b 90 - ralink,rt2880-uart 91 - enum: 92 - ns16550 # Deprecated, unless the FIFO really is broken 93 - ns16550a 94 - items: 95 - enum: | 67 - const: nvidia,tegra20-uart 68 - const: nxp,lpc3220-uart 69 - items: 70 - enum: 71 - exar,xr16l2552 72 - exar,xr16l2551 73 - exar,xr16l2550 74 - const: ns8250 --- 15 unchanged lines hidden (view full) --- 90 - cavium,octeon-3860-uart 91 - xlnx,xps-uart16550-2.00.b 92 - ralink,rt2880-uart 93 - enum: 94 - ns16550 # Deprecated, unless the FIFO really is broken 95 - ns16550a 96 - items: 97 - enum: |
| 96 - nuvoton,npcm845-uart 97 - const: nuvoton,npcm750-uart 98 - items: 99 - enum: | |
| 100 - ralink,mt7620a-uart 101 - ralink,rt3052-uart 102 - ralink,rt3883-uart 103 - const: ralink,rt2880-uart 104 - enum: 105 - ns16550 # Deprecated, unless the FIFO really is broken 106 - ns16550a 107 - items: --- 90 unchanged lines hidden (view full) --- 198 description: | 199 Phandle to aspeed,ast2500-scu compatible syscon alongside register 200 offset and bit number to identify how the SIRQ polarity should be 201 configured. One possible data source is the LPC/eSPI mode bit. Only 202 applicable to aspeed,ast2500-vuart. 203 deprecated: true 204 205 aspeed,lpc-io-reg: | 98 - ralink,mt7620a-uart 99 - ralink,rt3052-uart 100 - ralink,rt3883-uart 101 - const: ralink,rt2880-uart 102 - enum: 103 - ns16550 # Deprecated, unless the FIFO really is broken 104 - ns16550a 105 - items: --- 90 unchanged lines hidden (view full) --- 196 description: | 197 Phandle to aspeed,ast2500-scu compatible syscon alongside register 198 offset and bit number to identify how the SIRQ polarity should be 199 configured. One possible data source is the LPC/eSPI mode bit. Only 200 applicable to aspeed,ast2500-vuart. 201 deprecated: true 202 203 aspeed,lpc-io-reg: |
| 206 $ref: /schemas/types.yaml#/definitions/uint32-array 207 maxItems: 1 | 204 $ref: '/schemas/types.yaml#/definitions/uint32' |
| 208 description: | 209 The VUART LPC address. Only applicable to aspeed,ast2500-vuart. 210 211 aspeed,lpc-interrupts: | 205 description: | 206 The VUART LPC address. Only applicable to aspeed,ast2500-vuart. 207 208 aspeed,lpc-interrupts: |
| 212 $ref: /schemas/types.yaml#/definitions/uint32-array | 209 $ref: "/schemas/types.yaml#/definitions/uint32-array" |
| 213 minItems: 2 214 maxItems: 2 215 description: | 216 A 2-cell property describing the VUART SIRQ number and SIRQ 217 polarity (IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_LEVEL_HIGH). Only 218 applicable to aspeed,ast2500-vuart. 219 220required: --- 43 unchanged lines hidden --- | 210 minItems: 2 211 maxItems: 2 212 description: | 213 A 2-cell property describing the VUART SIRQ number and SIRQ 214 polarity (IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_LEVEL_HIGH). Only 215 applicable to aspeed,ast2500-vuart. 216 217required: --- 43 unchanged lines hidden --- |