xref: /linux/tools/testing/selftests/x86/xstate.h (revision 4f9786035f9e519db41375818e1d0b5f20da2f10)
1 // SPDX-License-Identifier: GPL-2.0-only
2 #ifndef __SELFTESTS_X86_XSTATE_H
3 #define __SELFTESTS_X86_XSTATE_H
4 
5 #include <stdint.h>
6 
7 #include "../kselftest.h"
8 
9 #define XSAVE_HDR_OFFSET	512
10 #define XSAVE_HDR_SIZE		64
11 
12 /*
13  * List of XSAVE features Linux knows about. Copied from
14  * arch/x86/include/asm/fpu/types.h
15  */
16 enum xfeature {
17 	XFEATURE_FP,
18 	XFEATURE_SSE,
19 	XFEATURE_YMM,
20 	XFEATURE_BNDREGS,
21 	XFEATURE_BNDCSR,
22 	XFEATURE_OPMASK,
23 	XFEATURE_ZMM_Hi256,
24 	XFEATURE_Hi16_ZMM,
25 	XFEATURE_PT_UNIMPLEMENTED_SO_FAR,
26 	XFEATURE_PKRU,
27 	XFEATURE_PASID,
28 	XFEATURE_CET_USER,
29 	XFEATURE_CET_KERNEL_UNUSED,
30 	XFEATURE_RSRVD_COMP_13,
31 	XFEATURE_RSRVD_COMP_14,
32 	XFEATURE_LBR,
33 	XFEATURE_RSRVD_COMP_16,
34 	XFEATURE_XTILECFG,
35 	XFEATURE_XTILEDATA,
36 
37 	XFEATURE_MAX,
38 };
39 
40 /* Copied from arch/x86/kernel/fpu/xstate.c */
41 static const char *xfeature_names[] =
42 {
43 	"x87 floating point registers",
44 	"SSE registers",
45 	"AVX registers",
46 	"MPX bounds registers",
47 	"MPX CSR",
48 	"AVX-512 opmask",
49 	"AVX-512 Hi256",
50 	"AVX-512 ZMM_Hi256",
51 	"Processor Trace (unused)",
52 	"Protection Keys User registers",
53 	"PASID state",
54 	"Control-flow User registers",
55 	"Control-flow Kernel registers (unused)",
56 	"unknown xstate feature",
57 	"unknown xstate feature",
58 	"unknown xstate feature",
59 	"unknown xstate feature",
60 	"AMX Tile config",
61 	"AMX Tile data",
62 	"unknown xstate feature",
63 };
64 
65 struct xsave_buffer {
66 	union {
67 		struct {
68 			char legacy[XSAVE_HDR_OFFSET];
69 			char header[XSAVE_HDR_SIZE];
70 			char extended[0];
71 		};
72 		char bytes[0];
73 	};
74 };
75 
76 static inline void xsave(struct xsave_buffer *xbuf, uint64_t rfbm)
77 {
78 	uint32_t rfbm_hi = rfbm >> 32;
79 	uint32_t rfbm_lo = rfbm;
80 
81 	asm volatile("xsave (%%rdi)"
82 		     : : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi)
83 		     : "memory");
84 }
85 
86 static inline void xrstor(struct xsave_buffer *xbuf, uint64_t rfbm)
87 {
88 	uint32_t rfbm_hi = rfbm >> 32;
89 	uint32_t rfbm_lo = rfbm;
90 
91 	asm volatile("xrstor (%%rdi)"
92 		     : : "D" (xbuf), "a" (rfbm_lo), "d" (rfbm_hi));
93 }
94 
95 #define CPUID_LEAF_XSTATE		0xd
96 #define CPUID_SUBLEAF_XSTATE_USER	0x0
97 
98 static inline uint32_t get_xbuf_size(void)
99 {
100 	uint32_t eax, ebx, ecx, edx;
101 
102 	__cpuid_count(CPUID_LEAF_XSTATE, CPUID_SUBLEAF_XSTATE_USER,
103 		      eax, ebx, ecx, edx);
104 
105 	/*
106 	 * EBX enumerates the size (in bytes) required by the XSAVE
107 	 * instruction for an XSAVE area containing all the user state
108 	 * components corresponding to bits currently set in XCR0.
109 	 */
110 	return ebx;
111 }
112 
113 struct xstate_info {
114 	const char *name;
115 	uint32_t num;
116 	uint32_t mask;
117 	uint32_t xbuf_offset;
118 	uint32_t size;
119 };
120 
121 static inline struct xstate_info get_xstate_info(uint32_t xfeature_num)
122 {
123 	struct xstate_info xstate = { };
124 	uint32_t eax, ebx, ecx, edx;
125 
126 	if (xfeature_num >= XFEATURE_MAX) {
127 		ksft_print_msg("unknown state\n");
128 		return xstate;
129 	}
130 
131 	xstate.name = xfeature_names[xfeature_num];
132 	xstate.num  = xfeature_num;
133 	xstate.mask = 1 << xfeature_num;
134 
135 	__cpuid_count(CPUID_LEAF_XSTATE, xfeature_num,
136 		      eax, ebx, ecx, edx);
137 	xstate.size        = eax;
138 	xstate.xbuf_offset = ebx;
139 	return xstate;
140 }
141 
142 static inline struct xsave_buffer *alloc_xbuf(void)
143 {
144 	uint32_t xbuf_size = get_xbuf_size();
145 
146 	/* XSAVE buffer should be 64B-aligned. */
147 	return aligned_alloc(64, xbuf_size);
148 }
149 
150 static inline void clear_xstate_header(struct xsave_buffer *xbuf)
151 {
152 	memset(&xbuf->header, 0, sizeof(xbuf->header));
153 }
154 
155 static inline void set_xstatebv(struct xsave_buffer *xbuf, uint64_t bv)
156 {
157 	/* XSTATE_BV is at the beginning of the header: */
158 	*(uint64_t *)(&xbuf->header) = bv;
159 }
160 
161 /* See 'struct _fpx_sw_bytes' at sigcontext.h */
162 #define SW_BYTES_OFFSET		464
163 /* N.B. The struct's field name varies so read from the offset. */
164 #define SW_BYTES_BV_OFFSET	(SW_BYTES_OFFSET + 8)
165 
166 static inline struct _fpx_sw_bytes *get_fpx_sw_bytes(void *xbuf)
167 {
168 	return xbuf + SW_BYTES_OFFSET;
169 }
170 
171 static inline uint64_t get_fpx_sw_bytes_features(void *buffer)
172 {
173 	return *(uint64_t *)(buffer + SW_BYTES_BV_OFFSET);
174 }
175 
176 static inline void set_rand_data(struct xstate_info *xstate, struct xsave_buffer *xbuf)
177 {
178 	int *ptr = (int *)&xbuf->bytes[xstate->xbuf_offset];
179 	int data, i;
180 
181 	/*
182 	 * Ensure that 'data' is never 0.  This ensures that
183 	 * the registers are never in their initial configuration
184 	 * and thus never tracked as being in the init state.
185 	 */
186 	data = rand() | 1;
187 
188 	for (i = 0; i < xstate->size / sizeof(int); i++, ptr++)
189 		*ptr = data;
190 }
191 
192 /* Testing kernel's context switching and ABI support for the xstate. */
193 void test_xstate(uint32_t feature_num);
194 
195 #endif /* __SELFTESTS_X86_XSTATE_H */
196