1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef SELFTEST_RISCV_CFI_H 4 #define SELFTEST_RISCV_CFI_H 5 #include <stddef.h> 6 #include <sys/types.h> 7 #include "shadowstack.h" 8 9 #define CHILD_EXIT_CODE_SSWRITE 10 10 #define CHILD_EXIT_CODE_SIG_TEST 11 11 12 #define my_syscall5(num, arg1, arg2, arg3, arg4, arg5) \ 13 ({ \ 14 register long _num __asm__ ("a7") = (num); \ 15 register long _arg1 __asm__ ("a0") = (long)(arg1); \ 16 register long _arg2 __asm__ ("a1") = (long)(arg2); \ 17 register long _arg3 __asm__ ("a2") = (long)(arg3); \ 18 register long _arg4 __asm__ ("a3") = (long)(arg4); \ 19 register long _arg5 __asm__ ("a4") = (long)(arg5); \ 20 \ 21 __asm__ volatile( \ 22 "ecall\n" \ 23 : "+r" \ 24 (_arg1) \ 25 : "r"(_arg2), "r"(_arg3), "r"(_arg4), "r"(_arg5), \ 26 "r"(_num) \ 27 : "memory", "cc" \ 28 ); \ 29 _arg1; \ 30 }) 31 32 #define my_syscall3(num, arg1, arg2, arg3) \ 33 ({ \ 34 register long _num __asm__ ("a7") = (num); \ 35 register long _arg1 __asm__ ("a0") = (long)(arg1); \ 36 register long _arg2 __asm__ ("a1") = (long)(arg2); \ 37 register long _arg3 __asm__ ("a2") = (long)(arg3); \ 38 \ 39 __asm__ volatile( \ 40 "ecall\n" \ 41 : "+r" (_arg1) \ 42 : "r"(_arg2), "r"(_arg3), \ 43 "r"(_num) \ 44 : "memory", "cc" \ 45 ); \ 46 _arg1; \ 47 }) 48 49 #ifndef __NR_prctl 50 #define __NR_prctl 167 51 #endif 52 53 #ifndef __NR_map_shadow_stack 54 #define __NR_map_shadow_stack 453 55 #endif 56 57 #define CSR_SSP 0x011 58 59 #ifdef __ASSEMBLY__ 60 #define __ASM_STR(x) x 61 #else 62 #define __ASM_STR(x) #x 63 #endif 64 65 #define csr_read(csr) \ 66 ({ \ 67 register unsigned long __v; \ 68 __asm__ __volatile__ ("csrr %0, " __ASM_STR(csr) \ 69 : "=r" (__v) : \ 70 : "memory"); \ 71 __v; \ 72 }) 73 74 #define csr_write(csr, val) \ 75 ({ \ 76 unsigned long __v = (unsigned long)(val); \ 77 __asm__ __volatile__ ("csrw " __ASM_STR(csr) ", %0" \ 78 : : "rK" (__v) \ 79 : "memory"); \ 80 }) 81 82 #endif 83