xref: /linux/tools/testing/cxl/test/accel.c (revision 920f27122cbacfd3b540a3f2f67b0145203d5581)
1*1c6b4ceaSDave Jiang // SPDX-License-Identifier: GPL-2.0-only
2*1c6b4ceaSDave Jiang // Copyright(c) 2026 Intel Corporation. All rights reserved.
3*1c6b4ceaSDave Jiang 
4*1c6b4ceaSDave Jiang #include <linux/platform_device.h>
5*1c6b4ceaSDave Jiang #include <linux/mod_devicetable.h>
6*1c6b4ceaSDave Jiang #include <linux/module.h>
7*1c6b4ceaSDave Jiang #include <linux/sizes.h>
8*1c6b4ceaSDave Jiang #include <cxl/mailbox.h>
9*1c6b4ceaSDave Jiang #include <cxlmem.h>
10*1c6b4ceaSDave Jiang 
11*1c6b4ceaSDave Jiang struct mock_cxl_accel {
12*1c6b4ceaSDave Jiang 	struct cxl_dev_state cxlds;
13*1c6b4ceaSDave Jiang 	struct cxl_memdev *cxlmd;
14*1c6b4ceaSDave Jiang };
15*1c6b4ceaSDave Jiang 
cxl_mock_accel_probe(struct platform_device * pdev)16*1c6b4ceaSDave Jiang static int cxl_mock_accel_probe(struct platform_device *pdev)
17*1c6b4ceaSDave Jiang {
18*1c6b4ceaSDave Jiang 	struct mock_cxl_accel *cxl_accel;
19*1c6b4ceaSDave Jiang 	struct device *dev = &pdev->dev;
20*1c6b4ceaSDave Jiang 	struct cxl_dev_state *cxlds;
21*1c6b4ceaSDave Jiang 	struct cxl_memdev *cxlmd;
22*1c6b4ceaSDave Jiang 	struct range mock_range;
23*1c6b4ceaSDave Jiang 	int rc;
24*1c6b4ceaSDave Jiang 
25*1c6b4ceaSDave Jiang 	cxl_accel = devm_cxl_dev_state_create(&pdev->dev, CXL_DEVTYPE_DEVMEM,
26*1c6b4ceaSDave Jiang 					      pdev->id + 1, 0,
27*1c6b4ceaSDave Jiang 					      struct mock_cxl_accel, cxlds,
28*1c6b4ceaSDave Jiang 					      false);
29*1c6b4ceaSDave Jiang 	if (!cxl_accel)
30*1c6b4ceaSDave Jiang 		return -ENOMEM;
31*1c6b4ceaSDave Jiang 
32*1c6b4ceaSDave Jiang 	cxlds = &cxl_accel->cxlds;
33*1c6b4ceaSDave Jiang 	cxlds->media_ready = true;
34*1c6b4ceaSDave Jiang 	rc = cxl_set_capacity(cxlds, SZ_512M);
35*1c6b4ceaSDave Jiang 	if (rc)
36*1c6b4ceaSDave Jiang 		return rc;
37*1c6b4ceaSDave Jiang 
38*1c6b4ceaSDave Jiang 	cxlmd = devm_cxl_probe_mem(cxlds, &mock_range);
39*1c6b4ceaSDave Jiang 	if (IS_ERR(cxlmd))
40*1c6b4ceaSDave Jiang 		return PTR_ERR(cxlmd);
41*1c6b4ceaSDave Jiang 	cxl_accel->cxlmd = cxlmd;
42*1c6b4ceaSDave Jiang 
43*1c6b4ceaSDave Jiang 	dev_dbg(dev, "Probed mock accelerator with range %pra\n", &mock_range);
44*1c6b4ceaSDave Jiang 
45*1c6b4ceaSDave Jiang 	return 0;
46*1c6b4ceaSDave Jiang }
47*1c6b4ceaSDave Jiang 
48*1c6b4ceaSDave Jiang static const struct platform_device_id cxl_mock_accel_ids[] = {
49*1c6b4ceaSDave Jiang 	{ .name = "cxl_type2_accel" },
50*1c6b4ceaSDave Jiang 	{ }
51*1c6b4ceaSDave Jiang };
52*1c6b4ceaSDave Jiang MODULE_DEVICE_TABLE(platform, cxl_mock_accel_ids);
53*1c6b4ceaSDave Jiang 
54*1c6b4ceaSDave Jiang static struct platform_driver cxl_mock_accel_driver = {
55*1c6b4ceaSDave Jiang 	.probe = cxl_mock_accel_probe,
56*1c6b4ceaSDave Jiang 	.id_table = cxl_mock_accel_ids,
57*1c6b4ceaSDave Jiang 	.driver = {
58*1c6b4ceaSDave Jiang 		.name = KBUILD_MODNAME,
59*1c6b4ceaSDave Jiang 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
60*1c6b4ceaSDave Jiang 	},
61*1c6b4ceaSDave Jiang };
62*1c6b4ceaSDave Jiang 
63*1c6b4ceaSDave Jiang module_platform_driver(cxl_mock_accel_driver);
64*1c6b4ceaSDave Jiang MODULE_LICENSE("GPL");
65*1c6b4ceaSDave Jiang MODULE_DESCRIPTION("cxl_test: accelerator device mock module");
66*1c6b4ceaSDave Jiang MODULE_IMPORT_NS("CXL");
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