Merge tag 'cxl-for-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl

Pull CXL updates from Dave Jiang:
"This includes the remaining patches to complete the basic support for
CXL type2

Merge tag 'cxl-for-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl

Pull CXL updates from Dave Jiang:
"This includes the remaining patches to complete the basic support for
CXL type2 (accelerators) drivers by the CXL core. A set of unit
testing support to catch regressions for the CXL core type2 exported
functions has also been added. The actual CXL type 2 driver support
for the AMD Solarflare NIC driver has been picked up by net-dev.

A set of preparatory patches has been picked up from the CXL port
error handling series in order to reduce the number of patches in that
series for review. The rest of that series is getting close to be
merged but was not ready for the 7.3 merge window.

There are also a number of misc patches and a large number of bug
fixes against pre-existing issues flagged by sashiko reviews as
contributors post new patches on the mailing list. We will continue to
work through the sashiko raised issues as they show up."

* tag 'cxl-for-7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: (35 commits)
cxl/Documentation: Spell out globbed sysfs attribute names
cxl: Rename find_cxl_port() to find_cxl_port_by_dport()
cxl: Tighten CPER kfifo registration API and symbol visibility
acpi/apei/ghes: Use raw_spinlock_t for CXL CPER work locks
cxl/ras: Fix cxl_rch_get_aer_severity() wrong severity register
cxl/ras: Fix cxl_rch_get_aer_info() out-of-bounds AER register read
cxl/test: Assign one mock memdev a full-width serial number
cxl/core: Format the memdev serial number as unsigned in TP_printk
cxl/pmem: Format the nvdimm serial number as unsigned decimal
cxl: Use %pe to print error pointers
cxl/region: Use __free(put_device) in find_pos_and_ways()
cxl/region: Fix use-after-free in find_pos_and_ways() error path
cxl: Deny Features commands on the RAW mailbox path
cxl/features: Clamp Get Feature output size to the remaining buffer
cxl/features: Reject Set Features output buffer smaller than the header
cxl/features: Reject Get Feature count larger than the output buffer
cxl/port: Restart port enumeration when a sibling adds the dport first
cxl/features: Serialize multi-part Get/Set Feature transfers
cxl/pci: Honor -EPROBE_DEFER from component register setup
cxl/mbox: Break poison list loop on an empty payload
...

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Merge branch 'for-7.3/cxl-type2-test' into cxl-for-next

cxl_test support for type2

cxl/test: Rework cxl_type2_mem_init() to use cxl_mock_platform_device_add()
cxl/test: Add cxl_test accelerator dri

Merge branch 'for-7.3/cxl-type2-test' into cxl-for-next

cxl_test support for type2

cxl/test: Rework cxl_type2_mem_init() to use cxl_mock_platform_device_add()
cxl/test: Add cxl_test accelerator driver
cxl/test: Fixup hdm init for auto region to support type2
cxl/test: Propagate -ENOMEM on platform_device_alloc() failures
cxl/test: Add hierarchy enumeration support for type2 device
cxl/test: Refactor platform device enumerations
cxl/test: Add type2 support for mock CFMWS0
cxl/test: Add test for module parameters

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cxl/test: Add cxl_test accelerator driver

Add a type2 accelerator mock driver for the platform device that
simulates a CXL type2 device. The driver exercises the same
minimal API calls that a real C

cxl/test: Add cxl_test accelerator driver

Add a type2 accelerator mock driver for the platform device that
simulates a CXL type2 device. The driver exercises the same
minimal API calls that a real CXL type2 driver would utilize.

Tested-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Alison Schofield <alison.schofield@intel.com>
Link: https://patch.msgid.link/20260629221104.3891733-8-dave.jiang@intel.com
Signed-off-by: Dave Jiang <dave.jiang@intel.com>

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