1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Mapping of DWARF debug register numbers into register names.
4 *
5 * Copyright (C) 2010 Ian Munsie, IBM Corporation.
6 */
7 #include <errno.h>
8 #include <dwarf-regs.h>
9 #include "../../../arch/powerpc/include/uapi/asm/perf_regs.h"
10
11 #define PPC_OP(op) (((op) >> 26) & 0x3F)
12 #define PPC_RA(a) (((a) >> 16) & 0x1f)
13 #define PPC_RT(t) (((t) >> 21) & 0x1f)
14 #define PPC_RB(b) (((b) >> 11) & 0x1f)
15 #define PPC_D(D) ((D) & 0xfffe)
16 #define PPC_DS(DS) ((DS) & 0xfffc)
17 #define OP_LD 58
18 #define OP_STD 62
19
get_source_reg(u32 raw_insn)20 static int get_source_reg(u32 raw_insn)
21 {
22 return PPC_RA(raw_insn);
23 }
24
get_target_reg(u32 raw_insn)25 static int get_target_reg(u32 raw_insn)
26 {
27 return PPC_RT(raw_insn);
28 }
29
get_offset_opcode(u32 raw_insn)30 static int get_offset_opcode(u32 raw_insn)
31 {
32 int opcode = PPC_OP(raw_insn);
33
34 /* DS- form */
35 if ((opcode == OP_LD) || (opcode == OP_STD))
36 return PPC_DS(raw_insn);
37 else
38 return PPC_D(raw_insn);
39 }
40
41 /*
42 * Fills the required fields for op_loc depending on if it
43 * is a source or target.
44 * D form: ins RT,D(RA) -> src_reg1 = RA, offset = D, dst_reg1 = RT
45 * DS form: ins RT,DS(RA) -> src_reg1 = RA, offset = DS, dst_reg1 = RT
46 * X form: ins RT,RA,RB -> src_reg1 = RA, src_reg2 = RB, dst_reg1 = RT
47 */
get_powerpc_regs(u32 raw_insn,int is_source,struct annotated_op_loc * op_loc)48 void get_powerpc_regs(u32 raw_insn, int is_source,
49 struct annotated_op_loc *op_loc)
50 {
51 if (is_source)
52 op_loc->reg1 = get_source_reg(raw_insn);
53 else
54 op_loc->reg1 = get_target_reg(raw_insn);
55
56 if (op_loc->multi_regs)
57 op_loc->reg2 = PPC_RB(raw_insn);
58
59 /* TODO: Implement offset handling for X Form */
60 if ((op_loc->mem_ref) && (PPC_OP(raw_insn) != 31))
61 op_loc->offset = get_offset_opcode(raw_insn);
62 }
63
__get_dwarf_regnum_for_perf_regnum_powerpc(int perf_regnum)64 int __get_dwarf_regnum_for_perf_regnum_powerpc(int perf_regnum)
65 {
66 static const int dwarf_powerpc_regnums[] = {
67 [PERF_REG_POWERPC_R0] = 0,
68 [PERF_REG_POWERPC_R1] = 1,
69 [PERF_REG_POWERPC_R2] = 2,
70 [PERF_REG_POWERPC_R3] = 3,
71 [PERF_REG_POWERPC_R4] = 4,
72 [PERF_REG_POWERPC_R5] = 5,
73 [PERF_REG_POWERPC_R6] = 6,
74 [PERF_REG_POWERPC_R7] = 7,
75 [PERF_REG_POWERPC_R8] = 8,
76 [PERF_REG_POWERPC_R9] = 9,
77 [PERF_REG_POWERPC_R10] = 10,
78 [PERF_REG_POWERPC_R11] = 11,
79 [PERF_REG_POWERPC_R12] = 12,
80 [PERF_REG_POWERPC_R13] = 13,
81 [PERF_REG_POWERPC_R14] = 14,
82 [PERF_REG_POWERPC_R15] = 15,
83 [PERF_REG_POWERPC_R16] = 16,
84 [PERF_REG_POWERPC_R17] = 17,
85 [PERF_REG_POWERPC_R18] = 18,
86 [PERF_REG_POWERPC_R19] = 19,
87 [PERF_REG_POWERPC_R20] = 20,
88 [PERF_REG_POWERPC_R21] = 21,
89 [PERF_REG_POWERPC_R22] = 22,
90 [PERF_REG_POWERPC_R23] = 23,
91 [PERF_REG_POWERPC_R24] = 24,
92 [PERF_REG_POWERPC_R25] = 25,
93 [PERF_REG_POWERPC_R26] = 26,
94 [PERF_REG_POWERPC_R27] = 27,
95 [PERF_REG_POWERPC_R28] = 28,
96 [PERF_REG_POWERPC_R29] = 29,
97 [PERF_REG_POWERPC_R30] = 30,
98 [PERF_REG_POWERPC_R31] = 31,
99 /* TODO: PERF_REG_POWERPC_NIP */
100 [PERF_REG_POWERPC_MSR] = 66,
101 /* TODO: PERF_REG_POWERPC_ORIG_R3 */
102 [PERF_REG_POWERPC_CTR] = 109,
103 [PERF_REG_POWERPC_LINK] = 108, /* Note, previously in perf encoded as 65? */
104 [PERF_REG_POWERPC_XER] = 101,
105 /* TODO: PERF_REG_POWERPC_CCR */
106 /* TODO: PERF_REG_POWERPC_SOFTE */
107 /* TODO: PERF_REG_POWERPC_TRAP */
108 /* TODO: PERF_REG_POWERPC_DAR */
109 /* TODO: PERF_REG_POWERPC_DSISR */
110 /* TODO: PERF_REG_POWERPC_SIER */
111 /* TODO: PERF_REG_POWERPC_MMCRA */
112 /* TODO: PERF_REG_POWERPC_MMCR0 */
113 /* TODO: PERF_REG_POWERPC_MMCR1 */
114 /* TODO: PERF_REG_POWERPC_MMCR2 */
115 /* TODO: PERF_REG_POWERPC_MMCR3 */
116 /* TODO: PERF_REG_POWERPC_SIER2 */
117 /* TODO: PERF_REG_POWERPC_SIER3 */
118 /* TODO: PERF_REG_POWERPC_PMC1 */
119 /* TODO: PERF_REG_POWERPC_PMC2 */
120 /* TODO: PERF_REG_POWERPC_PMC3 */
121 /* TODO: PERF_REG_POWERPC_PMC4 */
122 /* TODO: PERF_REG_POWERPC_PMC5 */
123 /* TODO: PERF_REG_POWERPC_PMC6 */
124 /* TODO: PERF_REG_POWERPC_SDAR */
125 /* TODO: PERF_REG_POWERPC_SIAR */
126 };
127
128 if (perf_regnum == 0)
129 return 0;
130
131 if (perf_regnum < 0 || perf_regnum > (int)ARRAY_SIZE(dwarf_powerpc_regnums) ||
132 dwarf_powerpc_regnums[perf_regnum] == 0)
133 return -ENOENT;
134
135 return dwarf_powerpc_regnums[perf_regnum];
136 }
137