xref: /linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/l1i_cache.json (revision 1ac731c529cd4d6adbce134754b51ff7d822b145) 
1[
2    {
3        "ArchStdEvent": "L1I_CACHE_REFILL",
4        "PublicDescription": "Counts cache line refills in the level 1 instruction cache caused by a missed instruction fetch. Instruction fetches may include accessing multiple instructions, but the single cache line allocation is counted once."
5    },
6    {
7        "ArchStdEvent": "L1I_CACHE",
8        "PublicDescription": "Counts instruction fetches which access the level 1 instruction cache. Instruction cache accesses caused by cache maintenance operations are not counted."
9    }
10]
11