1 /* SPDX-License-Identifier: GPL-2.0 2 * 3 * ALSA SoC Texas Instruments TAC5XX2 Audio Smart Amplifier 4 * 5 * Copyright (C) 2025 Texas Instruments Incorporated 6 * https://www.ti.com 7 * 8 * This the header file for TAC5XX2 family of devices 9 * which includes TAC5572, TAC5672, TAC5682 and TAS2883 10 * 11 * Author: Niranjan H Y <niranjanhy@ti.com> 12 */ 13 #ifndef __RGL_TAC5XX2_H__ 14 #define __RGL_TAC5XX2_H__ 15 16 /* for soundwire */ 17 #define TAC_REG_SDW(book, page, reg) (((book) * 256 * 128) + \ 18 0x3000000 + ((page) * 128) + (reg)) 19 20 /* page 0 registers */ 21 #define TAC_SW_RESET TAC_REG_SDW(0, 0, 1) 22 #define TAC_SLEEP_MODEZ TAC_REG_SDW(0, 0, 2) 23 #define TAC_FEATURE_PDZ TAC_REG_SDW(0, 0, 3) 24 #define TAC_TX_CH_EN TAC_REG_SDW(0, 0, 4) 25 #define TAC_RX_CH_PD TAC_REG_SDW(0, 0, 5) 26 #define TAC_SHDNZ_CFG TAC_REG_SDW(0, 0, 6) 27 #define TAC_MISC_CFG0 TAC_REG_SDW(0, 0, 7) 28 #define TAC_MISC_CFG1 TAC_REG_SDW(0, 0, 8) 29 #define TAC_GPIO1_CFG0 TAC_REG_SDW(0, 0, 9) 30 #define TAC_GPIO2_CFG0 TAC_REG_SDW(0, 0, 10) 31 #define TAC_GPIO3_CFG0 TAC_REG_SDW(0, 0, 11) 32 #define TAC_GPIO4_CFG0 TAC_REG_SDW(0, 0, 12) 33 #define TAC_GPIO5_CFG0 TAC_REG_SDW(0, 0, 13) 34 #define TAC_GPIO6_CFG0 TAC_REG_SDW(0, 0, 14) 35 #define TAC_INTF_CFG1 TAC_REG_SDW(0, 0, 15) 36 #define TAC_INTF_CFG5 TAC_REG_SDW(0, 0, 16) 37 #define TAC_PASI_BCLK_CFG0 TAC_REG_SDW(0, 0, 17) 38 #define TAC_PASI_FSYNC_CFG0 TAC_REG_SDW(0, 0, 18) 39 #define TAC_PASI_DIN1_CFG0 TAC_REG_SDW(0, 0, 19) 40 #define TAC_PASI_DIN2_CFG0 TAC_REG_SDW(0, 0, 20) 41 #define TAC_PDM_DIN1_CFG0 TAC_REG_SDW(0, 0, 21) 42 #define TAC_PDM_DIN2_CFG0 TAC_REG_SDW(0, 0, 22) 43 #define TAC_MCLK_SEL TAC_REG_SDW(0, 0, 23) 44 #define TAC_I2C2_CFG0 TAC_REG_SDW(0, 0, 24) 45 #define TAC_SDW_IO_CFG0 TAC_REG_SDW(0, 0, 25) 46 #define TAC_SDW_CLK_CFG0 TAC_REG_SDW(0, 0, 26) 47 #define TAC_PASI_CFG0 TAC_REG_SDW(0, 0, 27) 48 #define TAC_PASI_CFG1 TAC_REG_SDW(0, 0, 28) 49 #define TAC_PASI_TX_CFG0 TAC_REG_SDW(0, 0, 29) 50 #define TAC_PASI_TX_CFG1 TAC_REG_SDW(0, 0, 30) 51 #define TAC_PASI_TX_CFG2 TAC_REG_SDW(0, 0, 31) 52 #define TAC_PASI_TX_CFG3 TAC_REG_SDW(0, 0, 32) 53 #define TAC_PASI_TX_CH1_CFG0 TAC_REG_SDW(0, 0, 33) 54 #define TAC_PASI_TX_CH2_CFG0 TAC_REG_SDW(0, 0, 34) 55 #define TAC_PASI_TX_CH3_CFG0 TAC_REG_SDW(0, 0, 35) 56 #define TAC_PASI_TX_CH4_CFG0 TAC_REG_SDW(0, 0, 36) 57 #define TAC_PASI_TX_CH5_CFG0 TAC_REG_SDW(0, 0, 37) 58 #define TAC_PASI_TX_CH6_CFG0 TAC_REG_SDW(0, 0, 38) 59 #define TAC_PASI_TX_CH7_CFG0 TAC_REG_SDW(0, 0, 39) 60 #define TAC_PASI_TX_CH8_CFG0 TAC_REG_SDW(0, 0, 40) 61 #define TAC_PASI_RX_CFG0 TAC_REG_SDW(0, 0, 41) 62 #define TAC_PASI_RX_CFG1 TAC_REG_SDW(0, 0, 42) 63 #define TAC_PASI_RX_CFG2 TAC_REG_SDW(0, 0, 43) 64 #define TAC_PASI_RX_CH1_CFG0 TAC_REG_SDW(0, 0, 44) 65 #define TAC_PASI_RX_CH2_CFG0 TAC_REG_SDW(0, 0, 45) 66 #define TAC_PASI_RX_CH3_CFG0 TAC_REG_SDW(0, 0, 46) 67 #define TAC_PASI_RX_CH4_CFG0 TAC_REG_SDW(0, 0, 47) 68 #define TAC_PASI_RX_CH5_CFG0 TAC_REG_SDW(0, 0, 48) 69 #define TAC_PASI_RX_CH6_CFG0 TAC_REG_SDW(0, 0, 49) 70 #define TAC_PASI_RX_CH7_CFG0 TAC_REG_SDW(0, 0, 50) 71 #define TAC_PASI_RX_CH8_CFG0 TAC_REG_SDW(0, 0, 51) 72 #define TAC_ADC_CH1_CFG0 TAC_REG_SDW(0, 0, 52) 73 #define TAC_ADC_DVOL_CFG0 TAC_REG_SDW(0, 0, 53) 74 #define TAC_ADC_CH1_FGAIN TAC_REG_SDW(0, 0, 54) 75 #define TAC_ADC_CH1_CFG1 TAC_REG_SDW(0, 0, 55) 76 #define TAC_ADC_CH2_CFG0 TAC_REG_SDW(0, 0, 57) 77 #define TAC_ADC_DVOL_CFG1 TAC_REG_SDW(0, 0, 58) 78 #define TAC_ADC_CH2_FGAIN TAC_REG_SDW(0, 0, 59) 79 #define TAC_ADC_CH2_CFG1 TAC_REG_SDW(0, 0, 60) 80 #define TAC_ADC_CFG1 TAC_REG_SDW(0, 0, 62) 81 #define TAC_PDM_CH1_DVOL TAC_REG_SDW(0, 0, 63) 82 #define TAC_PDM_CH1_FGAIN TAC_REG_SDW(0, 0, 64) 83 #define TAC_PDM_CH1_CFG0 TAC_REG_SDW(0, 0, 65) 84 #define TAC_PDM_CH2_DVOL TAC_REG_SDW(0, 0, 67) 85 #define TAC_PDM_CH2_FGAIN TAC_REG_SDW(0, 0, 68) 86 #define TAC_PDM_CH2_CFG2 TAC_REG_SDW(0, 0, 69) 87 #define TAC_PDM_CH3_DVOL TAC_REG_SDW(0, 0, 71) 88 #define TAC_PDM_CH3_FGAIN TAC_REG_SDW(0, 0, 72) 89 #define TAC_PDM_CH3_CFG0 TAC_REG_SDW(0, 0, 73) 90 #define TAC_PDM_CH4_DVOL TAC_REG_SDW(0, 0, 75) 91 #define TAC_PDM_CH4_FGAIN TAC_REG_SDW(0, 0, 76) 92 #define TAC_PDM_CH4_CFG0 TAC_REG_SDW(0, 0, 77) 93 #define TAC_MICBIAS_CFG0 TAC_REG_SDW(0, 0, 79) 94 #define TAC_MICPREAMP_CFG TAC_REG_SDW(0, 0, 80) 95 #define TAC_MICBIAS_CFG1 TAC_REG_SDW(0, 0, 81) 96 #define TAC_CLASSD_CH1_DVOL TAC_REG_SDW(0, 0, 82) 97 #define TAC_CLASSD_CH1_FGAIN TAC_REG_SDW(0, 0, 83) 98 #define TAC_CLASSD_CH2_DVOL TAC_REG_SDW(0, 0, 85) 99 #define TAC_CLASSD_CH2_FGAIN TAC_REG_SDW(0, 0, 86) 100 #define TAC_GCHP_CH1_DVOL TAC_REG_SDW(0, 0, 88) 101 #define TAC_GCHP_CH1_FGAIN TAC_REG_SDW(0, 0, 89) 102 #define TAC_GCHP_CH2_DVOL TAC_REG_SDW(0, 0, 91) 103 #define TAC_GCHP_CH2_FGAIN TAC_REG_SDW(0, 0, 92) 104 #define TAC_AMP_LVL_CFG0 TAC_REG_SDW(0, 0, 94) 105 #define TAC_AMP_LVL_CFG1 TAC_REG_SDW(0, 0, 95) 106 #define TAC_AMP_LVL_CFG2 TAC_REG_SDW(0, 0, 96) 107 #define TAC_AMP_LVL_CFG3 TAC_REG_SDW(0, 0, 97) 108 #define TAC_EFF_MODE_CFG0 TAC_REG_SDW(0, 0, 98) 109 #define TAC_EFF_MODE_CFG1 TAC_REG_SDW(0, 0, 99) 110 #define TAC_CLASSD_CFG0 TAC_REG_SDW(0, 0, 100) 111 #define TAC_CLASSD_CFG1 TAC_REG_SDW(0, 0, 101) 112 #define TAC_CLASSD_CFG3 TAC_REG_SDW(0, 0, 102) 113 #define TAC_CLASSD_CFG4 TAC_REG_SDW(0, 0, 103) 114 #define TAC_CLASSD_CFG5 TAC_REG_SDW(0, 0, 104) 115 #define TAC_CLASSD_CFG6 TAC_REG_SDW(0, 0, 105) 116 #define TAC_CLASSD_CFG8 TAC_REG_SDW(0, 0, 106) 117 #define TAC_ISNS_CFG TAC_REG_SDW(0, 0, 107) 118 #define TAC_DSP_CFG0 TAC_REG_SDW(0, 0, 108) 119 #define TAC_DSP_CFG1 TAC_REG_SDW(0, 0, 109) 120 #define TAC_DSP_CFG2 TAC_REG_SDW(0, 0, 110) 121 #define TAC_DSP_CFG3 TAC_REG_SDW(0, 0, 111) 122 #define TAC_JACK_DET_CFG1 TAC_REG_SDW(0, 0, 112) 123 #define TAC_JACK_DET_CFG2 TAC_REG_SDW(0, 0, 113) 124 #define TAC_JACK_DET_CFG3 TAC_REG_SDW(0, 0, 114) 125 #define TAC_JACK_DET_CFG4 TAC_REG_SDW(0, 0, 115) 126 #define TAC_JACK_DET_CFG7 TAC_REG_SDW(0, 0, 116) 127 #define TAC_UJ_IMPEDANCE_L TAC_REG_SDW(0, 0, 117) 128 #define TAC_UJ_IMPEDANCE_R TAC_REG_SDW(0, 0, 118) 129 #define UJ_IMPEDANCE_L TAC_REG_SDW(0, 0, 119) 130 #define UJ_IMPEDANCE_R TAC_REG_SDW(0, 0, 120) 131 #define TAC_GP_ANA_STS TAC_REG_SDW(0, 0, 123) 132 #define TAC_DEV_ID TAC_REG_SDW(0, 0, 124) 133 #define TAC_REV_ID TAC_REG_SDW(0, 0, 125) 134 #define TAC_I2C_CKSUM TAC_REG_SDW(0, 0, 126) 135 #define TAC_BOOK TAC_REG_SDW(0, 0, 127) 136 137 #define TAC_INT_CFG TAC_REG_SDW(0, 2, 1) 138 #define TAC_INT_CFG_CLR_REG BIT(3) 139 140 /* smartamp function */ 141 #define TAC_FUNCTION_ID_SA 0x1 142 143 #define TAC_SDCA_ENT_ENT0 0x0 144 #define TAC_SDCA_ENT_PPU21 0x1 145 #define TAC_SDCA_ENT_FU21 0x2 146 #define TAC_SDCA_ENT_FU26 0x3 147 #define TAC_SDCA_ENT_XU22 0x4 148 #define TAC_SDCA_ENT_CS24 0x5 149 #define TAC_SDCA_ENT_CS21 0x6 150 #define TAC_SDCA_ENT_CS25 0x7 151 #define TAC_SDCA_ENT_CS26 0x8 152 #define TAC_SDCA_ENT_CS28 0x9 153 #define TAC_SDCA_ENT_PPU26 0xa 154 #define TAC_SDCA_ENT_FU23 0xb 155 #define TAC_SDCA_ENT_PDE23 0xc 156 #define TAC_SDCA_ENT_TG23 0x12 157 #define TAC_SDCA_ENT_IT21 0x13 158 #define TAC_SDCA_ENT_IT29 0x14 159 #define TAC_SDCA_ENT_IT26 0x15 160 #define TAC_SDCA_ENT_IT28 0x16 161 #define TAC_SDCA_ENT_OT24 0x17 162 #define TAC_SDCA_ENT_OT23 0x18 163 #define TAC_SDCA_ENT_OT25 0x19 164 #define TAC_SDCA_ENT_OT28 0x1a 165 #define TAC_SDCA_ENT_OT27 0x1c 166 #define TAC_SDCA_ENT_SPE199 0x21 167 #define TAC_SDCA_ENT_OT20 0x24 168 #define TAC_SDCA_ENT_FU27 0x26 169 #define TAC_SDCA_ENT_FU20 0x27 170 #define TAC_SDCA_ENT_PDE24 0x2e 171 #define TAC_SDCA_ENT_PDE27 0x2f 172 #define TAC_SDCA_ENT_PDE28 0x30 173 #define TAC_SDCA_ENT_PDE20 0x31 174 #define TAC_SDCA_ENT_SAPU29 0x35 175 176 /* Control selector definitions */ 177 #define TAC_SDCA_MASTER_GAIN 0x0B 178 #define TAC_SDCA_MASTER_MUTE 0x01 179 #define TAC_SDCA_CHANNEL_MUTE 0x01 180 #define TAC_SDCA_CHANNEL_GAIN 0x02 181 #define TAC_SDCA_POSTURENUMBER 0x10 182 #define TAC_SDCA_REQUESTED_PS 0x01 183 #define TAC_SDCA_ACTUAL_PS 0x10 184 #define TAC_SDCA_CHANNEL_VOLUME 0x02 185 186 /* 2. smart mic function */ 187 #define TAC_FUNCTION_ID_SM 0x2 188 189 #define TAC_SDCA_ENT_IT11 0x1 190 #define TAC_SDCA_ENT_OT113 0x2 191 #define TAC_SDCA_ENT_CS11 0x3 192 #define TAC_SDCA_ENT_CS18 0x4 193 #define TAC_SDCA_ENT_FU113 0x5 194 #define TAC_SDCA_ENT_FU13 0x6 195 #define TAC_SDCA_ENT_FU11 0x8 196 #define TAC_SDCA_ENT_XU12 0xa 197 #define TAC_SDCA_ENT_CS113 0xc 198 #define TAC_SDCA_ENT_CX11 0xf 199 #define TAC_SDCA_ENT_PDE11 0x12 200 #define TAC_SDCA_ENT_PPU11 0x9 201 202 /* controls */ 203 #define TAC_SDCA_CTL_USAGE 0x04 204 #define TAC_SDCA_CTL_IT_CLUSTER 0x10 205 #define TAC_SDCA_CTL_OT_DP_SEL 0x11 206 #define TAC_SDCA_CTL_XU_BYPASS 0x01 207 /* cx */ 208 #define TAC_SDCA_CTL_CX_CLK_SEL 0x01 209 /* cs */ 210 #define TAC_SDCA_CTL_CS_CLKVLD 0x02 211 #define TAC_SDCA_CTL_CS_SAMP_RATE_IDX 0x10 212 /* cs113 end */ 213 /* ppu */ 214 #define TAC_SDCA_CTL_PPU_POSTURE_NUM 0x10 215 216 /* 3. UAJ function */ 217 #define TAC_FUNCTION_ID_UAJ 0x3 218 #define TAC_SDCA_ENT_PDE47 0x35 219 #define TAC_SDCA_ENT_PDE34 0x32 220 #define TAC_SDCA_ENT_FU41 0x26 /* user */ 221 #define TAC_SDCA_ENT_IT41 0x07 222 #define TAC_SDCA_ENT_XU42 0x2C 223 #define TAC_SDCA_ENT_CS41 0x30 224 #define TAC_SDCA_ENT_OT45 0x0E 225 #define TAC_SDCA_ENT_IT33 0x03 226 #define TAC_SDCA_ENT_OT36 0x0A 227 #define TAC_SDCA_ENT_FU36 0x28 228 #define TAC_SDCA_ENT_CS36 0x2E 229 #define TAC_SDCA_ENT_GE35 0x3B /* 59 */ 230 231 #define TAC_SDCA_CTL_SEL_MODE 0x1 232 #define TAC_SDCA_CTL_DET_MODE 0x2 233 234 /* 4. HID function */ 235 #define TAC_FUNCTION_ID_HID 0x4 236 #define TAC_SDCA_ENT_HID1 0x1 237 /* HID Control Selectors */ 238 #define TAC_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10 239 #define TAC_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12 240 #define TAC_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13 241 #define TAC_SDCA_CTL_DETECTED_MODE 0x10 242 #define TAC_SDCA_CTL_SELECTED_MODE 0x11 243 244 #define TAC_BUF_ADDR_HID1 0x44007F80 245 246 /* DAI interfaces */ 247 #define TAC5XX2_SPK 0 248 #define TAC5XX2_DMIC 2 249 #define TAC5XX2_UAJ 3 250 251 /* Port numbers for DAIs */ 252 #define TAC_SDW_PORT_NUM_SPK_PLAYBACK 1 253 #define TAC_SDW_PORT_NUM_SPK_CAPTURE 2 254 #define TAC_SDW_PORT_NUM_DMIC 3 255 #define TAC_SDW_PORT_NUM_UAJ_PLAYBACK 4 256 #define TAC_SDW_PORT_NUM_UAJ_CAPTURE 7 257 #define TAC_SDW_PORT_NUM_IV_SENSE 8 258 259 #endif 260