1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 4 * Creative Labs, Inc. 5 * Routines for control of EMU10K1 chips 6 * 7 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> 8 * Added support for Audigy 2 Value. 9 * Added EMU 1010 support. 10 * General bug fixes and enhancements. 11 * 12 * BUGS: 13 * -- 14 * 15 * TODO: 16 * -- 17 */ 18 19 #include <linux/sched.h> 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/iommu.h> 25 #include <linux/pci.h> 26 #include <linux/slab.h> 27 #include <linux/vmalloc.h> 28 #include <linux/mutex.h> 29 30 31 #include <sound/core.h> 32 #include <sound/emu10k1.h> 33 #include <linux/firmware.h> 34 #include "p16v.h" 35 #include "tina2.h" 36 #include "p17v.h" 37 38 39 #define HANA_FILENAME "emu/hana.fw" 40 #define DOCK_FILENAME "emu/audio_dock.fw" 41 #define EMU1010B_FILENAME "emu/emu1010b.fw" 42 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw" 43 #define EMU0404_FILENAME "emu/emu0404.fw" 44 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" 45 46 MODULE_FIRMWARE(HANA_FILENAME); 47 MODULE_FIRMWARE(DOCK_FILENAME); 48 MODULE_FIRMWARE(EMU1010B_FILENAME); 49 MODULE_FIRMWARE(MICRO_DOCK_FILENAME); 50 MODULE_FIRMWARE(EMU0404_FILENAME); 51 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); 52 53 54 /************************************************************************* 55 * EMU10K1 init / done 56 *************************************************************************/ 57 58 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch) 59 { 60 snd_emu10k1_ptr_write_multiple(emu, ch, 61 DCYSUSV, 0, 62 VTFT, VTFT_FILTERTARGET_MASK, 63 CVCF, CVCF_CURRENTFILTER_MASK, 64 PTRX, 0, 65 CPF, 0, 66 CCR, 0, 67 68 PSST, 0, 69 DSL, 0x10, 70 CCCA, 0, 71 Z1, 0, 72 Z2, 0, 73 FXRT, 0x32100000, 74 75 // The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero 76 DCYSUSM, 0, 77 ATKHLDV, 0, 78 ATKHLDM, 0, 79 IP, 0, 80 IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK, 81 PEFE, 0, 82 FMMOD, 0, 83 TREMFRQ, 24, /* 1 Hz */ 84 FM2FRQ2, 24, /* 1 Hz */ 85 LFOVAL2, 0, 86 LFOVAL1, 0, 87 ENVVOL, 0, 88 ENVVAL, 0, 89 90 REGLIST_END); 91 92 /* Audigy extra stuffs */ 93 if (emu->audigy) { 94 snd_emu10k1_ptr_write_multiple(emu, ch, 95 A_CSBA, 0, 96 A_CSDC, 0, 97 A_CSFE, 0, 98 A_CSHG, 0, 99 A_FXRT1, 0x03020100, 100 A_FXRT2, 0x07060504, 101 A_SENDAMOUNTS, 0, 102 REGLIST_END); 103 } 104 } 105 106 static const unsigned int spi_dac_init[] = { 107 0x00ff, 108 0x02ff, 109 0x0400, 110 0x0520, 111 0x0600, 112 0x08ff, 113 0x0aff, 114 0x0cff, 115 0x0eff, 116 0x10ff, 117 0x1200, 118 0x1400, 119 0x1480, 120 0x1800, 121 0x1aff, 122 0x1cff, 123 0x1e00, 124 0x0530, 125 0x0602, 126 0x0622, 127 0x1400, 128 }; 129 130 static const unsigned int i2c_adc_init[][2] = { 131 { 0x17, 0x00 }, /* Reset */ 132 { 0x07, 0x00 }, /* Timeout */ 133 { 0x0b, 0x22 }, /* Interface control */ 134 { 0x0c, 0x22 }, /* Master mode control */ 135 { 0x0d, 0x08 }, /* Powerdown control */ 136 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ 137 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ 138 { 0x10, 0x7b }, /* ALC Control 1 */ 139 { 0x11, 0x00 }, /* ALC Control 2 */ 140 { 0x12, 0x32 }, /* ALC Control 3 */ 141 { 0x13, 0x00 }, /* Noise gate control */ 142 { 0x14, 0xa6 }, /* Limiter control */ 143 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */ 144 }; 145 146 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir) 147 { 148 unsigned int silent_page; 149 int ch; 150 u32 tmp; 151 152 /* disable audio and lock cache */ 153 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | 154 HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 155 156 outl(0, emu->port + INTE); 157 158 snd_emu10k1_ptr_write_multiple(emu, 0, 159 /* reset recording buffers */ 160 MICBS, ADCBS_BUFSIZE_NONE, 161 MICBA, 0, 162 FXBS, ADCBS_BUFSIZE_NONE, 163 FXBA, 0, 164 ADCBS, ADCBS_BUFSIZE_NONE, 165 ADCBA, 0, 166 167 /* disable channel interrupt */ 168 CLIEL, 0, 169 CLIEH, 0, 170 171 /* disable stop on loop end */ 172 SOLEL, 0, 173 SOLEH, 0, 174 175 REGLIST_END); 176 177 if (emu->audigy) { 178 /* set SPDIF bypass mode */ 179 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); 180 /* enable rear left + rear right AC97 slots */ 181 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | 182 AC97SLOT_REAR_LEFT); 183 } 184 185 /* init envelope engine */ 186 for (ch = 0; ch < NUM_G; ch++) 187 snd_emu10k1_voice_init(emu, ch); 188 189 snd_emu10k1_ptr_write_multiple(emu, 0, 190 SPCS0, emu->spdif_bits[0], 191 SPCS1, emu->spdif_bits[1], 192 SPCS2, emu->spdif_bits[2], 193 REGLIST_END); 194 195 if (emu->card_capabilities->emu_model) { 196 } else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 197 /* Hacks for Alice3 to work independent of haP16V driver */ 198 /* Setup SRCMulti_I2S SamplingRate */ 199 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 200 201 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 202 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); 203 /* Setup SRCMulti Input Audio Enable */ 204 /* Use 0xFFFFFFFF to enable P16V sounds. */ 205 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); 206 207 /* Enabled Phased (8-channel) P16V playback */ 208 outl(0x0201, emu->port + HCFG2); 209 /* Set playback routing. */ 210 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); 211 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ 212 /* Hacks for Alice3 to work independent of haP16V driver */ 213 dev_info(emu->card->dev, "Audigy2 value: Special config.\n"); 214 /* Setup SRCMulti_I2S SamplingRate */ 215 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 216 217 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 218 snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14); 219 220 /* Setup SRCMulti Input Audio Enable */ 221 snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000); 222 223 /* Setup SPDIF Out Audio Enable */ 224 /* The Audigy 2 Value has a separate SPDIF out, 225 * so no need for a mixer switch 226 */ 227 snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000); 228 229 tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ 230 outw(tmp, emu->port + A_IOCFG); 231 } 232 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ 233 int size, n; 234 235 size = ARRAY_SIZE(spi_dac_init); 236 for (n = 0; n < size; n++) 237 snd_emu10k1_spi_write(emu, spi_dac_init[n]); 238 239 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); 240 /* Enable GPIOs 241 * GPIO0: Unknown 242 * GPIO1: Speakers-enabled. 243 * GPIO2: Unknown 244 * GPIO3: Unknown 245 * GPIO4: IEC958 Output on. 246 * GPIO5: Unknown 247 * GPIO6: Unknown 248 * GPIO7: Unknown 249 */ 250 outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ 251 } 252 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ 253 int size, n; 254 255 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); 256 tmp = inw(emu->port + A_IOCFG); 257 outw(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ 258 tmp = inw(emu->port + A_IOCFG); 259 size = ARRAY_SIZE(i2c_adc_init); 260 for (n = 0; n < size; n++) 261 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); 262 for (n = 0; n < 4; n++) { 263 emu->i2c_capture_volume[n][0] = 0xcf; 264 emu->i2c_capture_volume[n][1] = 0xcf; 265 } 266 } 267 268 269 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); 270 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ 271 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */ 272 273 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0); 274 for (ch = 0; ch < NUM_G; ch++) { 275 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); 276 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); 277 } 278 279 if (emu->card_capabilities->emu_model) { 280 outl(HCFG_AUTOMUTE_ASYNC | 281 HCFG_EMU32_SLAVE | 282 HCFG_AUDIOENABLE, emu->port + HCFG); 283 /* 284 * Hokay, setup HCFG 285 * Mute Disable Audio = 0 286 * Lock Tank Memory = 1 287 * Lock Sound Memory = 0 288 * Auto Mute = 1 289 */ 290 } else if (emu->audigy) { 291 if (emu->revision == 4) /* audigy2 */ 292 outl(HCFG_AUDIOENABLE | 293 HCFG_AC3ENABLE_CDSPDIF | 294 HCFG_AC3ENABLE_GPSPDIF | 295 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 296 else 297 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 298 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, 299 * e.g. card_capabilities->joystick */ 300 } else if (emu->model == 0x20 || 301 emu->model == 0xc400 || 302 (emu->model == 0x21 && emu->revision < 6)) 303 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); 304 else 305 /* With on-chip joystick */ 306 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 307 308 if (enable_ir) { /* enable IR for SB Live */ 309 if (emu->card_capabilities->emu_model) { 310 ; /* Disable all access to A_IOCFG for the emu1010 */ 311 } else if (emu->card_capabilities->i2c_adc) { 312 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 313 } else if (emu->audigy) { 314 u16 reg = inw(emu->port + A_IOCFG); 315 outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 316 udelay(500); 317 outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 318 udelay(100); 319 outw(reg, emu->port + A_IOCFG); 320 } else { 321 unsigned int reg = inl(emu->port + HCFG); 322 outl(reg | HCFG_GPOUT2, emu->port + HCFG); 323 udelay(500); 324 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); 325 udelay(100); 326 outl(reg, emu->port + HCFG); 327 } 328 } 329 330 if (emu->card_capabilities->emu_model) { 331 ; /* Disable all access to A_IOCFG for the emu1010 */ 332 } else if (emu->card_capabilities->i2c_adc) { 333 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 334 } else if (emu->audigy) { /* enable analog output */ 335 u16 reg = inw(emu->port + A_IOCFG); 336 outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); 337 } 338 339 if (emu->address_mode == 0) { 340 /* use 16M in 4G */ 341 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG); 342 } 343 344 return 0; 345 } 346 347 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) 348 { 349 /* 350 * Enable the audio bit 351 */ 352 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); 353 354 /* Enable analog/digital outs on audigy */ 355 if (emu->card_capabilities->emu_model) { 356 ; /* Disable all access to A_IOCFG for the emu1010 */ 357 } else if (emu->card_capabilities->i2c_adc) { 358 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 359 } else if (emu->audigy) { 360 outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); 361 362 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 363 /* Unmute Analog now. Set GPO6 to 1 for Apollo. 364 * This has to be done after init ALice3 I2SOut beyond 48KHz. 365 * So, sequence is important. */ 366 outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); 367 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ 368 /* Unmute Analog now. */ 369 outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); 370 } else { 371 /* Disable routing from AC97 line out to Front speakers */ 372 outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); 373 } 374 } 375 376 #if 0 377 { 378 unsigned int tmp; 379 /* FIXME: the following routine disables LiveDrive-II !! */ 380 /* TOSLink detection */ 381 emu->tos_link = 0; 382 tmp = inl(emu->port + HCFG); 383 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 384 outl(tmp|0x800, emu->port + HCFG); 385 udelay(50); 386 if (tmp != (inl(emu->port + HCFG) & ~0x800)) { 387 emu->tos_link = 1; 388 outl(tmp, emu->port + HCFG); 389 } 390 } 391 } 392 #endif 393 394 if (emu->card_capabilities->emu_model) 395 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE | INTE_A_GPIOENABLE); 396 else 397 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); 398 } 399 400 int snd_emu10k1_done(struct snd_emu10k1 *emu) 401 { 402 int ch; 403 404 outl(0, emu->port + INTE); 405 406 /* 407 * Shutdown the voices 408 */ 409 for (ch = 0; ch < NUM_G; ch++) { 410 snd_emu10k1_ptr_write_multiple(emu, ch, 411 DCYSUSV, 0, 412 VTFT, 0, 413 CVCF, 0, 414 PTRX, 0, 415 CPF, 0, 416 REGLIST_END); 417 } 418 419 // stop the DSP 420 if (emu->audigy) 421 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); 422 else 423 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); 424 425 snd_emu10k1_ptr_write_multiple(emu, 0, 426 /* reset recording buffers */ 427 MICBS, 0, 428 MICBA, 0, 429 FXBS, 0, 430 FXBA, 0, 431 FXWC, 0, 432 ADCBS, ADCBS_BUFSIZE_NONE, 433 ADCBA, 0, 434 TCBS, TCBS_BUFFSIZE_16K, 435 TCB, 0, 436 437 /* disable channel interrupt */ 438 CLIEL, 0, 439 CLIEH, 0, 440 SOLEL, 0, 441 SOLEH, 0, 442 443 PTB, 0, 444 445 REGLIST_END); 446 447 /* disable audio and lock cache */ 448 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 449 450 return 0; 451 } 452 453 /************************************************************************* 454 * ECARD functional implementation 455 *************************************************************************/ 456 457 /* In A1 Silicon, these bits are in the HC register */ 458 #define HOOKN_BIT (1L << 12) 459 #define HANDN_BIT (1L << 11) 460 #define PULSEN_BIT (1L << 10) 461 462 #define EC_GDI1 (1 << 13) 463 #define EC_GDI0 (1 << 14) 464 465 #define EC_NUM_CONTROL_BITS 20 466 467 #define EC_AC3_DATA_SELN 0x0001L 468 #define EC_EE_DATA_SEL 0x0002L 469 #define EC_EE_CNTRL_SELN 0x0004L 470 #define EC_EECLK 0x0008L 471 #define EC_EECS 0x0010L 472 #define EC_EESDO 0x0020L 473 #define EC_TRIM_CSN 0x0040L 474 #define EC_TRIM_SCLK 0x0080L 475 #define EC_TRIM_SDATA 0x0100L 476 #define EC_TRIM_MUTEN 0x0200L 477 #define EC_ADCCAL 0x0400L 478 #define EC_ADCRSTN 0x0800L 479 #define EC_DACCAL 0x1000L 480 #define EC_DACMUTEN 0x2000L 481 #define EC_LEDN 0x4000L 482 483 #define EC_SPDIF0_SEL_SHIFT 15 484 #define EC_SPDIF1_SEL_SHIFT 17 485 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) 486 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) 487 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) 488 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) 489 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should 490 * be incremented any time the EEPROM's 491 * format is changed. */ 492 493 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ 494 495 /* Addresses for special values stored in to EEPROM */ 496 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ 497 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ 498 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ 499 500 #define EC_LAST_PROMFILE_ADDR 0x2f 501 502 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The 503 * can be up to 30 characters in length 504 * and is stored as a NULL-terminated 505 * ASCII string. Any unused bytes must be 506 * filled with zeros */ 507 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ 508 509 510 /* Most of this stuff is pretty self-evident. According to the hardware 511 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC 512 * offset problem. Weird. 513 */ 514 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ 515 EC_TRIM_CSN) 516 517 518 #define EC_DEFAULT_ADC_GAIN 0xC4C4 519 #define EC_DEFAULT_SPDIF0_SEL 0x0 520 #define EC_DEFAULT_SPDIF1_SEL 0x4 521 522 /************************************************************************** 523 * @func Clock bits into the Ecard's control latch. The Ecard uses a 524 * control latch will is loaded bit-serially by toggling the Modem control 525 * lines from function 2 on the E8010. This function hides these details 526 * and presents the illusion that we are actually writing to a distinct 527 * register. 528 */ 529 530 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value) 531 { 532 unsigned short count; 533 unsigned int data; 534 unsigned long hc_port; 535 unsigned int hc_value; 536 537 hc_port = emu->port + HCFG; 538 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); 539 outl(hc_value, hc_port); 540 541 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { 542 543 /* Set up the value */ 544 data = ((value & 0x1) ? PULSEN_BIT : 0); 545 value >>= 1; 546 547 outl(hc_value | data, hc_port); 548 549 /* Clock the shift register */ 550 outl(hc_value | data | HANDN_BIT, hc_port); 551 outl(hc_value | data, hc_port); 552 } 553 554 /* Latch the bits */ 555 outl(hc_value | HOOKN_BIT, hc_port); 556 outl(hc_value, hc_port); 557 } 558 559 /************************************************************************** 560 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The 561 * trim value consists of a 16bit value which is composed of two 562 * 8 bit gain/trim values, one for the left channel and one for the 563 * right channel. The following table maps from the Gain/Attenuation 564 * value in decibels into the corresponding bit pattern for a single 565 * channel. 566 */ 567 568 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu, 569 unsigned short gain) 570 { 571 unsigned int bit; 572 573 /* Enable writing to the TRIM registers */ 574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 575 576 /* Do it again to insure that we meet hold time requirements */ 577 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 578 579 for (bit = (1 << 15); bit; bit >>= 1) { 580 unsigned int value; 581 582 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); 583 584 if (gain & bit) 585 value |= EC_TRIM_SDATA; 586 587 /* Clock the bit */ 588 snd_emu10k1_ecard_write(emu, value); 589 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); 590 snd_emu10k1_ecard_write(emu, value); 591 } 592 593 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 594 } 595 596 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu) 597 { 598 unsigned int hc_value; 599 600 /* Set up the initial settings */ 601 emu->ecard_ctrl = EC_RAW_RUN_MODE | 602 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | 603 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); 604 605 /* Step 0: Set the codec type in the hardware control register 606 * and enable audio output */ 607 hc_value = inl(emu->port + HCFG); 608 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); 609 inl(emu->port + HCFG); 610 611 /* Step 1: Turn off the led and deassert TRIM_CS */ 612 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 613 614 /* Step 2: Calibrate the ADC and DAC */ 615 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); 616 617 /* Step 3: Wait for awhile; XXX We can't get away with this 618 * under a real operating system; we'll need to block and wait that 619 * way. */ 620 snd_emu10k1_wait(emu, 48000); 621 622 /* Step 4: Switch off the DAC and ADC calibration. Note 623 * That ADC_CAL is actually an inverted signal, so we assert 624 * it here to stop calibration. */ 625 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 626 627 /* Step 4: Switch into run mode */ 628 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 629 630 /* Step 5: Set the analog input gain */ 631 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); 632 633 return 0; 634 } 635 636 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu) 637 { 638 unsigned long special_port; 639 __always_unused unsigned int value; 640 641 /* Special initialisation routine 642 * before the rest of the IO-Ports become active. 643 */ 644 special_port = emu->port + 0x38; 645 value = inl(special_port); 646 outl(0x00d00000, special_port); 647 value = inl(special_port); 648 outl(0x00d00001, special_port); 649 value = inl(special_port); 650 outl(0x00d0005f, special_port); 651 value = inl(special_port); 652 outl(0x00d0007f, special_port); 653 value = inl(special_port); 654 outl(0x0090007f, special_port); 655 value = inl(special_port); 656 657 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ 658 /* Delay to give time for ADC chip to switch on. It needs 113ms */ 659 msleep(200); 660 return 0; 661 } 662 663 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu, 664 const struct firmware *fw_entry) 665 { 666 int n, i; 667 u16 reg; 668 u8 value; 669 __always_unused u16 write_post; 670 unsigned long flags; 671 672 if (!fw_entry) 673 return -EIO; 674 675 /* The FPGA is a Xilinx Spartan IIE XC2S50E */ 676 /* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */ 677 /* GPIO7 -> FPGA PGMN 678 * GPIO6 -> FPGA CCLK 679 * GPIO5 -> FPGA DIN 680 * FPGA CONFIG OFF -> FPGA PGMN 681 */ 682 spin_lock_irqsave(&emu->emu_lock, flags); 683 outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */ 684 write_post = inw(emu->port + A_GPIO); 685 udelay(100); 686 outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */ 687 write_post = inw(emu->port + A_GPIO); 688 udelay(100); /* Allow FPGA memory to clean */ 689 for (n = 0; n < fw_entry->size; n++) { 690 value = fw_entry->data[n]; 691 for (i = 0; i < 8; i++) { 692 reg = 0x80; 693 if (value & 0x1) 694 reg = reg | 0x20; 695 value = value >> 1; 696 outw(reg, emu->port + A_GPIO); 697 write_post = inw(emu->port + A_GPIO); 698 outw(reg | 0x40, emu->port + A_GPIO); 699 write_post = inw(emu->port + A_GPIO); 700 } 701 } 702 /* After programming, set GPIO bit 4 high again. */ 703 outw(0x10, emu->port + A_GPIO); 704 write_post = inw(emu->port + A_GPIO); 705 spin_unlock_irqrestore(&emu->emu_lock, flags); 706 707 return 0; 708 } 709 710 /* firmware file names, per model, init-fw and dock-fw (optional) */ 711 static const char * const firmware_names[5][2] = { 712 [EMU_MODEL_EMU1010] = { 713 HANA_FILENAME, DOCK_FILENAME 714 }, 715 [EMU_MODEL_EMU1010B] = { 716 EMU1010B_FILENAME, MICRO_DOCK_FILENAME 717 }, 718 [EMU_MODEL_EMU1616] = { 719 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME 720 }, 721 [EMU_MODEL_EMU0404] = { 722 EMU0404_FILENAME, NULL 723 }, 724 }; 725 726 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock, 727 const struct firmware **fw) 728 { 729 const char *filename; 730 int err; 731 732 if (!*fw) { 733 filename = firmware_names[emu->card_capabilities->emu_model][dock]; 734 if (!filename) 735 return 0; 736 err = request_firmware(fw, filename, &emu->pci->dev); 737 if (err) 738 return err; 739 } 740 741 return snd_emu1010_load_firmware_entry(emu, *fw); 742 } 743 744 static void emu1010_firmware_work(struct work_struct *work) 745 { 746 struct snd_emu10k1 *emu; 747 u32 tmp, tmp2, reg; 748 int err; 749 750 emu = container_of(work, struct snd_emu10k1, 751 emu1010.firmware_work); 752 if (emu->card->shutdown) 753 return; 754 #ifdef CONFIG_PM_SLEEP 755 if (emu->suspend) 756 return; 757 #endif 758 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */ 759 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) { 760 /* Audio Dock attached */ 761 /* Return to Audio Dock programming mode */ 762 dev_info(emu->card->dev, 763 "emu1010: Loading Audio Dock Firmware\n"); 764 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 765 EMU_HANA_FPGA_CONFIG_AUDIODOCK); 766 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw); 767 if (err < 0) 768 return; 769 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0); 770 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp); 771 dev_info(emu->card->dev, 772 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp); 773 if ((tmp & 0x1f) != 0x15) { 774 /* FPGA failed to be programmed */ 775 dev_info(emu->card->dev, 776 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", 777 tmp); 778 return; 779 } 780 dev_info(emu->card->dev, 781 "emu1010: Audio Dock Firmware loaded\n"); 782 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp); 783 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2); 784 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2); 785 /* Sync clocking between 1010 and Dock */ 786 /* Allow DLL to settle */ 787 msleep(10); 788 /* Unmute all. Default is muted after a firmware load */ 789 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 790 } 791 } 792 793 static void emu1010_interrupt(struct snd_emu10k1 *emu) 794 { 795 u32 sts; 796 797 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &sts); 798 if (sts & EMU_HANA_IRQ_DOCK_LOST) { 799 /* Audio Dock removed */ 800 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n"); 801 /* The hardware auto-mutes all, so we unmute again */ 802 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 803 } else if (sts & EMU_HANA_IRQ_DOCK) { 804 schedule_work(&emu->emu1010.firmware_work); 805 } 806 } 807 808 /* 809 * Current status of the driver: 810 * ---------------------------- 811 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) 812 * * PCM device nb. 2: 813 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops 814 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops 815 */ 816 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu) 817 { 818 u32 tmp, tmp2, reg; 819 int err; 820 821 dev_info(emu->card->dev, "emu1010: Special config.\n"); 822 823 /* Mute, and disable audio and lock cache, just in case. 824 * Proper init follows in snd_emu10k1_init(). */ 825 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG); 826 827 /* Disable 48Volt power to Audio Dock */ 828 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 829 830 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ 831 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 832 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg); 833 if ((reg & 0x3f) == 0x15) { 834 /* FPGA netlist already present so clear it */ 835 /* Return to programming mode */ 836 837 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA); 838 } 839 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 840 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg); 841 if ((reg & 0x3f) == 0x15) { 842 /* FPGA failed to return to programming mode */ 843 dev_info(emu->card->dev, 844 "emu1010: FPGA failed to return to programming mode\n"); 845 return -ENODEV; 846 } 847 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg); 848 849 err = snd_emu1010_load_firmware(emu, 0, &emu->firmware); 850 if (err < 0) { 851 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n"); 852 return err; 853 } 854 855 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 856 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 857 if ((reg & 0x3f) != 0x15) { 858 /* FPGA failed to be programmed */ 859 dev_info(emu->card->dev, 860 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", 861 reg); 862 return -ENODEV; 863 } 864 865 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n"); 866 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp); 867 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2); 868 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2); 869 /* Enable 48Volt power to Audio Dock */ 870 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON); 871 872 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 873 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg); 874 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) 875 schedule_work(&emu->emu1010.firmware_work); 876 if (emu->card_capabilities->no_adat) { 877 emu->emu1010.optical_in = 0; /* IN_SPDIF */ 878 emu->emu1010.optical_out = 0; /* OUT_SPDIF */ 879 } else { 880 /* Optical -> ADAT I/O */ 881 emu->emu1010.optical_in = 1; /* IN_ADAT */ 882 emu->emu1010.optical_out = 1; /* OUT_ADAT */ 883 } 884 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) | 885 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF); 886 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 887 /* Set no attenuation on Audio Dock pads. */ 888 emu->emu1010.adc_pads = 0x00; 889 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads); 890 /* Unmute Audio dock DACs, Headphone source DAC-4. */ 891 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4); 892 /* DAC PADs. */ 893 emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 | 894 EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4; 895 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads); 896 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ 897 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID); 898 /* MIDI routing */ 899 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2); 900 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2); 901 902 emu->gpio_interrupt = emu1010_interrupt; 903 // Note: The Audigy INTE is set later 904 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 905 EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST); 906 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®); // Clear pending IRQs 907 908 emu->emu1010.clock_source = 1; /* 48000 */ 909 emu->emu1010.clock_fallback = 1; /* 48000 */ 910 /* Default WCLK set to 48kHz. */ 911 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K); 912 /* Word Clock source, Internal 48kHz x1 */ 913 emu->emu1010.wclock = EMU_HANA_WCLOCK_INT_48K; 914 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 915 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 916 snd_emu1010_update_clock(emu); 917 918 // The routes are all set to EMU_SRC_SILENCE due to the reset, 919 // so it is safe to simply enable the outputs. 920 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 921 922 return 0; 923 } 924 /* 925 * Create the EMU10K1 instance 926 */ 927 928 #ifdef CONFIG_PM_SLEEP 929 static int alloc_pm_buffer(struct snd_emu10k1 *emu); 930 static void free_pm_buffer(struct snd_emu10k1 *emu); 931 #endif 932 933 static void snd_emu10k1_free(struct snd_card *card) 934 { 935 struct snd_emu10k1 *emu = card->private_data; 936 937 if (emu->port) { /* avoid access to already used hardware */ 938 snd_emu10k1_fx8010_tram_setup(emu, 0); 939 snd_emu10k1_done(emu); 940 snd_emu10k1_free_efx(emu); 941 } 942 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) { 943 /* Disable 48Volt power to Audio Dock */ 944 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 945 } 946 cancel_work_sync(&emu->emu1010.firmware_work); 947 release_firmware(emu->firmware); 948 release_firmware(emu->dock_fw); 949 snd_util_memhdr_free(emu->memhdr); 950 if (emu->silent_page.area) 951 snd_dma_free_pages(&emu->silent_page); 952 if (emu->ptb_pages.area) 953 snd_dma_free_pages(&emu->ptb_pages); 954 vfree(emu->page_ptr_table); 955 vfree(emu->page_addr_table); 956 #ifdef CONFIG_PM_SLEEP 957 free_pm_buffer(emu); 958 #endif 959 } 960 961 static const struct snd_emu_chip_details emu_chip_details[] = { 962 /* Audigy 5/Rx SB1550 */ 963 /* Tested by michael@gernoth.net 28 Mar 2015 */ 964 /* DSP: CA10300-IAT LF 965 * DAC: Cirrus Logic CS4382-KQZ 966 * ADC: Philips 1361T 967 * AC97: Sigmatel STAC9750 968 * CA0151: None 969 */ 970 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102, 971 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]", 972 .id = "Audigy2", 973 .emu10k2_chip = 1, 974 .ca0108_chip = 1, 975 .spk71 = 1, 976 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 977 .ac97_chip = 1}, 978 /* Audigy4 (Not PRO) SB0610 */ 979 /* Tested by James@superbug.co.uk 4th April 2006 */ 980 /* A_IOCFG bits 981 * Output 982 * 0: ? 983 * 1: ? 984 * 2: ? 985 * 3: 0 - Digital Out, 1 - Line in 986 * 4: ? 987 * 5: ? 988 * 6: ? 989 * 7: ? 990 * Input 991 * 8: ? 992 * 9: ? 993 * A: Green jack sense (Front) 994 * B: ? 995 * C: Black jack sense (Rear/Side Right) 996 * D: Yellow jack sense (Center/LFE/Side Left) 997 * E: ? 998 * F: ? 999 * 1000 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) 1001 * 0 - Digital Out 1002 * 1 - Line in 1003 */ 1004 /* Mic input not tested. 1005 * Analog CD input not tested 1006 * Digital Out not tested. 1007 * Line in working. 1008 * Audio output 5.1 working. Side outputs not working. 1009 */ 1010 /* DSP: CA10300-IAT LF 1011 * DAC: Cirrus Logic CS4382-KQZ 1012 * ADC: Philips 1361T 1013 * AC97: Sigmatel STAC9750 1014 * CA0151: None 1015 */ 1016 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, 1017 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]", 1018 .id = "Audigy2", 1019 .emu10k2_chip = 1, 1020 .ca0108_chip = 1, 1021 .spk71 = 1, 1022 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1023 .ac97_chip = 1} , 1024 /* Audigy 2 Value AC3 out does not work yet. 1025 * Need to find out how to turn off interpolators. 1026 */ 1027 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1028 /* DSP: CA0108-IAT 1029 * DAC: CS4382-KQ 1030 * ADC: Philips 1361T 1031 * AC97: STAC9750 1032 * CA0151: None 1033 */ 1034 /* 1035 * A_IOCFG Input (GPIO) 1036 * 0x400 = Front analog jack plugged in. (Green socket) 1037 * 0x1000 = Rear analog jack plugged in. (Black socket) 1038 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket) 1039 * A_IOCFG Output (GPIO) 1040 * 0x60 = Sound out of front Left. 1041 * Win sets it to 0xXX61 1042 */ 1043 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, 1044 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]", 1045 .id = "Audigy2", 1046 .emu10k2_chip = 1, 1047 .ca0108_chip = 1, 1048 .spk71 = 1, 1049 .ac97_chip = 1} , 1050 /* Audigy 2 ZS Notebook Cardbus card.*/ 1051 /* Tested by James@superbug.co.uk 6th November 2006 */ 1052 /* Audio output 7.1/Headphones working. 1053 * Digital output working. (AC3 not checked, only PCM) 1054 * Audio Mic/Line inputs working. 1055 * Digital input not tested. 1056 */ 1057 /* DSP: Tina2 1058 * DAC: Wolfson WM8768/WM8568 1059 * ADC: Wolfson WM8775 1060 * AC97: None 1061 * CA0151: None 1062 */ 1063 /* Tested by James@superbug.co.uk 4th April 2006 */ 1064 /* A_IOCFG bits 1065 * Output 1066 * 0: Not Used 1067 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. 1068 * 2: Analog input 0 = line in, 1 = mic in 1069 * 3: Not Used 1070 * 4: Digital output 0 = off, 1 = on. 1071 * 5: Not Used 1072 * 6: Not Used 1073 * 7: Not Used 1074 * Input 1075 * All bits 1 (0x3fxx) means nothing plugged in. 1076 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. 1077 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. 1078 * C-D: 2 = Front/Rear/etc, 3 = nothing. 1079 * E-F: Always 0 1080 * 1081 */ 1082 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, 1083 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]", 1084 .id = "Audigy2", 1085 .emu10k2_chip = 1, 1086 .ca0108_chip = 1, 1087 .ca_cardbus_chip = 1, 1088 .spi_dac = 1, 1089 .i2c_adc = 1, 1090 .spk71 = 1} , 1091 /* This is MAEM8950 "Mana" */ 1092 /* Attach MicroDock[M] to make it an E-MU 1616[m]. */ 1093 /* Does NOT support sync daughter card (obviously). */ 1094 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1095 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, 1096 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]", 1097 .id = "EMU1010", 1098 .emu10k2_chip = 1, 1099 .ca0108_chip = 1, 1100 .ca_cardbus_chip = 1, 1101 .spk71 = 1 , 1102 .emu_model = EMU_MODEL_EMU1616}, 1103 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1104 /* This is MAEM8960 "Hana3", 0202 is MAEM8980 */ 1105 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1106 * MicroDock[M] to make it an E-MU 1616[m]. */ 1107 /* Does NOT support sync daughter card. */ 1108 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, 1109 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]", 1110 .id = "EMU1010", 1111 .emu10k2_chip = 1, 1112 .ca0108_chip = 1, 1113 .spk71 = 1, 1114 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */ 1115 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */ 1116 /* This is MAEM8986, 0202 is MAEM8980 */ 1117 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1118 * MicroDockM to make it an E-MU 1616m. The non-m 1119 * version was never sold with this card, but should 1120 * still work. */ 1121 /* Does NOT support sync daughter card. */ 1122 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102, 1123 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]", 1124 .id = "EMU1010", 1125 .emu10k2_chip = 1, 1126 .ca0108_chip = 1, 1127 .spk71 = 1, 1128 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */ 1129 /* Tested by James@superbug.co.uk 8th July 2005. */ 1130 /* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */ 1131 /* Attach 0202 daughter card to make it an E-MU 1212m, OR an 1132 * AudioDock[M] to make it an E-MU 1820[m]. */ 1133 /* Supports sync daughter card. */ 1134 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, 1135 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]", 1136 .id = "EMU1010", 1137 .emu10k2_chip = 1, 1138 .ca0102_chip = 1, 1139 .spk71 = 1, 1140 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */ 1141 /* This is MAEM8852 "HanaLiteLite" */ 1142 /* Supports sync daughter card. */ 1143 /* Tested by oswald.buddenhagen@gmx.de Mar 2023. */ 1144 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102, 1145 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]", 1146 .id = "EMU0404", 1147 .emu10k2_chip = 1, 1148 .ca0108_chip = 1, 1149 .spk20 = 1, 1150 .no_adat = 1, 1151 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */ 1152 /* This is MAEM8850 "HanaLite" */ 1153 /* Supports sync daughter card. */ 1154 /* Tested by James@superbug.co.uk 20-3-2007. */ 1155 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102, 1156 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]", 1157 .id = "EMU0404", 1158 .emu10k2_chip = 1, 1159 .ca0102_chip = 1, 1160 .spk20 = 1, 1161 .no_adat = 1, 1162 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */ 1163 /* EMU0404 PCIe */ 1164 /* Does NOT support sync daughter card. */ 1165 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102, 1166 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]", 1167 .id = "EMU0404", 1168 .emu10k2_chip = 1, 1169 .ca0108_chip = 1, 1170 .spk20 = 1, 1171 .no_adat = 1, 1172 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */ 1173 {.vendor = 0x1102, .device = 0x0008, 1174 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]", 1175 .id = "Audigy2", 1176 .emu10k2_chip = 1, 1177 .ca0108_chip = 1, 1178 .ac97_chip = 1} , 1179 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1180 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, 1181 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]", 1182 .id = "Audigy2", 1183 .emu10k2_chip = 1, 1184 .ca0102_chip = 1, 1185 .ca0151_chip = 1, 1186 .spk71 = 1, 1187 .spdif_bug = 1, 1188 .ac97_chip = 1} , 1189 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ 1190 /* The 0x20061102 does have SB0350 written on it 1191 * Just like 0x20021102 1192 */ 1193 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, 1194 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]", 1195 .id = "Audigy2", 1196 .emu10k2_chip = 1, 1197 .ca0102_chip = 1, 1198 .ca0151_chip = 1, 1199 .spk71 = 1, 1200 .spdif_bug = 1, 1201 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1202 .ac97_chip = 1} , 1203 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by 1204 Creative's Windows driver */ 1205 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102, 1206 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]", 1207 .id = "Audigy2", 1208 .emu10k2_chip = 1, 1209 .ca0102_chip = 1, 1210 .ca0151_chip = 1, 1211 .spk71 = 1, 1212 .spdif_bug = 1, 1213 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1214 .ac97_chip = 1} , 1215 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, 1216 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]", 1217 .id = "Audigy2", 1218 .emu10k2_chip = 1, 1219 .ca0102_chip = 1, 1220 .ca0151_chip = 1, 1221 .spk71 = 1, 1222 .spdif_bug = 1, 1223 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1224 .ac97_chip = 1} , 1225 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, 1226 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]", 1227 .id = "Audigy2", 1228 .emu10k2_chip = 1, 1229 .ca0102_chip = 1, 1230 .ca0151_chip = 1, 1231 .spk71 = 1, 1232 .spdif_bug = 1, 1233 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1234 .ac97_chip = 1} , 1235 /* Audigy 2 */ 1236 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1237 /* DSP: CA0102-IAT 1238 * DAC: CS4382-KQ 1239 * ADC: Philips 1361T 1240 * AC97: STAC9721 1241 * CA0151: Yes 1242 */ 1243 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, 1244 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]", 1245 .id = "Audigy2", 1246 .emu10k2_chip = 1, 1247 .ca0102_chip = 1, 1248 .ca0151_chip = 1, 1249 .spk71 = 1, 1250 .spdif_bug = 1, 1251 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1252 .ac97_chip = 1} , 1253 /* Audigy 2 Platinum EX */ 1254 /* Win driver sets A_IOCFG output to 0x1c00 */ 1255 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, 1256 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]", 1257 .id = "Audigy2", 1258 .emu10k2_chip = 1, 1259 .ca0102_chip = 1, 1260 .ca0151_chip = 1, 1261 .spk71 = 1, 1262 .spdif_bug = 1} , 1263 /* Dell OEM/Creative Labs Audigy 2 ZS */ 1264 /* See ALSA bug#1365 */ 1265 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, 1266 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]", 1267 .id = "Audigy2", 1268 .emu10k2_chip = 1, 1269 .ca0102_chip = 1, 1270 .ca0151_chip = 1, 1271 .spk71 = 1, 1272 .spdif_bug = 1, 1273 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1274 .ac97_chip = 1} , 1275 /* Audigy 2 Platinum */ 1276 /* Win driver sets A_IOCFG output to 0xa00 */ 1277 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, 1278 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]", 1279 .id = "Audigy2", 1280 .emu10k2_chip = 1, 1281 .ca0102_chip = 1, 1282 .ca0151_chip = 1, 1283 .spk71 = 1, 1284 .spdif_bug = 1, 1285 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1286 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ 1287 .ac97_chip = 1} , 1288 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, 1289 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]", 1290 .id = "Audigy2", 1291 .emu10k2_chip = 1, 1292 .ca0102_chip = 1, 1293 .ca0151_chip = 1, 1294 .spdif_bug = 1, 1295 .ac97_chip = 1} , 1296 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, 1297 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]", 1298 .id = "Audigy", 1299 .emu10k2_chip = 1, 1300 .ca0102_chip = 1, 1301 .ac97_chip = 1} , 1302 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, 1303 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]", 1304 .id = "Audigy", 1305 .emu10k2_chip = 1, 1306 .ca0102_chip = 1, 1307 .spdif_bug = 1, 1308 .ac97_chip = 1} , 1309 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, 1310 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]", 1311 .id = "Audigy", 1312 .emu10k2_chip = 1, 1313 .ca0102_chip = 1, 1314 .ac97_chip = 1} , 1315 {.vendor = 0x1102, .device = 0x0004, 1316 .driver = "Audigy", .name = "Audigy 1 [Unknown]", 1317 .id = "Audigy", 1318 .emu10k2_chip = 1, 1319 .ca0102_chip = 1, 1320 .ac97_chip = 1} , 1321 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, 1322 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1323 .id = "Live", 1324 .emu10k1_chip = 1, 1325 .ac97_chip = 1, 1326 .sblive51 = 1} , 1327 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102, 1328 .driver = "EMU10K1", .name = "SB Live! [SB0105]", 1329 .id = "Live", 1330 .emu10k1_chip = 1, 1331 .ac97_chip = 1, 1332 .sblive51 = 1} , 1333 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102, 1334 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]", 1335 .id = "Live", 1336 .emu10k1_chip = 1, 1337 .ac97_chip = 1, 1338 .sblive51 = 1} , 1339 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, 1340 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]", 1341 .id = "Live", 1342 .emu10k1_chip = 1, 1343 .ac97_chip = 1, 1344 .sblive51 = 1} , 1345 /* Tested by ALSA bug#1680 26th December 2005 */ 1346 /* note: It really has SB0220 written on the card, */ 1347 /* but it's SB0228 according to kx.inf */ 1348 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, 1349 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]", 1350 .id = "Live", 1351 .emu10k1_chip = 1, 1352 .ac97_chip = 1, 1353 .sblive51 = 1} , 1354 /* Tested by Thomas Zehetbauer 27th Aug 2005 */ 1355 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, 1356 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1357 .id = "Live", 1358 .emu10k1_chip = 1, 1359 .ac97_chip = 1, 1360 .sblive51 = 1} , 1361 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, 1362 .driver = "EMU10K1", .name = "SB Live! 5.1", 1363 .id = "Live", 1364 .emu10k1_chip = 1, 1365 .ac97_chip = 1, 1366 .sblive51 = 1} , 1367 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ 1368 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, 1369 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]", 1370 .id = "Live", 1371 .emu10k1_chip = 1, 1372 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum 1373 * share the same IDs! 1374 */ 1375 .sblive51 = 1} , 1376 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, 1377 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]", 1378 .id = "Live", 1379 .emu10k1_chip = 1, 1380 .ac97_chip = 1, 1381 .sblive51 = 1} , 1382 /* SB Live! Platinum */ 1383 /* Win driver sets A_IOCFG output to 0 */ 1384 /* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */ 1385 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, 1386 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]", 1387 .id = "Live", 1388 .emu10k1_chip = 1, 1389 .ac97_chip = 1} , 1390 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, 1391 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]", 1392 .id = "Live", 1393 .emu10k1_chip = 1, 1394 .ac97_chip = 1, 1395 .sblive51 = 1} , 1396 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, 1397 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]", 1398 .id = "Live", 1399 .emu10k1_chip = 1, 1400 .ac97_chip = 1, 1401 .sblive51 = 1} , 1402 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, 1403 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]", 1404 .id = "Live", 1405 .emu10k1_chip = 1, 1406 .ac97_chip = 1, 1407 .sblive51 = 1} , 1408 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1409 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, 1410 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]", 1411 .id = "Live", 1412 .emu10k1_chip = 1, 1413 .ac97_chip = 1, 1414 .sblive51 = 1} , 1415 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, 1416 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]", 1417 .id = "Live", 1418 .emu10k1_chip = 1, 1419 .ac97_chip = 1, 1420 .sblive51 = 1} , 1421 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, 1422 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", 1423 .id = "Live", 1424 .emu10k1_chip = 1, 1425 .ac97_chip = 1, 1426 .sblive51 = 1} , 1427 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, 1428 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]", 1429 .id = "Live", 1430 .emu10k1_chip = 1, 1431 .ac97_chip = 1, 1432 .sblive51 = 1} , 1433 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, 1434 .driver = "EMU10K1", .name = "E-MU APS [PC545]", 1435 .id = "APS", 1436 .emu10k1_chip = 1, 1437 .ecard = 1} , 1438 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, 1439 .driver = "EMU10K1", .name = "SB Live! [CT4620]", 1440 .id = "Live", 1441 .emu10k1_chip = 1, 1442 .ac97_chip = 1, 1443 .sblive51 = 1} , 1444 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, 1445 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]", 1446 .id = "Live", 1447 .emu10k1_chip = 1, 1448 .ac97_chip = 1, 1449 .sblive51 = 1} , 1450 {.vendor = 0x1102, .device = 0x0002, 1451 .driver = "EMU10K1", .name = "SB Live! [Unknown]", 1452 .id = "Live", 1453 .emu10k1_chip = 1, 1454 .ac97_chip = 1, 1455 .sblive51 = 1} , 1456 { } /* terminator */ 1457 }; 1458 1459 /* 1460 * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too) 1461 * has a problem that from time to time it likes to do few DMA reads a bit 1462 * beyond its normal allocation and gets very confused if these reads get 1463 * blocked by a IOMMU. 1464 * 1465 * This behaviour has been observed for the first (reserved) page 1466 * (for which it happens multiple times at every playback), often for various 1467 * synth pages and sometimes for PCM playback buffers and the page table 1468 * memory itself. 1469 * 1470 * As a workaround let's widen these DMA allocations by an extra page if we 1471 * detect that the device is behind a non-passthrough IOMMU. 1472 */ 1473 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu) 1474 { 1475 struct iommu_domain *domain; 1476 1477 emu->iommu_workaround = false; 1478 1479 domain = iommu_get_domain_for_dev(emu->card->dev); 1480 if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY) 1481 return; 1482 1483 dev_notice(emu->card->dev, 1484 "non-passthrough IOMMU detected, widening DMA allocations"); 1485 emu->iommu_workaround = true; 1486 } 1487 1488 int snd_emu10k1_create(struct snd_card *card, 1489 struct pci_dev *pci, 1490 unsigned short extin_mask, 1491 unsigned short extout_mask, 1492 long max_cache_bytes, 1493 int enable_ir, 1494 uint subsystem) 1495 { 1496 struct snd_emu10k1 *emu = card->private_data; 1497 int idx, err; 1498 int is_audigy; 1499 size_t page_table_size; 1500 __le32 *pgtbl; 1501 unsigned int silent_page; 1502 const struct snd_emu_chip_details *c; 1503 1504 /* enable PCI device */ 1505 err = pcim_enable_device(pci); 1506 if (err < 0) 1507 return err; 1508 1509 card->private_free = snd_emu10k1_free; 1510 emu->card = card; 1511 spin_lock_init(&emu->reg_lock); 1512 spin_lock_init(&emu->emu_lock); 1513 spin_lock_init(&emu->spi_lock); 1514 spin_lock_init(&emu->i2c_lock); 1515 spin_lock_init(&emu->voice_lock); 1516 spin_lock_init(&emu->synth_lock); 1517 spin_lock_init(&emu->memblk_lock); 1518 mutex_init(&emu->fx8010.lock); 1519 INIT_LIST_HEAD(&emu->mapped_link_head); 1520 INIT_LIST_HEAD(&emu->mapped_order_link_head); 1521 emu->pci = pci; 1522 emu->irq = -1; 1523 emu->synth = NULL; 1524 emu->get_synth_voice = NULL; 1525 INIT_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work); 1526 /* read revision & serial */ 1527 emu->revision = pci->revision; 1528 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); 1529 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); 1530 dev_dbg(card->dev, 1531 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", 1532 pci->vendor, pci->device, emu->serial, emu->model); 1533 1534 for (c = emu_chip_details; c->vendor; c++) { 1535 if (c->vendor == pci->vendor && c->device == pci->device) { 1536 if (subsystem) { 1537 if (c->subsystem && (c->subsystem == subsystem)) 1538 break; 1539 else 1540 continue; 1541 } else { 1542 if (c->subsystem && (c->subsystem != emu->serial)) 1543 continue; 1544 if (c->revision && c->revision != emu->revision) 1545 continue; 1546 } 1547 break; 1548 } 1549 } 1550 if (c->vendor == 0) { 1551 dev_err(card->dev, "emu10k1: Card not recognised\n"); 1552 return -ENOENT; 1553 } 1554 emu->card_capabilities = c; 1555 if (c->subsystem && !subsystem) 1556 dev_dbg(card->dev, "Sound card name = %s\n", c->name); 1557 else if (subsystem) 1558 dev_dbg(card->dev, "Sound card name = %s, " 1559 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. " 1560 "Forced to subsystem = 0x%x\n", c->name, 1561 pci->vendor, pci->device, emu->serial, c->subsystem); 1562 else 1563 dev_dbg(card->dev, "Sound card name = %s, " 1564 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n", 1565 c->name, pci->vendor, pci->device, 1566 emu->serial); 1567 1568 if (!*card->id && c->id) 1569 strscpy(card->id, c->id, sizeof(card->id)); 1570 1571 is_audigy = emu->audigy = c->emu10k2_chip; 1572 1573 snd_emu10k1_detect_iommu(emu); 1574 1575 /* set addressing mode */ 1576 emu->address_mode = is_audigy ? 0 : 1; 1577 /* set the DMA transfer mask */ 1578 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK; 1579 if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) { 1580 dev_err(card->dev, 1581 "architecture does not support PCI busmaster DMA with mask 0x%lx\n", 1582 emu->dma_mask); 1583 return -ENXIO; 1584 } 1585 if (is_audigy) 1586 emu->gpr_base = A_FXGPREGBASE; 1587 else 1588 emu->gpr_base = FXGPREGBASE; 1589 1590 err = pci_request_regions(pci, "EMU10K1"); 1591 if (err < 0) 1592 return err; 1593 emu->port = pci_resource_start(pci, 0); 1594 1595 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; 1596 1597 page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 : 1598 MAXPAGES0); 1599 if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size, 1600 &emu->ptb_pages) < 0) 1601 return -ENOMEM; 1602 dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n", 1603 (unsigned long)emu->ptb_pages.addr, 1604 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes)); 1605 1606 emu->page_ptr_table = vmalloc(array_size(sizeof(void *), 1607 emu->max_cache_pages)); 1608 emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long), 1609 emu->max_cache_pages)); 1610 if (!emu->page_ptr_table || !emu->page_addr_table) 1611 return -ENOMEM; 1612 1613 if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE, 1614 &emu->silent_page) < 0) 1615 return -ENOMEM; 1616 dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n", 1617 (unsigned long)emu->silent_page.addr, 1618 (unsigned long)(emu->silent_page.addr + 1619 emu->silent_page.bytes)); 1620 1621 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); 1622 if (!emu->memhdr) 1623 return -ENOMEM; 1624 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - 1625 sizeof(struct snd_util_memblk); 1626 1627 pci_set_master(pci); 1628 1629 // The masks are not used for Audigy. 1630 // FIXME: these should come from the card_capabilites table. 1631 if (extin_mask == 0) 1632 extin_mask = 0x3fcf; // EXTIN_* 1633 if (extout_mask == 0) 1634 extout_mask = 0x7fff; // EXTOUT_* 1635 emu->fx8010.extin_mask = extin_mask; 1636 emu->fx8010.extout_mask = extout_mask; 1637 emu->enable_ir = enable_ir; 1638 1639 if (emu->card_capabilities->ca_cardbus_chip) { 1640 err = snd_emu10k1_cardbus_init(emu); 1641 if (err < 0) 1642 return err; 1643 } 1644 if (emu->card_capabilities->ecard) { 1645 err = snd_emu10k1_ecard_init(emu); 1646 if (err < 0) 1647 return err; 1648 } else if (emu->card_capabilities->emu_model) { 1649 err = snd_emu10k1_emu1010_init(emu); 1650 if (err < 0) 1651 return err; 1652 } else { 1653 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version 1654 does not support this, it shouldn't do any harm */ 1655 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, 1656 AC97SLOT_CNTR|AC97SLOT_LFE); 1657 } 1658 1659 /* initialize TRAM setup */ 1660 emu->fx8010.itram_size = (16 * 1024)/2; 1661 emu->fx8010.etram_pages.area = NULL; 1662 emu->fx8010.etram_pages.bytes = 0; 1663 1664 /* irq handler must be registered after I/O ports are activated */ 1665 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt, 1666 IRQF_SHARED, KBUILD_MODNAME, emu)) 1667 return -EBUSY; 1668 emu->irq = pci->irq; 1669 card->sync_irq = emu->irq; 1670 1671 /* 1672 * Init to 0x02109204 : 1673 * Clock accuracy = 0 (1000ppm) 1674 * Sample Rate = 2 (48kHz) 1675 * Audio Channel = 1 (Left of 2) 1676 * Source Number = 0 (Unspecified) 1677 * Generation Status = 1 (Original for Cat Code 12) 1678 * Cat Code = 12 (Digital Signal Mixer) 1679 * Mode = 0 (Mode 0) 1680 * Emphasis = 0 (None) 1681 * CP = 1 (Copyright unasserted) 1682 * AN = 0 (Audio data) 1683 * P = 0 (Consumer) 1684 */ 1685 emu->spdif_bits[0] = emu->spdif_bits[1] = 1686 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1687 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1688 SPCS_GENERATIONSTATUS | 0x00001200 | 1689 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1690 1691 /* Clear silent pages and set up pointers */ 1692 memset(emu->silent_page.area, 0, emu->silent_page.bytes); 1693 silent_page = emu->silent_page.addr << emu->address_mode; 1694 pgtbl = (__le32 *)emu->ptb_pages.area; 1695 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++) 1696 pgtbl[idx] = cpu_to_le32(silent_page | idx); 1697 1698 /* set up voice indices */ 1699 for (idx = 0; idx < NUM_G; idx++) 1700 emu->voices[idx].number = idx; 1701 1702 err = snd_emu10k1_init(emu, enable_ir); 1703 if (err < 0) 1704 return err; 1705 #ifdef CONFIG_PM_SLEEP 1706 err = alloc_pm_buffer(emu); 1707 if (err < 0) 1708 return err; 1709 #endif 1710 1711 /* Initialize the effect engine */ 1712 err = snd_emu10k1_init_efx(emu); 1713 if (err < 0) 1714 return err; 1715 snd_emu10k1_audio_enable(emu); 1716 1717 #ifdef CONFIG_SND_PROC_FS 1718 snd_emu10k1_proc_init(emu); 1719 #endif 1720 return 0; 1721 } 1722 1723 #ifdef CONFIG_PM_SLEEP 1724 static const unsigned char saved_regs[] = { 1725 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, 1726 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, 1727 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, 1728 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, 1729 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, 1730 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, 1731 0xff /* end */ 1732 }; 1733 static const unsigned char saved_regs_audigy[] = { 1734 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC, 1735 A_FXRT2, A_SENDAMOUNTS, A_FXRT1, 1736 0xff /* end */ 1737 }; 1738 1739 static int alloc_pm_buffer(struct snd_emu10k1 *emu) 1740 { 1741 int size; 1742 1743 size = ARRAY_SIZE(saved_regs); 1744 if (emu->audigy) 1745 size += ARRAY_SIZE(saved_regs_audigy); 1746 emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size)); 1747 if (!emu->saved_ptr) 1748 return -ENOMEM; 1749 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) 1750 return -ENOMEM; 1751 if (emu->card_capabilities->ca0151_chip && 1752 snd_p16v_alloc_pm_buffer(emu) < 0) 1753 return -ENOMEM; 1754 return 0; 1755 } 1756 1757 static void free_pm_buffer(struct snd_emu10k1 *emu) 1758 { 1759 vfree(emu->saved_ptr); 1760 snd_emu10k1_efx_free_pm_buffer(emu); 1761 if (emu->card_capabilities->ca0151_chip) 1762 snd_p16v_free_pm_buffer(emu); 1763 } 1764 1765 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) 1766 { 1767 int i; 1768 const unsigned char *reg; 1769 unsigned int *val; 1770 1771 val = emu->saved_ptr; 1772 for (reg = saved_regs; *reg != 0xff; reg++) 1773 for (i = 0; i < NUM_G; i++, val++) 1774 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1775 if (emu->audigy) { 1776 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1777 for (i = 0; i < NUM_G; i++, val++) 1778 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1779 } 1780 if (emu->audigy) 1781 emu->saved_a_iocfg = inw(emu->port + A_IOCFG); 1782 emu->saved_hcfg = inl(emu->port + HCFG); 1783 } 1784 1785 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) 1786 { 1787 if (emu->card_capabilities->ca_cardbus_chip) 1788 snd_emu10k1_cardbus_init(emu); 1789 if (emu->card_capabilities->ecard) 1790 snd_emu10k1_ecard_init(emu); 1791 else if (emu->card_capabilities->emu_model) 1792 snd_emu10k1_emu1010_init(emu); 1793 else 1794 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); 1795 snd_emu10k1_init(emu, emu->enable_ir); 1796 } 1797 1798 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) 1799 { 1800 int i; 1801 const unsigned char *reg; 1802 unsigned int *val; 1803 1804 snd_emu10k1_audio_enable(emu); 1805 1806 /* resore for spdif */ 1807 if (emu->audigy) 1808 outw(emu->saved_a_iocfg, emu->port + A_IOCFG); 1809 outl(emu->saved_hcfg, emu->port + HCFG); 1810 1811 val = emu->saved_ptr; 1812 for (reg = saved_regs; *reg != 0xff; reg++) 1813 for (i = 0; i < NUM_G; i++, val++) 1814 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1815 if (emu->audigy) { 1816 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1817 for (i = 0; i < NUM_G; i++, val++) 1818 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1819 } 1820 } 1821 #endif 1822