xref: /linux/sound/pci/emu10k1/emu10k1_main.c (revision 33e02dc69afbd8f1b85a51d74d72f139ba4ca623)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4  *                   James Courtier-Dutton <James@superbug.co.uk>
5  *                   Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
6  *                   Creative Labs, Inc.
7  *
8  *  Routines for control of EMU10K1 chips
9  */
10 
11 #include <linux/sched.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/interrupt.h>
16 #include <linux/iommu.h>
17 #include <linux/pci.h>
18 #include <linux/slab.h>
19 #include <linux/vmalloc.h>
20 #include <linux/mutex.h>
21 
22 
23 #include <sound/core.h>
24 #include <sound/emu10k1.h>
25 #include <linux/firmware.h>
26 #include "p16v.h"
27 #include "tina2.h"
28 #include "p17v.h"
29 
30 
31 #define HANA_FILENAME "emu/hana.fw"
32 #define DOCK_FILENAME "emu/audio_dock.fw"
33 #define EMU1010B_FILENAME "emu/emu1010b.fw"
34 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
35 #define EMU0404_FILENAME "emu/emu0404.fw"
36 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
37 
38 MODULE_FIRMWARE(HANA_FILENAME);
39 MODULE_FIRMWARE(DOCK_FILENAME);
40 MODULE_FIRMWARE(EMU1010B_FILENAME);
41 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
42 MODULE_FIRMWARE(EMU0404_FILENAME);
43 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
44 
45 
46 /*************************************************************************
47  * EMU10K1 init / done
48  *************************************************************************/
49 
snd_emu10k1_voice_init(struct snd_emu10k1 * emu,int ch)50 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
51 {
52 	snd_emu10k1_ptr_write_multiple(emu, ch,
53 		DCYSUSV, 0,
54 		VTFT, VTFT_FILTERTARGET_MASK,
55 		CVCF, CVCF_CURRENTFILTER_MASK,
56 		PTRX, 0,
57 		CPF, 0,
58 		CCR, 0,
59 
60 		PSST, 0,
61 		DSL, 0x10,
62 		CCCA, 0,
63 		Z1, 0,
64 		Z2, 0,
65 		FXRT, 0x32100000,
66 
67 		// The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero
68 		DCYSUSM, 0,
69 		ATKHLDV, 0,
70 		ATKHLDM, 0,
71 		IP, 0,
72 		IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK,
73 		PEFE, 0,
74 		FMMOD, 0,
75 		TREMFRQ, 24,	/* 1 Hz */
76 		FM2FRQ2, 24,	/* 1 Hz */
77 		LFOVAL2, 0,
78 		LFOVAL1, 0,
79 		ENVVOL, 0,
80 		ENVVAL, 0,
81 
82 		REGLIST_END);
83 
84 	/* Audigy extra stuffs */
85 	if (emu->audigy) {
86 		snd_emu10k1_ptr_write_multiple(emu, ch,
87 			A_CSBA, 0,
88 			A_CSDC, 0,
89 			A_CSFE, 0,
90 			A_CSHG, 0,
91 			A_FXRT1, 0x03020100,
92 			A_FXRT2, 0x07060504,
93 			A_SENDAMOUNTS, 0,
94 			REGLIST_END);
95 	}
96 }
97 
98 static const unsigned int spi_dac_init[] = {
99 		0x00ff,
100 		0x02ff,
101 		0x0400,
102 		0x0520,
103 		0x0600,
104 		0x08ff,
105 		0x0aff,
106 		0x0cff,
107 		0x0eff,
108 		0x10ff,
109 		0x1200,
110 		0x1400,
111 		0x1480,
112 		0x1800,
113 		0x1aff,
114 		0x1cff,
115 		0x1e00,
116 		0x0530,
117 		0x0602,
118 		0x0622,
119 		0x1400,
120 };
121 
122 static const unsigned int i2c_adc_init[][2] = {
123 	{ 0x17, 0x00 }, /* Reset */
124 	{ 0x07, 0x00 }, /* Timeout */
125 	{ 0x0b, 0x22 },  /* Interface control */
126 	{ 0x0c, 0x22 },  /* Master mode control */
127 	{ 0x0d, 0x08 },  /* Powerdown control */
128 	{ 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
129 	{ 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
130 	{ 0x10, 0x7b },  /* ALC Control 1 */
131 	{ 0x11, 0x00 },  /* ALC Control 2 */
132 	{ 0x12, 0x32 },  /* ALC Control 3 */
133 	{ 0x13, 0x00 },  /* Noise gate control */
134 	{ 0x14, 0xa6 },  /* Limiter control */
135 	{ 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for A2ZS Notebook */
136 };
137 
snd_emu10k1_init(struct snd_emu10k1 * emu,int enable_ir)138 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir)
139 {
140 	unsigned int silent_page;
141 	int ch;
142 	u32 tmp;
143 
144 	/* disable audio and lock cache */
145 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
146 		HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
147 
148 	outl(0, emu->port + INTE);
149 
150 	snd_emu10k1_ptr_write_multiple(emu, 0,
151 		/* reset recording buffers */
152 		MICBS, ADCBS_BUFSIZE_NONE,
153 		MICBA, 0,
154 		FXBS, ADCBS_BUFSIZE_NONE,
155 		FXBA, 0,
156 		ADCBS, ADCBS_BUFSIZE_NONE,
157 		ADCBA, 0,
158 
159 		/* disable channel interrupt */
160 		CLIEL, 0,
161 		CLIEH, 0,
162 
163 		/* disable stop on loop end */
164 		SOLEL, 0,
165 		SOLEH, 0,
166 
167 		REGLIST_END);
168 
169 	if (emu->audigy) {
170 		/* set SPDIF bypass mode */
171 		snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
172 		/* enable rear left + rear right AC97 slots */
173 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
174 				      AC97SLOT_REAR_LEFT);
175 	}
176 
177 	/* init envelope engine */
178 	for (ch = 0; ch < NUM_G; ch++)
179 		snd_emu10k1_voice_init(emu, ch);
180 
181 	snd_emu10k1_ptr_write_multiple(emu, 0,
182 		SPCS0, emu->spdif_bits[0],
183 		SPCS1, emu->spdif_bits[1],
184 		SPCS2, emu->spdif_bits[2],
185 		REGLIST_END);
186 
187 	if (emu->card_capabilities->emu_model) {
188 	} else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
189 		/* Hacks for Alice3 to work independent of haP16V driver */
190 		/* Setup SRCMulti_I2S SamplingRate */
191 		snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
192 
193 		/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
194 		snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
195 		/* Setup SRCMulti Input Audio Enable */
196 		/* Use 0xFFFFFFFF to enable P16V sounds. */
197 		snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
198 
199 		/* Enabled Phased (8-channel) P16V playback */
200 		outl(0x0201, emu->port + HCFG2);
201 		/* Set playback routing. */
202 		snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
203 	} else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
204 		/* Hacks for Alice3 to work independent of haP16V driver */
205 		dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
206 		/* Setup SRCMulti_I2S SamplingRate */
207 		snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
208 
209 		/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
210 		snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14);
211 
212 		/* Setup SRCMulti Input Audio Enable */
213 		snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000);
214 
215 		/* Setup SPDIF Out Audio Enable */
216 		/* The Audigy 2 Value has a separate SPDIF out,
217 		 * so no need for a mixer switch
218 		 */
219 		snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000);
220 
221 		tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
222 		outw(tmp, emu->port + A_IOCFG);
223 	}
224 	if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
225 		int size, n;
226 
227 		size = ARRAY_SIZE(spi_dac_init);
228 		for (n = 0; n < size; n++)
229 			snd_emu10k1_spi_write(emu, spi_dac_init[n]);
230 
231 		snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
232 		/* Enable GPIOs
233 		 * GPIO0: Unknown
234 		 * GPIO1: Speakers-enabled.
235 		 * GPIO2: Unknown
236 		 * GPIO3: Unknown
237 		 * GPIO4: IEC958 Output on.
238 		 * GPIO5: Unknown
239 		 * GPIO6: Unknown
240 		 * GPIO7: Unknown
241 		 */
242 		outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
243 	}
244 	if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
245 		int size, n;
246 
247 		snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
248 		tmp = inw(emu->port + A_IOCFG);
249 		outw(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
250 		tmp = inw(emu->port + A_IOCFG);
251 		size = ARRAY_SIZE(i2c_adc_init);
252 		for (n = 0; n < size; n++)
253 			snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
254 		for (n = 0; n < 4; n++) {
255 			emu->i2c_capture_volume[n][0] = 0xcf;
256 			emu->i2c_capture_volume[n][1] = 0xcf;
257 		}
258 	}
259 
260 
261 	snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
262 	snd_emu10k1_ptr_write(emu, TCB, 0, 0);	/* taken from original driver */
263 	snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K);	/* taken from original driver */
264 
265 	silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
266 	for (ch = 0; ch < NUM_G; ch++) {
267 		snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
268 		snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
269 	}
270 
271 	if (emu->card_capabilities->emu_model) {
272 		outl(HCFG_AUTOMUTE_ASYNC |
273 			HCFG_EMU32_SLAVE |
274 			HCFG_AUDIOENABLE, emu->port + HCFG);
275 	/*
276 	 *  Hokay, setup HCFG
277 	 *   Mute Disable Audio = 0
278 	 *   Lock Tank Memory = 1
279 	 *   Lock Sound Memory = 0
280 	 *   Auto Mute = 1
281 	 */
282 	} else if (emu->audigy) {
283 		if (emu->revision == 4) /* audigy2 */
284 			outl(HCFG_AUDIOENABLE |
285 			     HCFG_AC3ENABLE_CDSPDIF |
286 			     HCFG_AC3ENABLE_GPSPDIF |
287 			     HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
288 		else
289 			outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
290 	/* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
291 	 * e.g. card_capabilities->joystick */
292 	} else if (emu->model == 0x20 ||
293 	    emu->model == 0xc400 ||
294 	    (emu->model == 0x21 && emu->revision < 6))
295 		outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
296 	else
297 		/* With on-chip joystick */
298 		outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
299 
300 	if (enable_ir) {	/* enable IR for SB Live */
301 		if (emu->card_capabilities->emu_model) {
302 			;  /* Disable all access to A_IOCFG for the emu1010 */
303 		} else if (emu->card_capabilities->i2c_adc) {
304 			;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
305 		} else if (emu->audigy) {
306 			u16 reg = inw(emu->port + A_IOCFG);
307 			outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
308 			udelay(500);
309 			outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
310 			udelay(100);
311 			outw(reg, emu->port + A_IOCFG);
312 		} else {
313 			unsigned int reg = inl(emu->port + HCFG);
314 			outl(reg | HCFG_GPOUT2, emu->port + HCFG);
315 			udelay(500);
316 			outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
317 			udelay(100);
318 			outl(reg, emu->port + HCFG);
319 		}
320 	}
321 
322 	if (emu->card_capabilities->emu_model) {
323 		;  /* Disable all access to A_IOCFG for the emu1010 */
324 	} else if (emu->card_capabilities->i2c_adc) {
325 		;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
326 	} else if (emu->audigy) {	/* enable analog output */
327 		u16 reg = inw(emu->port + A_IOCFG);
328 		outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
329 	}
330 
331 	if (emu->address_mode == 0) {
332 		/* use 16M in 4G */
333 		outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
334 	}
335 
336 	return 0;
337 }
338 
snd_emu10k1_audio_enable(struct snd_emu10k1 * emu)339 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
340 {
341 	/*
342 	 *  Enable the audio bit
343 	 */
344 	outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
345 
346 	/* Enable analog/digital outs on audigy */
347 	if (emu->card_capabilities->emu_model) {
348 		;  /* Disable all access to A_IOCFG for the emu1010 */
349 	} else if (emu->card_capabilities->i2c_adc) {
350 		;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
351 	} else if (emu->audigy) {
352 		outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
353 
354 		if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
355 			/* Unmute Analog now.  Set GPO6 to 1 for Apollo.
356 			 * This has to be done after init ALice3 I2SOut beyond 48KHz.
357 			 * So, sequence is important. */
358 			outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
359 		} else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
360 			/* Unmute Analog now. */
361 			outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
362 		} else {
363 			/* Disable routing from AC97 line out to Front speakers */
364 			outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
365 		}
366 	}
367 
368 #if 0
369 	{
370 	unsigned int tmp;
371 	/* FIXME: the following routine disables LiveDrive-II !! */
372 	/* TOSLink detection */
373 	emu->tos_link = 0;
374 	tmp = inl(emu->port + HCFG);
375 	if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
376 		outl(tmp|0x800, emu->port + HCFG);
377 		udelay(50);
378 		if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
379 			emu->tos_link = 1;
380 			outl(tmp, emu->port + HCFG);
381 		}
382 	}
383 	}
384 #endif
385 
386 	if (emu->card_capabilities->emu_model)
387 		snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE | INTE_A_GPIOENABLE);
388 	else
389 		snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
390 }
391 
snd_emu10k1_done(struct snd_emu10k1 * emu)392 int snd_emu10k1_done(struct snd_emu10k1 *emu)
393 {
394 	int ch;
395 
396 	outl(0, emu->port + INTE);
397 
398 	/*
399 	 *  Shutdown the voices
400 	 */
401 	for (ch = 0; ch < NUM_G; ch++) {
402 		snd_emu10k1_ptr_write_multiple(emu, ch,
403 			DCYSUSV, 0,
404 			VTFT, 0,
405 			CVCF, 0,
406 			PTRX, 0,
407 			CPF, 0,
408 			REGLIST_END);
409 	}
410 
411 	// stop the DSP
412 	if (emu->audigy)
413 		snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
414 	else
415 		snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
416 
417 	snd_emu10k1_ptr_write_multiple(emu, 0,
418 		/* reset recording buffers */
419 		MICBS, 0,
420 		MICBA, 0,
421 		FXBS, 0,
422 		FXBA, 0,
423 		FXWC, 0,
424 		ADCBS, ADCBS_BUFSIZE_NONE,
425 		ADCBA, 0,
426 		TCBS, TCBS_BUFFSIZE_16K,
427 		TCB, 0,
428 
429 		/* disable channel interrupt */
430 		CLIEL, 0,
431 		CLIEH, 0,
432 		SOLEL, 0,
433 		SOLEH, 0,
434 
435 		PTB, 0,
436 
437 		REGLIST_END);
438 
439 	/* disable audio and lock cache */
440 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
441 
442 	return 0;
443 }
444 
445 /*************************************************************************
446  * ECARD functional implementation
447  *************************************************************************/
448 
449 /* In A1 Silicon, these bits are in the HC register */
450 #define HOOKN_BIT		(1L << 12)
451 #define HANDN_BIT		(1L << 11)
452 #define PULSEN_BIT		(1L << 10)
453 
454 #define EC_GDI1			(1 << 13)
455 #define EC_GDI0			(1 << 14)
456 
457 #define EC_NUM_CONTROL_BITS	20
458 
459 #define EC_AC3_DATA_SELN	0x0001L
460 #define EC_EE_DATA_SEL		0x0002L
461 #define EC_EE_CNTRL_SELN	0x0004L
462 #define EC_EECLK		0x0008L
463 #define EC_EECS			0x0010L
464 #define EC_EESDO		0x0020L
465 #define EC_TRIM_CSN		0x0040L
466 #define EC_TRIM_SCLK		0x0080L
467 #define EC_TRIM_SDATA		0x0100L
468 #define EC_TRIM_MUTEN		0x0200L
469 #define EC_ADCCAL		0x0400L
470 #define EC_ADCRSTN		0x0800L
471 #define EC_DACCAL		0x1000L
472 #define EC_DACMUTEN		0x2000L
473 #define EC_LEDN			0x4000L
474 
475 #define EC_SPDIF0_SEL_SHIFT	15
476 #define EC_SPDIF1_SEL_SHIFT	17
477 #define EC_SPDIF0_SEL_MASK	(0x3L << EC_SPDIF0_SEL_SHIFT)
478 #define EC_SPDIF1_SEL_MASK	(0x7L << EC_SPDIF1_SEL_SHIFT)
479 #define EC_SPDIF0_SELECT(_x)	(((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
480 #define EC_SPDIF1_SELECT(_x)	(((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
481 #define EC_CURRENT_PROM_VERSION 0x01	/* Self-explanatory.  This should
482 					 * be incremented any time the EEPROM's
483 					 * format is changed.  */
484 
485 #define EC_EEPROM_SIZE		0x40	/* ECARD EEPROM has 64 16-bit words */
486 
487 /* Addresses for special values stored in to EEPROM */
488 #define EC_PROM_VERSION_ADDR	0x20	/* Address of the current prom version */
489 #define EC_BOARDREV0_ADDR	0x21	/* LSW of board rev */
490 #define EC_BOARDREV1_ADDR	0x22	/* MSW of board rev */
491 
492 #define EC_LAST_PROMFILE_ADDR	0x2f
493 
494 #define EC_SERIALNUM_ADDR	0x30	/* First word of serial number.  The
495 					 * can be up to 30 characters in length
496 					 * and is stored as a NULL-terminated
497 					 * ASCII string.  Any unused bytes must be
498 					 * filled with zeros */
499 #define EC_CHECKSUM_ADDR	0x3f	/* Location at which checksum is stored */
500 
501 
502 /* Most of this stuff is pretty self-evident.  According to the hardware
503  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
504  * offset problem.  Weird.
505  */
506 #define EC_RAW_RUN_MODE		(EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
507 				 EC_TRIM_CSN)
508 
509 
510 #define EC_DEFAULT_ADC_GAIN	0xC4C4
511 #define EC_DEFAULT_SPDIF0_SEL	0x0
512 #define EC_DEFAULT_SPDIF1_SEL	0x4
513 
514 /**************************************************************************
515  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
516  *  control latch will is loaded bit-serially by toggling the Modem control
517  *  lines from function 2 on the E8010.  This function hides these details
518  *  and presents the illusion that we are actually writing to a distinct
519  *  register.
520  */
521 
snd_emu10k1_ecard_write(struct snd_emu10k1 * emu,unsigned int value)522 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
523 {
524 	unsigned short count;
525 	unsigned int data;
526 	unsigned long hc_port;
527 	unsigned int hc_value;
528 
529 	hc_port = emu->port + HCFG;
530 	hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
531 	outl(hc_value, hc_port);
532 
533 	for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
534 
535 		/* Set up the value */
536 		data = ((value & 0x1) ? PULSEN_BIT : 0);
537 		value >>= 1;
538 
539 		outl(hc_value | data, hc_port);
540 
541 		/* Clock the shift register */
542 		outl(hc_value | data | HANDN_BIT, hc_port);
543 		outl(hc_value | data, hc_port);
544 	}
545 
546 	/* Latch the bits */
547 	outl(hc_value | HOOKN_BIT, hc_port);
548 	outl(hc_value, hc_port);
549 }
550 
551 /**************************************************************************
552  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
553  * trim value consists of a 16bit value which is composed of two
554  * 8 bit gain/trim values, one for the left channel and one for the
555  * right channel.  The following table maps from the Gain/Attenuation
556  * value in decibels into the corresponding bit pattern for a single
557  * channel.
558  */
559 
snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,unsigned short gain)560 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
561 					 unsigned short gain)
562 {
563 	unsigned int bit;
564 
565 	/* Enable writing to the TRIM registers */
566 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
567 
568 	/* Do it again to insure that we meet hold time requirements */
569 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
570 
571 	for (bit = (1 << 15); bit; bit >>= 1) {
572 		unsigned int value;
573 
574 		value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
575 
576 		if (gain & bit)
577 			value |= EC_TRIM_SDATA;
578 
579 		/* Clock the bit */
580 		snd_emu10k1_ecard_write(emu, value);
581 		snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
582 		snd_emu10k1_ecard_write(emu, value);
583 	}
584 
585 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
586 }
587 
snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)588 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
589 {
590 	unsigned int hc_value;
591 
592 	/* Set up the initial settings */
593 	emu->ecard_ctrl = EC_RAW_RUN_MODE |
594 			  EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
595 			  EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
596 
597 	/* Step 0: Set the codec type in the hardware control register
598 	 * and enable audio output */
599 	hc_value = inl(emu->port + HCFG);
600 	outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
601 	inl(emu->port + HCFG);
602 
603 	/* Step 1: Turn off the led and deassert TRIM_CS */
604 	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
605 
606 	/* Step 2: Calibrate the ADC and DAC */
607 	snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
608 
609 	/* Step 3: Wait for awhile;   XXX We can't get away with this
610 	 * under a real operating system; we'll need to block and wait that
611 	 * way. */
612 	snd_emu10k1_wait(emu, 48000);
613 
614 	/* Step 4: Switch off the DAC and ADC calibration.  Note
615 	 * That ADC_CAL is actually an inverted signal, so we assert
616 	 * it here to stop calibration.  */
617 	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
618 
619 	/* Step 4: Switch into run mode */
620 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
621 
622 	/* Step 5: Set the analog input gain */
623 	snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
624 
625 	return 0;
626 }
627 
snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)628 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
629 {
630 	unsigned long special_port;
631 	__always_unused unsigned int value;
632 
633 	/* Special initialisation routine
634 	 * before the rest of the IO-Ports become active.
635 	 */
636 	special_port = emu->port + 0x38;
637 	value = inl(special_port);
638 	outl(0x00d00000, special_port);
639 	value = inl(special_port);
640 	outl(0x00d00001, special_port);
641 	value = inl(special_port);
642 	outl(0x00d0005f, special_port);
643 	value = inl(special_port);
644 	outl(0x00d0007f, special_port);
645 	value = inl(special_port);
646 	outl(0x0090007f, special_port);
647 	value = inl(special_port);
648 
649 	snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
650 	/* Delay to give time for ADC chip to switch on. It needs 113ms */
651 	msleep(200);
652 	return 0;
653 }
654 
655 /* firmware file names, per model, init-fw and dock-fw (optional) */
656 static const char * const firmware_names[5][2] = {
657 	[EMU_MODEL_EMU1010] = {
658 		HANA_FILENAME, DOCK_FILENAME
659 	},
660 	[EMU_MODEL_EMU1010B] = {
661 		EMU1010B_FILENAME, MICRO_DOCK_FILENAME
662 	},
663 	[EMU_MODEL_EMU1616] = {
664 		EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME
665 	},
666 	[EMU_MODEL_EMU0404] = {
667 		EMU0404_FILENAME, NULL
668 	},
669 };
670 
snd_emu1010_load_firmware(struct snd_emu10k1 * emu,int dock,const struct firmware ** fw)671 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock,
672 				     const struct firmware **fw)
673 {
674 	const char *filename;
675 	int err;
676 
677 	if (!*fw) {
678 		filename = firmware_names[emu->card_capabilities->emu_model][dock];
679 		if (!filename)
680 			return 0;
681 		err = request_firmware(fw, filename, &emu->pci->dev);
682 		if (err)
683 			return err;
684 	}
685 
686 	snd_emu1010_load_firmware_entry(emu, dock, *fw);
687 	return 0;
688 }
689 
snd_emu1010_load_dock_firmware(struct snd_emu10k1 * emu)690 static void snd_emu1010_load_dock_firmware(struct snd_emu10k1 *emu)
691 {
692 	u32 tmp, tmp2;
693 	int err;
694 
695 	// The docking events clearly arrive prematurely - while the
696 	// Dock's FPGA seems to be successfully programmed, the Dock
697 	// fails to initialize subsequently if we don't give it some
698 	// time to "warm up" here.
699 	msleep(200);
700 
701 	dev_info(emu->card->dev, "emu1010: Loading Audio Dock Firmware\n");
702 	err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw);
703 	if (err < 0)
704 		return;
705 	snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
706 
707 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp);
708 	dev_dbg(emu->card->dev, "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp);
709 	if ((tmp & 0x1f) != 0x15) {
710 		/* FPGA failed to be programmed */
711 		dev_err(emu->card->dev,
712 			"emu1010: Loading Audio Dock Firmware failed, reg = 0x%x\n",
713 			tmp);
714 		return;
715 	}
716 	dev_info(emu->card->dev, "emu1010: Audio Dock Firmware loaded\n");
717 
718 	snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
719 	snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
720 	dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2);
721 
722 	/* Allow DLL to settle, to sync clocking between 1010 and Dock */
723 	msleep(10);
724 }
725 
emu1010_dock_event(struct snd_emu10k1 * emu)726 static void emu1010_dock_event(struct snd_emu10k1 *emu)
727 {
728 	u32 reg;
729 
730 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
731 	if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
732 		/* Audio Dock attached */
733 		snd_emu1010_load_dock_firmware(emu);
734 		/* Unmute all. Default is muted after a firmware load */
735 		snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
736 	} else if (!(reg & EMU_HANA_OPTION_DOCK_ONLINE)) {
737 		/* Audio Dock removed */
738 		dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
739 		/* The hardware auto-mutes all, so we unmute again */
740 		snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
741 	}
742 }
743 
emu1010_clock_event(struct snd_emu10k1 * emu)744 static void emu1010_clock_event(struct snd_emu10k1 *emu)
745 {
746 	struct snd_ctl_elem_id id;
747 
748 	spin_lock_irq(&emu->reg_lock);
749 	// This is the only thing that can actually happen.
750 	emu->emu1010.clock_source = emu->emu1010.clock_fallback;
751 	emu->emu1010.wclock = 1 - emu->emu1010.clock_source;
752 	snd_emu1010_update_clock(emu);
753 	spin_unlock_irq(&emu->reg_lock);
754 	snd_ctl_build_ioff(&id, emu->ctl_clock_source, 0);
755 	snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE, &id);
756 }
757 
emu1010_work(struct work_struct * work)758 static void emu1010_work(struct work_struct *work)
759 {
760 	struct snd_emu10k1 *emu;
761 	u32 sts;
762 
763 	emu = container_of(work, struct snd_emu10k1, emu1010.work);
764 	if (emu->card->shutdown)
765 		return;
766 #ifdef CONFIG_PM_SLEEP
767 	if (emu->suspend)
768 		return;
769 #endif
770 
771 	snd_emu1010_fpga_lock(emu);
772 
773 	snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &sts);
774 
775 	// The distinction of the IRQ status bits is unreliable,
776 	// so we dispatch later based on option card status.
777 	if (sts & (EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST))
778 		emu1010_dock_event(emu);
779 
780 	if (sts & EMU_HANA_IRQ_WCLK_CHANGED)
781 		emu1010_clock_event(emu);
782 
783 	snd_emu1010_fpga_unlock(emu);
784 }
785 
emu1010_interrupt(struct snd_emu10k1 * emu)786 static void emu1010_interrupt(struct snd_emu10k1 *emu)
787 {
788 	// We get an interrupt on each GPIO input pin change, but we
789 	// care only about the ones triggered by the dedicated pin.
790 	u16 sts = inw(emu->port + A_GPIO);
791 	u16 bit = emu->card_capabilities->ca0108_chip ? 0x2000 : 0x8000;
792 	if (!(sts & bit))
793 		return;
794 
795 	schedule_work(&emu->emu1010.work);
796 }
797 
798 /*
799  * Current status of the driver:
800  * ----------------------------
801  * 	* only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
802  * 	* PCM device nb. 2:
803  *		16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
804  * 		16 x 32-bit capture - snd_emu10k1_capture_efx_ops
805  */
snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)806 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
807 {
808 	u32 tmp, tmp2, reg;
809 	int err;
810 
811 	dev_info(emu->card->dev, "emu1010: Special config.\n");
812 
813 	/* Mute, and disable audio and lock cache, just in case.
814 	 * Proper init follows in snd_emu10k1_init(). */
815 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
816 
817 	snd_emu1010_fpga_lock(emu);
818 
819 	dev_info(emu->card->dev, "emu1010: Loading Hana Firmware\n");
820 	err = snd_emu1010_load_firmware(emu, 0, &emu->firmware);
821 	if (err < 0) {
822 		dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
823 		goto fail;
824 	}
825 
826 	/* ID, should read & 0x7f = 0x55 when FPGA programmed. */
827 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
828 	if ((reg & 0x3f) != 0x15) {
829 		/* FPGA failed to be programmed */
830 		dev_info(emu->card->dev,
831 			 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
832 			 reg);
833 		err = -ENODEV;
834 		goto fail;
835 	}
836 
837 	dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
838 	snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
839 	snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
840 	dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
841 	/* Enable 48Volt power to Audio Dock */
842 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
843 
844 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
845 	dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
846 	if (reg & EMU_HANA_OPTION_DOCK_OFFLINE)
847 		snd_emu1010_load_dock_firmware(emu);
848 	if (emu->card_capabilities->no_adat) {
849 		emu->emu1010.optical_in = 0; /* IN_SPDIF */
850 		emu->emu1010.optical_out = 0; /* OUT_SPDIF */
851 	} else {
852 		/* Optical -> ADAT I/O  */
853 		emu->emu1010.optical_in = 1; /* IN_ADAT */
854 		emu->emu1010.optical_out = 1; /* OUT_ADAT */
855 	}
856 	tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
857 		(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
858 	snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
859 	/* Set no attenuation on Audio Dock pads. */
860 	emu->emu1010.adc_pads = 0x00;
861 	snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads);
862 	/* Unmute Audio dock DACs, Headphone source DAC-4. */
863 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4);
864 	/* DAC PADs. */
865 	emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 |
866 				EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4;
867 	snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads);
868 	/* SPDIF Format. Set Consumer mode, 24bit, copy enable */
869 	snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID);
870 	/* MIDI routing */
871 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2);
872 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2);
873 
874 	emu->gpio_interrupt = emu1010_interrupt;
875 	// Note: The Audigy INTE is set later
876 	snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE,
877 			       EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST | EMU_HANA_IRQ_WCLK_CHANGED);
878 	snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);  // Clear pending IRQs
879 
880 	emu->emu1010.clock_source = 1;  /* 48000 */
881 	emu->emu1010.clock_fallback = 1;  /* 48000 */
882 	/* Default WCLK set to 48kHz. */
883 	snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K);
884 	/* Word Clock source, Internal 48kHz x1 */
885 	emu->emu1010.wclock = EMU_HANA_WCLOCK_INT_48K;
886 	snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
887 	/* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
888 	snd_emu1010_update_clock(emu);
889 
890 	// The routes are all set to EMU_SRC_SILENCE due to the reset,
891 	// so it is safe to simply enable the outputs.
892 	snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
893 
894 fail:
895 	snd_emu1010_fpga_unlock(emu);
896 	return err;
897 }
898 /*
899  *  Create the EMU10K1 instance
900  */
901 
902 #ifdef CONFIG_PM_SLEEP
903 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
904 static void free_pm_buffer(struct snd_emu10k1 *emu);
905 #endif
906 
snd_emu10k1_free(struct snd_card * card)907 static void snd_emu10k1_free(struct snd_card *card)
908 {
909 	struct snd_emu10k1 *emu = card->private_data;
910 
911 	if (emu->port) {	/* avoid access to already used hardware */
912 		snd_emu10k1_fx8010_tram_setup(emu, 0);
913 		snd_emu10k1_done(emu);
914 		snd_emu10k1_free_efx(emu);
915 	}
916 	if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
917 		/* Disable 48Volt power to Audio Dock */
918 		snd_emu1010_fpga_write_lock(emu, EMU_HANA_DOCK_PWR, 0);
919 	}
920 	cancel_work_sync(&emu->emu1010.work);
921 	mutex_destroy(&emu->emu1010.lock);
922 	release_firmware(emu->firmware);
923 	release_firmware(emu->dock_fw);
924 	snd_util_memhdr_free(emu->memhdr);
925 	if (emu->silent_page.area)
926 		snd_dma_free_pages(&emu->silent_page);
927 	if (emu->ptb_pages.area)
928 		snd_dma_free_pages(&emu->ptb_pages);
929 	vfree(emu->page_ptr_table);
930 	vfree(emu->page_addr_table);
931 #ifdef CONFIG_PM_SLEEP
932 	free_pm_buffer(emu);
933 #endif
934 }
935 
936 static const struct snd_emu_chip_details emu_chip_details[] = {
937 	/* Audigy 5/Rx SB1550 */
938 	/* Tested by michael@gernoth.net 28 Mar 2015 */
939 	/* DSP: CA10300-IAT LF
940 	 * DAC: Cirrus Logic CS4382-KQZ
941 	 * ADC: Philips 1361T
942 	 * AC97: Sigmatel STAC9750
943 	 * CA0151: None
944 	 */
945 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
946 	 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
947 	 .id = "Audigy2",
948 	 .emu10k2_chip = 1,
949 	 .ca0108_chip = 1,
950 	 .spk71 = 1,
951 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
952 	 .ac97_chip = 1},
953 	/* Audigy4 (Not PRO) SB0610 */
954 	/* Tested by James@superbug.co.uk 4th April 2006 */
955 	/* A_IOCFG bits
956 	 * Output
957 	 * 0: ?
958 	 * 1: ?
959 	 * 2: ?
960 	 * 3: 0 - Digital Out, 1 - Line in
961 	 * 4: ?
962 	 * 5: ?
963 	 * 6: ?
964 	 * 7: ?
965 	 * Input
966 	 * 8: ?
967 	 * 9: ?
968 	 * A: Green jack sense (Front)
969 	 * B: ?
970 	 * C: Black jack sense (Rear/Side Right)
971 	 * D: Yellow jack sense (Center/LFE/Side Left)
972 	 * E: ?
973 	 * F: ?
974 	 *
975 	 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
976 	 * 0 - Digital Out
977 	 * 1 - Line in
978 	 */
979 	/* Mic input not tested.
980 	 * Analog CD input not tested
981 	 * Digital Out not tested.
982 	 * Line in working.
983 	 * Audio output 5.1 working. Side outputs not working.
984 	 */
985 	/* DSP: CA10300-IAT LF
986 	 * DAC: Cirrus Logic CS4382-KQZ
987 	 * ADC: Philips 1361T
988 	 * AC97: Sigmatel STAC9750
989 	 * CA0151: None
990 	 */
991 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
992 	 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
993 	 .id = "Audigy2",
994 	 .emu10k2_chip = 1,
995 	 .ca0108_chip = 1,
996 	 .spk71 = 1,
997 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
998 	 .ac97_chip = 1} ,
999 	/* Audigy 2 Value AC3 out does not work yet.
1000 	 * Need to find out how to turn off interpolators.
1001 	 */
1002 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1003 	/* DSP: CA0108-IAT
1004 	 * DAC: CS4382-KQ
1005 	 * ADC: Philips 1361T
1006 	 * AC97: STAC9750
1007 	 * CA0151: None
1008 	 */
1009 	/*
1010 	 * A_IOCFG Input (GPIO)
1011 	 * 0x400  = Front analog jack plugged in. (Green socket)
1012 	 * 0x1000 = Rear analog jack plugged in. (Black socket)
1013 	 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket)
1014 	 * A_IOCFG Output (GPIO)
1015 	 * 0x60 = Sound out of front Left.
1016 	 * Win sets it to 0xXX61
1017 	 */
1018 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1019 	 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1020 	 .id = "Audigy2",
1021 	 .emu10k2_chip = 1,
1022 	 .ca0108_chip = 1,
1023 	 .spk71 = 1,
1024 	 .ac97_chip = 1} ,
1025 	/* Audigy 2 ZS Notebook Cardbus card.*/
1026 	/* Tested by James@superbug.co.uk 6th November 2006 */
1027 	/* Audio output 7.1/Headphones working.
1028 	 * Digital output working. (AC3 not checked, only PCM)
1029 	 * Audio Mic/Line inputs working.
1030 	 * Digital input not tested.
1031 	 */
1032 	/* DSP: Tina2
1033 	 * DAC: Wolfson WM8768/WM8568
1034 	 * ADC: Wolfson WM8775
1035 	 * AC97: None
1036 	 * CA0151: None
1037 	 */
1038 	/* Tested by James@superbug.co.uk 4th April 2006 */
1039 	/* A_IOCFG bits
1040 	 * Output
1041 	 * 0: Not Used
1042 	 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1043 	 * 2: Analog input 0 = line in, 1 = mic in
1044 	 * 3: Not Used
1045 	 * 4: Digital output 0 = off, 1 = on.
1046 	 * 5: Not Used
1047 	 * 6: Not Used
1048 	 * 7: Not Used
1049 	 * Input
1050 	 *      All bits 1 (0x3fxx) means nothing plugged in.
1051 	 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1052 	 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1053 	 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1054 	 * E-F: Always 0
1055 	 *
1056 	 */
1057 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1058 	 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1059 	 .id = "Audigy2",
1060 	 .emu10k2_chip = 1,
1061 	 .ca0108_chip = 1,
1062 	 .ca_cardbus_chip = 1,
1063 	 .spi_dac = 1,
1064 	 .i2c_adc = 1,
1065 	 .spk71 = 1} ,
1066 	/* This is MAEM8950 "Mana" */
1067 	/* Attach MicroDock[M] to make it an E-MU 1616[m]. */
1068 	/* Does NOT support sync daughter card (obviously). */
1069 	/* Tested by James@superbug.co.uk 4th Nov 2007. */
1070 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1071 	 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]",
1072 	 .id = "EMU1010",
1073 	 .emu10k2_chip = 1,
1074 	 .ca0108_chip = 1,
1075 	 .ca_cardbus_chip = 1,
1076 	 .spk71 = 1 ,
1077 	 .emu_model = EMU_MODEL_EMU1616},
1078 	/* Tested by James@superbug.co.uk 4th Nov 2007. */
1079 	/* This is MAEM8960 "Hana3", 0202 is MAEM8980 */
1080 	/* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1081 	 * MicroDock[M] to make it an E-MU 1616[m]. */
1082 	/* Does NOT support sync daughter card. */
1083 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1084 	 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]",
1085 	 .id = "EMU1010",
1086 	 .emu10k2_chip = 1,
1087 	 .ca0108_chip = 1,
1088 	 .spk71 = 1,
1089 	 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1090 	/* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1091 	/* This is MAEM8986, 0202 is MAEM8980 */
1092 	/* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1093 	 * MicroDockM to make it an E-MU 1616m. The non-m
1094 	 * version was never sold with this card, but should
1095 	 * still work. */
1096 	/* Does NOT support sync daughter card. */
1097 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1098 	 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]",
1099 	 .id = "EMU1010",
1100 	 .emu10k2_chip = 1,
1101 	 .ca0108_chip = 1,
1102 	 .spk71 = 1,
1103 	 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1104 	/* Tested by James@superbug.co.uk 8th July 2005. */
1105 	/* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */
1106 	/* Attach 0202 daughter card to make it an E-MU 1212m, OR an
1107 	 * AudioDock[M] to make it an E-MU 1820[m]. */
1108 	/* Supports sync daughter card. */
1109 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1110 	 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]",
1111 	 .id = "EMU1010",
1112 	 .emu10k2_chip = 1,
1113 	 .ca0102_chip = 1,
1114 	 .spk71 = 1,
1115 	 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1116 	/* This is MAEM8852 "HanaLiteLite" */
1117 	/* Supports sync daughter card. */
1118 	/* Tested by oswald.buddenhagen@gmx.de Mar 2023. */
1119 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1120 	 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]",
1121 	 .id = "EMU0404",
1122 	 .emu10k2_chip = 1,
1123 	 .ca0108_chip = 1,
1124 	 .spk20 = 1,
1125 	 .no_adat = 1,
1126 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1127 	/* This is MAEM8850 "HanaLite" */
1128 	/* Supports sync daughter card. */
1129 	/* Tested by James@superbug.co.uk 20-3-2007. */
1130 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1131 	 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]",
1132 	 .id = "EMU0404",
1133 	 .emu10k2_chip = 1,
1134 	 .ca0102_chip = 1,
1135 	 .spk20 = 1,
1136 	 .no_adat = 1,
1137 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1138 	/* EMU0404 PCIe */
1139 	/* Does NOT support sync daughter card. */
1140 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1141 	 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]",
1142 	 .id = "EMU0404",
1143 	 .emu10k2_chip = 1,
1144 	 .ca0108_chip = 1,
1145 	 .spk20 = 1,
1146 	 .no_adat = 1,
1147 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1148 	{.vendor = 0x1102, .device = 0x0008,
1149 	 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1150 	 .id = "Audigy2",
1151 	 .emu10k2_chip = 1,
1152 	 .ca0108_chip = 1,
1153 	 .ac97_chip = 1} ,
1154 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1155 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1156 	 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1157 	 .id = "Audigy2",
1158 	 .emu10k2_chip = 1,
1159 	 .ca0102_chip = 1,
1160 	 .ca0151_chip = 1,
1161 	 .spk71 = 1,
1162 	 .spdif_bug = 1,
1163 	 .ac97_chip = 1} ,
1164 	/* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1165 	/* The 0x20061102 does have SB0350 written on it
1166 	 * Just like 0x20021102
1167 	 */
1168 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1169 	 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1170 	 .id = "Audigy2",
1171 	 .emu10k2_chip = 1,
1172 	 .ca0102_chip = 1,
1173 	 .ca0151_chip = 1,
1174 	 .spk71 = 1,
1175 	 .spdif_bug = 1,
1176 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1177 	 .ac97_chip = 1} ,
1178 	/* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1179 	   Creative's Windows driver */
1180 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1181 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1182 	 .id = "Audigy2",
1183 	 .emu10k2_chip = 1,
1184 	 .ca0102_chip = 1,
1185 	 .ca0151_chip = 1,
1186 	 .spk71 = 1,
1187 	 .spdif_bug = 1,
1188 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1189 	 .ac97_chip = 1} ,
1190 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1191 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1192 	 .id = "Audigy2",
1193 	 .emu10k2_chip = 1,
1194 	 .ca0102_chip = 1,
1195 	 .ca0151_chip = 1,
1196 	 .spk71 = 1,
1197 	 .spdif_bug = 1,
1198 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1199 	 .ac97_chip = 1} ,
1200 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1201 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1202 	 .id = "Audigy2",
1203 	 .emu10k2_chip = 1,
1204 	 .ca0102_chip = 1,
1205 	 .ca0151_chip = 1,
1206 	 .spk71 = 1,
1207 	 .spdif_bug = 1,
1208 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1209 	 .ac97_chip = 1} ,
1210 	/* Audigy 2 */
1211 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1212 	/* DSP: CA0102-IAT
1213 	 * DAC: CS4382-KQ
1214 	 * ADC: Philips 1361T
1215 	 * AC97: STAC9721
1216 	 * CA0151: Yes
1217 	 */
1218 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1219 	 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1220 	 .id = "Audigy2",
1221 	 .emu10k2_chip = 1,
1222 	 .ca0102_chip = 1,
1223 	 .ca0151_chip = 1,
1224 	 .spk71 = 1,
1225 	 .spdif_bug = 1,
1226 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1227 	 .ac97_chip = 1} ,
1228 	/* Audigy 2 Platinum EX */
1229 	/* Win driver sets A_IOCFG output to 0x1c00 */
1230 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1231 	 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1232 	 .id = "Audigy2",
1233 	 .emu10k2_chip = 1,
1234 	 .ca0102_chip = 1,
1235 	 .ca0151_chip = 1,
1236 	 .spk71 = 1,
1237 	 .spdif_bug = 1} ,
1238 	/* Dell OEM/Creative Labs Audigy 2 ZS */
1239 	/* See ALSA bug#1365 */
1240 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1241 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1242 	 .id = "Audigy2",
1243 	 .emu10k2_chip = 1,
1244 	 .ca0102_chip = 1,
1245 	 .ca0151_chip = 1,
1246 	 .spk71 = 1,
1247 	 .spdif_bug = 1,
1248 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1249 	 .ac97_chip = 1} ,
1250 	/* Audigy 2 Platinum */
1251 	/* Win driver sets A_IOCFG output to 0xa00 */
1252 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1253 	 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1254 	 .id = "Audigy2",
1255 	 .emu10k2_chip = 1,
1256 	 .ca0102_chip = 1,
1257 	 .ca0151_chip = 1,
1258 	 .spk71 = 1,
1259 	 .spdif_bug = 1,
1260 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1261 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1262 	 .ac97_chip = 1} ,
1263 	{.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1264 	 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1265 	 .id = "Audigy2",
1266 	 .emu10k2_chip = 1,
1267 	 .ca0102_chip = 1,
1268 	 .ca0151_chip = 1,
1269 	 .spdif_bug = 1,
1270 	 .ac97_chip = 1} ,
1271 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1272 	 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1273 	 .id = "Audigy",
1274 	 .emu10k2_chip = 1,
1275 	 .ca0102_chip = 1,
1276 	 .ac97_chip = 1} ,
1277 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1278 	 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1279 	 .id = "Audigy",
1280 	 .emu10k2_chip = 1,
1281 	 .ca0102_chip = 1,
1282 	 .spdif_bug = 1,
1283 	 .ac97_chip = 1} ,
1284 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1285 	 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1286 	 .id = "Audigy",
1287 	 .emu10k2_chip = 1,
1288 	 .ca0102_chip = 1,
1289 	 .ac97_chip = 1} ,
1290 	{.vendor = 0x1102, .device = 0x0004,
1291 	 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1292 	 .id = "Audigy",
1293 	 .emu10k2_chip = 1,
1294 	 .ca0102_chip = 1,
1295 	 .ac97_chip = 1} ,
1296 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1297 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1298 	 .id = "Live",
1299 	 .emu10k1_chip = 1,
1300 	 .ac97_chip = 1,
1301 	 .sblive51 = 1} ,
1302 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1303 	 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1304 	 .id = "Live",
1305 	 .emu10k1_chip = 1,
1306 	 .ac97_chip = 1,
1307 	 .sblive51 = 1} ,
1308 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1309 	 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1310 	 .id = "Live",
1311 	 .emu10k1_chip = 1,
1312 	 .ac97_chip = 1,
1313 	 .sblive51 = 1} ,
1314 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1315 	 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1316 	 .id = "Live",
1317 	 .emu10k1_chip = 1,
1318 	 .ac97_chip = 1,
1319 	 .sblive51 = 1} ,
1320 	/* Tested by ALSA bug#1680 26th December 2005 */
1321 	/* note: It really has SB0220 written on the card, */
1322 	/* but it's SB0228 according to kx.inf */
1323 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1324 	 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1325 	 .id = "Live",
1326 	 .emu10k1_chip = 1,
1327 	 .ac97_chip = 1,
1328 	 .sblive51 = 1} ,
1329 	/* Tested by Thomas Zehetbauer 27th Aug 2005 */
1330 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1331 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1332 	 .id = "Live",
1333 	 .emu10k1_chip = 1,
1334 	 .ac97_chip = 1,
1335 	 .sblive51 = 1} ,
1336 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1337 	 .driver = "EMU10K1", .name = "SB Live! 5.1",
1338 	 .id = "Live",
1339 	 .emu10k1_chip = 1,
1340 	 .ac97_chip = 1,
1341 	 .sblive51 = 1} ,
1342 	/* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1343 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1344 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1345 	 .id = "Live",
1346 	 .emu10k1_chip = 1,
1347 	 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1348 			  * share the same IDs!
1349 			  */
1350 	 .sblive51 = 1} ,
1351 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1352 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1353 	 .id = "Live",
1354 	 .emu10k1_chip = 1,
1355 	 .ac97_chip = 1,
1356 	 .sblive51 = 1} ,
1357 	/* SB Live! Platinum */
1358 	/* Win driver sets A_IOCFG output to 0 */
1359 	/* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */
1360 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1361 	 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1362 	 .id = "Live",
1363 	 .emu10k1_chip = 1,
1364 	 .ac97_chip = 1} ,
1365 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1366 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1367 	 .id = "Live",
1368 	 .emu10k1_chip = 1,
1369 	 .ac97_chip = 1,
1370 	 .sblive51 = 1} ,
1371 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1372 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1373 	 .id = "Live",
1374 	 .emu10k1_chip = 1,
1375 	 .ac97_chip = 1,
1376 	 .sblive51 = 1} ,
1377 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1378 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1379 	 .id = "Live",
1380 	 .emu10k1_chip = 1,
1381 	 .ac97_chip = 1,
1382 	 .sblive51 = 1} ,
1383 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1384 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1385 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1386 	 .id = "Live",
1387 	 .emu10k1_chip = 1,
1388 	 .ac97_chip = 1,
1389 	 .sblive51 = 1} ,
1390 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1391 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1392 	 .id = "Live",
1393 	 .emu10k1_chip = 1,
1394 	 .ac97_chip = 1,
1395 	 .sblive51 = 1} ,
1396 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1397 	 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1398 	 .id = "Live",
1399 	 .emu10k1_chip = 1,
1400 	 .ac97_chip = 1,
1401 	 .sblive51 = 1} ,
1402 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1403 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1404 	 .id = "Live",
1405 	 .emu10k1_chip = 1,
1406 	 .ac97_chip = 1,
1407 	 .sblive51 = 1} ,
1408 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1409 	 .driver = "EMU10K1", .name = "E-MU APS [PC545]",
1410 	 .id = "APS",
1411 	 .emu10k1_chip = 1,
1412 	 .ecard = 1} ,
1413 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1414 	 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1415 	 .id = "Live",
1416 	 .emu10k1_chip = 1,
1417 	 .ac97_chip = 1,
1418 	 .sblive51 = 1} ,
1419 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1420 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1421 	 .id = "Live",
1422 	 .emu10k1_chip = 1,
1423 	 .ac97_chip = 1,
1424 	 .sblive51 = 1} ,
1425 	{.vendor = 0x1102, .device = 0x0002,
1426 	 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1427 	 .id = "Live",
1428 	 .emu10k1_chip = 1,
1429 	 .ac97_chip = 1,
1430 	 .sblive51 = 1} ,
1431 	{ } /* terminator */
1432 };
1433 
1434 /*
1435  * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too)
1436  * has a problem that from time to time it likes to do few DMA reads a bit
1437  * beyond its normal allocation and gets very confused if these reads get
1438  * blocked by a IOMMU.
1439  *
1440  * This behaviour has been observed for the first (reserved) page
1441  * (for which it happens multiple times at every playback), often for various
1442  * synth pages and sometimes for PCM playback buffers and the page table
1443  * memory itself.
1444  *
1445  * As a workaround let's widen these DMA allocations by an extra page if we
1446  * detect that the device is behind a non-passthrough IOMMU.
1447  */
snd_emu10k1_detect_iommu(struct snd_emu10k1 * emu)1448 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu)
1449 {
1450 	struct iommu_domain *domain;
1451 
1452 	emu->iommu_workaround = false;
1453 
1454 	domain = iommu_get_domain_for_dev(emu->card->dev);
1455 	if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY)
1456 		return;
1457 
1458 	dev_notice(emu->card->dev,
1459 		   "non-passthrough IOMMU detected, widening DMA allocations");
1460 	emu->iommu_workaround = true;
1461 }
1462 
snd_emu10k1_create(struct snd_card * card,struct pci_dev * pci,unsigned short extin_mask,unsigned short extout_mask,long max_cache_bytes,int enable_ir,uint subsystem)1463 int snd_emu10k1_create(struct snd_card *card,
1464 		       struct pci_dev *pci,
1465 		       unsigned short extin_mask,
1466 		       unsigned short extout_mask,
1467 		       long max_cache_bytes,
1468 		       int enable_ir,
1469 		       uint subsystem)
1470 {
1471 	struct snd_emu10k1 *emu = card->private_data;
1472 	int idx, err;
1473 	int is_audigy;
1474 	size_t page_table_size;
1475 	__le32 *pgtbl;
1476 	unsigned int silent_page;
1477 	const struct snd_emu_chip_details *c;
1478 
1479 	/* enable PCI device */
1480 	err = pcim_enable_device(pci);
1481 	if (err < 0)
1482 		return err;
1483 
1484 	card->private_free = snd_emu10k1_free;
1485 	emu->card = card;
1486 	spin_lock_init(&emu->reg_lock);
1487 	spin_lock_init(&emu->emu_lock);
1488 	spin_lock_init(&emu->spi_lock);
1489 	spin_lock_init(&emu->i2c_lock);
1490 	spin_lock_init(&emu->voice_lock);
1491 	spin_lock_init(&emu->synth_lock);
1492 	spin_lock_init(&emu->memblk_lock);
1493 	mutex_init(&emu->fx8010.lock);
1494 	INIT_LIST_HEAD(&emu->mapped_link_head);
1495 	INIT_LIST_HEAD(&emu->mapped_order_link_head);
1496 	emu->pci = pci;
1497 	emu->irq = -1;
1498 	emu->synth = NULL;
1499 	emu->get_synth_voice = NULL;
1500 	INIT_WORK(&emu->emu1010.work, emu1010_work);
1501 	mutex_init(&emu->emu1010.lock);
1502 	/* read revision & serial */
1503 	emu->revision = pci->revision;
1504 	pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1505 	pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1506 	dev_dbg(card->dev,
1507 		"vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1508 		pci->vendor, pci->device, emu->serial, emu->model);
1509 
1510 	for (c = emu_chip_details; c->vendor; c++) {
1511 		if (c->vendor == pci->vendor && c->device == pci->device) {
1512 			if (subsystem) {
1513 				if (c->subsystem && (c->subsystem == subsystem))
1514 					break;
1515 				else
1516 					continue;
1517 			} else {
1518 				if (c->subsystem && (c->subsystem != emu->serial))
1519 					continue;
1520 				if (c->revision && c->revision != emu->revision)
1521 					continue;
1522 			}
1523 			break;
1524 		}
1525 	}
1526 	if (c->vendor == 0) {
1527 		dev_err(card->dev, "emu10k1: Card not recognised\n");
1528 		return -ENOENT;
1529 	}
1530 	emu->card_capabilities = c;
1531 	if (c->subsystem && !subsystem)
1532 		dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1533 	else if (subsystem)
1534 		dev_dbg(card->dev, "Sound card name = %s, "
1535 			"vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1536 			"Forced to subsystem = 0x%x\n",	c->name,
1537 			pci->vendor, pci->device, emu->serial, c->subsystem);
1538 	else
1539 		dev_dbg(card->dev, "Sound card name = %s, "
1540 			"vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1541 			c->name, pci->vendor, pci->device,
1542 			emu->serial);
1543 
1544 	if (!*card->id && c->id)
1545 		strscpy(card->id, c->id, sizeof(card->id));
1546 
1547 	is_audigy = emu->audigy = c->emu10k2_chip;
1548 
1549 	snd_emu10k1_detect_iommu(emu);
1550 
1551 	/* set addressing mode */
1552 	emu->address_mode = is_audigy ? 0 : 1;
1553 	/* set the DMA transfer mask */
1554 	emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1555 	if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) {
1556 		dev_err(card->dev,
1557 			"architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1558 			emu->dma_mask);
1559 		return -ENXIO;
1560 	}
1561 	if (is_audigy)
1562 		emu->gpr_base = A_FXGPREGBASE;
1563 	else
1564 		emu->gpr_base = FXGPREGBASE;
1565 
1566 	err = pci_request_regions(pci, "EMU10K1");
1567 	if (err < 0)
1568 		return err;
1569 	emu->port = pci_resource_start(pci, 0);
1570 
1571 	emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1572 
1573 	page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 :
1574 					 MAXPAGES0);
1575 	if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size,
1576 						&emu->ptb_pages) < 0)
1577 		return -ENOMEM;
1578 	dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n",
1579 		(unsigned long)emu->ptb_pages.addr,
1580 		(unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes));
1581 
1582 	emu->page_ptr_table = vmalloc(array_size(sizeof(void *),
1583 						 emu->max_cache_pages));
1584 	emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long),
1585 						  emu->max_cache_pages));
1586 	if (!emu->page_ptr_table || !emu->page_addr_table)
1587 		return -ENOMEM;
1588 
1589 	if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE,
1590 						&emu->silent_page) < 0)
1591 		return -ENOMEM;
1592 	dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n",
1593 		(unsigned long)emu->silent_page.addr,
1594 		(unsigned long)(emu->silent_page.addr +
1595 				emu->silent_page.bytes));
1596 
1597 	emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1598 	if (!emu->memhdr)
1599 		return -ENOMEM;
1600 	emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1601 		sizeof(struct snd_util_memblk);
1602 
1603 	pci_set_master(pci);
1604 
1605 	// The masks are not used for Audigy.
1606 	// FIXME: these should come from the card_capabilites table.
1607 	if (extin_mask == 0)
1608 		extin_mask = 0x3fcf;  // EXTIN_*
1609 	if (extout_mask == 0)
1610 		extout_mask = 0x7fff;  // EXTOUT_*
1611 	emu->fx8010.extin_mask = extin_mask;
1612 	emu->fx8010.extout_mask = extout_mask;
1613 	emu->enable_ir = enable_ir;
1614 
1615 	if (emu->card_capabilities->ca_cardbus_chip) {
1616 		err = snd_emu10k1_cardbus_init(emu);
1617 		if (err < 0)
1618 			return err;
1619 	}
1620 	if (emu->card_capabilities->ecard) {
1621 		err = snd_emu10k1_ecard_init(emu);
1622 		if (err < 0)
1623 			return err;
1624 	} else if (emu->card_capabilities->emu_model) {
1625 		err = snd_emu10k1_emu1010_init(emu);
1626 		if (err < 0)
1627 			return err;
1628 	} else {
1629 		/* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1630 			does not support this, it shouldn't do any harm */
1631 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1632 					AC97SLOT_CNTR|AC97SLOT_LFE);
1633 	}
1634 
1635 	/* initialize TRAM setup */
1636 	emu->fx8010.itram_size = (16 * 1024)/2;
1637 	emu->fx8010.etram_pages.area = NULL;
1638 	emu->fx8010.etram_pages.bytes = 0;
1639 
1640 	/* irq handler must be registered after I/O ports are activated */
1641 	if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt,
1642 			     IRQF_SHARED, KBUILD_MODNAME, emu))
1643 		return -EBUSY;
1644 	emu->irq = pci->irq;
1645 	card->sync_irq = emu->irq;
1646 
1647 	/*
1648 	 *  Init to 0x02109204 :
1649 	 *  Clock accuracy    = 0     (1000ppm)
1650 	 *  Sample Rate       = 2     (48kHz)
1651 	 *  Audio Channel     = 1     (Left of 2)
1652 	 *  Source Number     = 0     (Unspecified)
1653 	 *  Generation Status = 1     (Original for Cat Code 12)
1654 	 *  Cat Code          = 12    (Digital Signal Mixer)
1655 	 *  Mode              = 0     (Mode 0)
1656 	 *  Emphasis          = 0     (None)
1657 	 *  CP                = 1     (Copyright unasserted)
1658 	 *  AN                = 0     (Audio data)
1659 	 *  P                 = 0     (Consumer)
1660 	 */
1661 	emu->spdif_bits[0] = emu->spdif_bits[1] =
1662 		emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1663 		SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1664 		SPCS_GENERATIONSTATUS | 0x00001200 |
1665 		0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1666 
1667 	/* Clear silent pages and set up pointers */
1668 	memset(emu->silent_page.area, 0, emu->silent_page.bytes);
1669 	silent_page = emu->silent_page.addr << emu->address_mode;
1670 	pgtbl = (__le32 *)emu->ptb_pages.area;
1671 	for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
1672 		pgtbl[idx] = cpu_to_le32(silent_page | idx);
1673 
1674 	/* set up voice indices */
1675 	for (idx = 0; idx < NUM_G; idx++)
1676 		emu->voices[idx].number = idx;
1677 
1678 	err = snd_emu10k1_init(emu, enable_ir);
1679 	if (err < 0)
1680 		return err;
1681 #ifdef CONFIG_PM_SLEEP
1682 	err = alloc_pm_buffer(emu);
1683 	if (err < 0)
1684 		return err;
1685 #endif
1686 
1687 	/*  Initialize the effect engine */
1688 	err = snd_emu10k1_init_efx(emu);
1689 	if (err < 0)
1690 		return err;
1691 	snd_emu10k1_audio_enable(emu);
1692 
1693 #ifdef CONFIG_SND_PROC_FS
1694 	snd_emu10k1_proc_init(emu);
1695 #endif
1696 	return 0;
1697 }
1698 
1699 #ifdef CONFIG_PM_SLEEP
1700 static const unsigned char saved_regs[] = {
1701 	CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1702 	FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1703 	ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1704 	TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1705 	MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1706 	SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1707 	0xff /* end */
1708 };
1709 static const unsigned char saved_regs_audigy[] = {
1710 	A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC,
1711 	A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1712 	0xff /* end */
1713 };
1714 
alloc_pm_buffer(struct snd_emu10k1 * emu)1715 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
1716 {
1717 	int size;
1718 
1719 	size = ARRAY_SIZE(saved_regs);
1720 	if (emu->audigy)
1721 		size += ARRAY_SIZE(saved_regs_audigy);
1722 	emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size));
1723 	if (!emu->saved_ptr)
1724 		return -ENOMEM;
1725 	if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1726 		return -ENOMEM;
1727 	if (emu->card_capabilities->ca0151_chip &&
1728 	    snd_p16v_alloc_pm_buffer(emu) < 0)
1729 		return -ENOMEM;
1730 	return 0;
1731 }
1732 
free_pm_buffer(struct snd_emu10k1 * emu)1733 static void free_pm_buffer(struct snd_emu10k1 *emu)
1734 {
1735 	vfree(emu->saved_ptr);
1736 	snd_emu10k1_efx_free_pm_buffer(emu);
1737 	if (emu->card_capabilities->ca0151_chip)
1738 		snd_p16v_free_pm_buffer(emu);
1739 }
1740 
snd_emu10k1_suspend_regs(struct snd_emu10k1 * emu)1741 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1742 {
1743 	int i;
1744 	const unsigned char *reg;
1745 	unsigned int *val;
1746 
1747 	val = emu->saved_ptr;
1748 	for (reg = saved_regs; *reg != 0xff; reg++)
1749 		for (i = 0; i < NUM_G; i++, val++)
1750 			*val = snd_emu10k1_ptr_read(emu, *reg, i);
1751 	if (emu->audigy) {
1752 		for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1753 			for (i = 0; i < NUM_G; i++, val++)
1754 				*val = snd_emu10k1_ptr_read(emu, *reg, i);
1755 	}
1756 	if (emu->audigy)
1757 		emu->saved_a_iocfg = inw(emu->port + A_IOCFG);
1758 	emu->saved_hcfg = inl(emu->port + HCFG);
1759 }
1760 
snd_emu10k1_resume_init(struct snd_emu10k1 * emu)1761 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1762 {
1763 	if (emu->card_capabilities->ca_cardbus_chip)
1764 		snd_emu10k1_cardbus_init(emu);
1765 	if (emu->card_capabilities->ecard)
1766 		snd_emu10k1_ecard_init(emu);
1767 	else if (emu->card_capabilities->emu_model)
1768 		snd_emu10k1_emu1010_init(emu);
1769 	else
1770 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1771 	snd_emu10k1_init(emu, emu->enable_ir);
1772 }
1773 
snd_emu10k1_resume_regs(struct snd_emu10k1 * emu)1774 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1775 {
1776 	int i;
1777 	const unsigned char *reg;
1778 	unsigned int *val;
1779 
1780 	snd_emu10k1_audio_enable(emu);
1781 
1782 	/* resore for spdif */
1783 	if (emu->audigy)
1784 		outw(emu->saved_a_iocfg, emu->port + A_IOCFG);
1785 	outl(emu->saved_hcfg, emu->port + HCFG);
1786 
1787 	val = emu->saved_ptr;
1788 	for (reg = saved_regs; *reg != 0xff; reg++)
1789 		for (i = 0; i < NUM_G; i++, val++)
1790 			snd_emu10k1_ptr_write(emu, *reg, i, *val);
1791 	if (emu->audigy) {
1792 		for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1793 			for (i = 0; i < NUM_G; i++, val++)
1794 				snd_emu10k1_ptr_write(emu, *reg, i, *val);
1795 	}
1796 }
1797 #endif
1798