1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 4 * Creative Labs, Inc. 5 * Routines for control of EMU10K1 chips 6 * 7 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> 8 * Added support for Audigy 2 Value. 9 * Added EMU 1010 support. 10 * General bug fixes and enhancements. 11 * 12 * BUGS: 13 * -- 14 * 15 * TODO: 16 * -- 17 */ 18 19 #include <linux/sched.h> 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/iommu.h> 25 #include <linux/pci.h> 26 #include <linux/slab.h> 27 #include <linux/vmalloc.h> 28 #include <linux/mutex.h> 29 30 31 #include <sound/core.h> 32 #include <sound/emu10k1.h> 33 #include <linux/firmware.h> 34 #include "p16v.h" 35 #include "tina2.h" 36 #include "p17v.h" 37 38 39 #define HANA_FILENAME "emu/hana.fw" 40 #define DOCK_FILENAME "emu/audio_dock.fw" 41 #define EMU1010B_FILENAME "emu/emu1010b.fw" 42 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw" 43 #define EMU0404_FILENAME "emu/emu0404.fw" 44 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" 45 46 MODULE_FIRMWARE(HANA_FILENAME); 47 MODULE_FIRMWARE(DOCK_FILENAME); 48 MODULE_FIRMWARE(EMU1010B_FILENAME); 49 MODULE_FIRMWARE(MICRO_DOCK_FILENAME); 50 MODULE_FIRMWARE(EMU0404_FILENAME); 51 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); 52 53 54 /************************************************************************* 55 * EMU10K1 init / done 56 *************************************************************************/ 57 58 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch) 59 { 60 snd_emu10k1_ptr_write_multiple(emu, ch, 61 DCYSUSV, 0, 62 VTFT, VTFT_FILTERTARGET_MASK, 63 CVCF, CVCF_CURRENTFILTER_MASK, 64 PTRX, 0, 65 CPF, 0, 66 CCR, 0, 67 68 PSST, 0, 69 DSL, 0x10, 70 CCCA, 0, 71 Z1, 0, 72 Z2, 0, 73 FXRT, 0x32100000, 74 75 // The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero 76 DCYSUSM, 0, 77 ATKHLDV, 0, 78 ATKHLDM, 0, 79 IP, 0, 80 IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK, 81 PEFE, 0, 82 FMMOD, 0, 83 TREMFRQ, 24, /* 1 Hz */ 84 FM2FRQ2, 24, /* 1 Hz */ 85 LFOVAL2, 0, 86 LFOVAL1, 0, 87 ENVVOL, 0, 88 ENVVAL, 0, 89 90 REGLIST_END); 91 92 /* Audigy extra stuffs */ 93 if (emu->audigy) { 94 snd_emu10k1_ptr_write_multiple(emu, ch, 95 A_CSBA, 0, 96 A_CSDC, 0, 97 A_CSFE, 0, 98 A_CSHG, 0, 99 A_FXRT1, 0x03020100, 100 A_FXRT2, 0x07060504, 101 A_SENDAMOUNTS, 0, 102 REGLIST_END); 103 } 104 } 105 106 static const unsigned int spi_dac_init[] = { 107 0x00ff, 108 0x02ff, 109 0x0400, 110 0x0520, 111 0x0600, 112 0x08ff, 113 0x0aff, 114 0x0cff, 115 0x0eff, 116 0x10ff, 117 0x1200, 118 0x1400, 119 0x1480, 120 0x1800, 121 0x1aff, 122 0x1cff, 123 0x1e00, 124 0x0530, 125 0x0602, 126 0x0622, 127 0x1400, 128 }; 129 130 static const unsigned int i2c_adc_init[][2] = { 131 { 0x17, 0x00 }, /* Reset */ 132 { 0x07, 0x00 }, /* Timeout */ 133 { 0x0b, 0x22 }, /* Interface control */ 134 { 0x0c, 0x22 }, /* Master mode control */ 135 { 0x0d, 0x08 }, /* Powerdown control */ 136 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ 137 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ 138 { 0x10, 0x7b }, /* ALC Control 1 */ 139 { 0x11, 0x00 }, /* ALC Control 2 */ 140 { 0x12, 0x32 }, /* ALC Control 3 */ 141 { 0x13, 0x00 }, /* Noise gate control */ 142 { 0x14, 0xa6 }, /* Limiter control */ 143 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */ 144 }; 145 146 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir) 147 { 148 unsigned int silent_page; 149 int ch; 150 u32 tmp; 151 152 /* disable audio and lock cache */ 153 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | 154 HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 155 156 outl(0, emu->port + INTE); 157 158 snd_emu10k1_ptr_write_multiple(emu, 0, 159 /* reset recording buffers */ 160 MICBS, ADCBS_BUFSIZE_NONE, 161 MICBA, 0, 162 FXBS, ADCBS_BUFSIZE_NONE, 163 FXBA, 0, 164 ADCBS, ADCBS_BUFSIZE_NONE, 165 ADCBA, 0, 166 167 /* disable channel interrupt */ 168 CLIEL, 0, 169 CLIEH, 0, 170 171 /* disable stop on loop end */ 172 SOLEL, 0, 173 SOLEH, 0, 174 175 REGLIST_END); 176 177 if (emu->audigy) { 178 /* set SPDIF bypass mode */ 179 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); 180 /* enable rear left + rear right AC97 slots */ 181 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | 182 AC97SLOT_REAR_LEFT); 183 } 184 185 /* init envelope engine */ 186 for (ch = 0; ch < NUM_G; ch++) 187 snd_emu10k1_voice_init(emu, ch); 188 189 snd_emu10k1_ptr_write_multiple(emu, 0, 190 SPCS0, emu->spdif_bits[0], 191 SPCS1, emu->spdif_bits[1], 192 SPCS2, emu->spdif_bits[2], 193 REGLIST_END); 194 195 if (emu->card_capabilities->emu_model) { 196 } else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 197 /* Hacks for Alice3 to work independent of haP16V driver */ 198 /* Setup SRCMulti_I2S SamplingRate */ 199 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 200 201 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 202 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); 203 /* Setup SRCMulti Input Audio Enable */ 204 /* Use 0xFFFFFFFF to enable P16V sounds. */ 205 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); 206 207 /* Enabled Phased (8-channel) P16V playback */ 208 outl(0x0201, emu->port + HCFG2); 209 /* Set playback routing. */ 210 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); 211 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ 212 /* Hacks for Alice3 to work independent of haP16V driver */ 213 dev_info(emu->card->dev, "Audigy2 value: Special config.\n"); 214 /* Setup SRCMulti_I2S SamplingRate */ 215 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 216 217 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 218 snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14); 219 220 /* Setup SRCMulti Input Audio Enable */ 221 snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000); 222 223 /* Setup SPDIF Out Audio Enable */ 224 /* The Audigy 2 Value has a separate SPDIF out, 225 * so no need for a mixer switch 226 */ 227 snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000); 228 229 tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ 230 outw(tmp, emu->port + A_IOCFG); 231 } 232 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ 233 int size, n; 234 235 size = ARRAY_SIZE(spi_dac_init); 236 for (n = 0; n < size; n++) 237 snd_emu10k1_spi_write(emu, spi_dac_init[n]); 238 239 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); 240 /* Enable GPIOs 241 * GPIO0: Unknown 242 * GPIO1: Speakers-enabled. 243 * GPIO2: Unknown 244 * GPIO3: Unknown 245 * GPIO4: IEC958 Output on. 246 * GPIO5: Unknown 247 * GPIO6: Unknown 248 * GPIO7: Unknown 249 */ 250 outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ 251 } 252 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ 253 int size, n; 254 255 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); 256 tmp = inw(emu->port + A_IOCFG); 257 outw(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ 258 tmp = inw(emu->port + A_IOCFG); 259 size = ARRAY_SIZE(i2c_adc_init); 260 for (n = 0; n < size; n++) 261 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); 262 for (n = 0; n < 4; n++) { 263 emu->i2c_capture_volume[n][0] = 0xcf; 264 emu->i2c_capture_volume[n][1] = 0xcf; 265 } 266 } 267 268 269 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); 270 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ 271 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */ 272 273 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0); 274 for (ch = 0; ch < NUM_G; ch++) { 275 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); 276 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); 277 } 278 279 if (emu->card_capabilities->emu_model) { 280 outl(HCFG_AUTOMUTE_ASYNC | 281 HCFG_EMU32_SLAVE | 282 HCFG_AUDIOENABLE, emu->port + HCFG); 283 /* 284 * Hokay, setup HCFG 285 * Mute Disable Audio = 0 286 * Lock Tank Memory = 1 287 * Lock Sound Memory = 0 288 * Auto Mute = 1 289 */ 290 } else if (emu->audigy) { 291 if (emu->revision == 4) /* audigy2 */ 292 outl(HCFG_AUDIOENABLE | 293 HCFG_AC3ENABLE_CDSPDIF | 294 HCFG_AC3ENABLE_GPSPDIF | 295 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 296 else 297 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 298 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, 299 * e.g. card_capabilities->joystick */ 300 } else if (emu->model == 0x20 || 301 emu->model == 0xc400 || 302 (emu->model == 0x21 && emu->revision < 6)) 303 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); 304 else 305 /* With on-chip joystick */ 306 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 307 308 if (enable_ir) { /* enable IR for SB Live */ 309 if (emu->card_capabilities->emu_model) { 310 ; /* Disable all access to A_IOCFG for the emu1010 */ 311 } else if (emu->card_capabilities->i2c_adc) { 312 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 313 } else if (emu->audigy) { 314 u16 reg = inw(emu->port + A_IOCFG); 315 outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 316 udelay(500); 317 outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 318 udelay(100); 319 outw(reg, emu->port + A_IOCFG); 320 } else { 321 unsigned int reg = inl(emu->port + HCFG); 322 outl(reg | HCFG_GPOUT2, emu->port + HCFG); 323 udelay(500); 324 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); 325 udelay(100); 326 outl(reg, emu->port + HCFG); 327 } 328 } 329 330 if (emu->card_capabilities->emu_model) { 331 ; /* Disable all access to A_IOCFG for the emu1010 */ 332 } else if (emu->card_capabilities->i2c_adc) { 333 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 334 } else if (emu->audigy) { /* enable analog output */ 335 u16 reg = inw(emu->port + A_IOCFG); 336 outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); 337 } 338 339 if (emu->address_mode == 0) { 340 /* use 16M in 4G */ 341 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG); 342 } 343 344 return 0; 345 } 346 347 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) 348 { 349 /* 350 * Enable the audio bit 351 */ 352 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); 353 354 /* Enable analog/digital outs on audigy */ 355 if (emu->card_capabilities->emu_model) { 356 ; /* Disable all access to A_IOCFG for the emu1010 */ 357 } else if (emu->card_capabilities->i2c_adc) { 358 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 359 } else if (emu->audigy) { 360 outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); 361 362 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 363 /* Unmute Analog now. Set GPO6 to 1 for Apollo. 364 * This has to be done after init ALice3 I2SOut beyond 48KHz. 365 * So, sequence is important. */ 366 outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); 367 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ 368 /* Unmute Analog now. */ 369 outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); 370 } else { 371 /* Disable routing from AC97 line out to Front speakers */ 372 outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); 373 } 374 } 375 376 #if 0 377 { 378 unsigned int tmp; 379 /* FIXME: the following routine disables LiveDrive-II !! */ 380 /* TOSLink detection */ 381 emu->tos_link = 0; 382 tmp = inl(emu->port + HCFG); 383 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 384 outl(tmp|0x800, emu->port + HCFG); 385 udelay(50); 386 if (tmp != (inl(emu->port + HCFG) & ~0x800)) { 387 emu->tos_link = 1; 388 outl(tmp, emu->port + HCFG); 389 } 390 } 391 } 392 #endif 393 394 if (emu->card_capabilities->emu_model) 395 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE | INTE_A_GPIOENABLE); 396 else 397 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); 398 } 399 400 int snd_emu10k1_done(struct snd_emu10k1 *emu) 401 { 402 int ch; 403 404 outl(0, emu->port + INTE); 405 406 /* 407 * Shutdown the voices 408 */ 409 for (ch = 0; ch < NUM_G; ch++) { 410 snd_emu10k1_ptr_write_multiple(emu, ch, 411 DCYSUSV, 0, 412 VTFT, 0, 413 CVCF, 0, 414 PTRX, 0, 415 CPF, 0, 416 REGLIST_END); 417 } 418 419 // stop the DSP 420 if (emu->audigy) 421 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); 422 else 423 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); 424 425 snd_emu10k1_ptr_write_multiple(emu, 0, 426 /* reset recording buffers */ 427 MICBS, 0, 428 MICBA, 0, 429 FXBS, 0, 430 FXBA, 0, 431 FXWC, 0, 432 ADCBS, ADCBS_BUFSIZE_NONE, 433 ADCBA, 0, 434 TCBS, TCBS_BUFFSIZE_16K, 435 TCB, 0, 436 437 /* disable channel interrupt */ 438 CLIEL, 0, 439 CLIEH, 0, 440 SOLEL, 0, 441 SOLEH, 0, 442 443 PTB, 0, 444 445 REGLIST_END); 446 447 /* disable audio and lock cache */ 448 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 449 450 return 0; 451 } 452 453 /************************************************************************* 454 * ECARD functional implementation 455 *************************************************************************/ 456 457 /* In A1 Silicon, these bits are in the HC register */ 458 #define HOOKN_BIT (1L << 12) 459 #define HANDN_BIT (1L << 11) 460 #define PULSEN_BIT (1L << 10) 461 462 #define EC_GDI1 (1 << 13) 463 #define EC_GDI0 (1 << 14) 464 465 #define EC_NUM_CONTROL_BITS 20 466 467 #define EC_AC3_DATA_SELN 0x0001L 468 #define EC_EE_DATA_SEL 0x0002L 469 #define EC_EE_CNTRL_SELN 0x0004L 470 #define EC_EECLK 0x0008L 471 #define EC_EECS 0x0010L 472 #define EC_EESDO 0x0020L 473 #define EC_TRIM_CSN 0x0040L 474 #define EC_TRIM_SCLK 0x0080L 475 #define EC_TRIM_SDATA 0x0100L 476 #define EC_TRIM_MUTEN 0x0200L 477 #define EC_ADCCAL 0x0400L 478 #define EC_ADCRSTN 0x0800L 479 #define EC_DACCAL 0x1000L 480 #define EC_DACMUTEN 0x2000L 481 #define EC_LEDN 0x4000L 482 483 #define EC_SPDIF0_SEL_SHIFT 15 484 #define EC_SPDIF1_SEL_SHIFT 17 485 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) 486 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) 487 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) 488 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) 489 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should 490 * be incremented any time the EEPROM's 491 * format is changed. */ 492 493 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ 494 495 /* Addresses for special values stored in to EEPROM */ 496 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ 497 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ 498 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ 499 500 #define EC_LAST_PROMFILE_ADDR 0x2f 501 502 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The 503 * can be up to 30 characters in length 504 * and is stored as a NULL-terminated 505 * ASCII string. Any unused bytes must be 506 * filled with zeros */ 507 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ 508 509 510 /* Most of this stuff is pretty self-evident. According to the hardware 511 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC 512 * offset problem. Weird. 513 */ 514 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ 515 EC_TRIM_CSN) 516 517 518 #define EC_DEFAULT_ADC_GAIN 0xC4C4 519 #define EC_DEFAULT_SPDIF0_SEL 0x0 520 #define EC_DEFAULT_SPDIF1_SEL 0x4 521 522 /************************************************************************** 523 * @func Clock bits into the Ecard's control latch. The Ecard uses a 524 * control latch will is loaded bit-serially by toggling the Modem control 525 * lines from function 2 on the E8010. This function hides these details 526 * and presents the illusion that we are actually writing to a distinct 527 * register. 528 */ 529 530 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value) 531 { 532 unsigned short count; 533 unsigned int data; 534 unsigned long hc_port; 535 unsigned int hc_value; 536 537 hc_port = emu->port + HCFG; 538 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); 539 outl(hc_value, hc_port); 540 541 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { 542 543 /* Set up the value */ 544 data = ((value & 0x1) ? PULSEN_BIT : 0); 545 value >>= 1; 546 547 outl(hc_value | data, hc_port); 548 549 /* Clock the shift register */ 550 outl(hc_value | data | HANDN_BIT, hc_port); 551 outl(hc_value | data, hc_port); 552 } 553 554 /* Latch the bits */ 555 outl(hc_value | HOOKN_BIT, hc_port); 556 outl(hc_value, hc_port); 557 } 558 559 /************************************************************************** 560 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The 561 * trim value consists of a 16bit value which is composed of two 562 * 8 bit gain/trim values, one for the left channel and one for the 563 * right channel. The following table maps from the Gain/Attenuation 564 * value in decibels into the corresponding bit pattern for a single 565 * channel. 566 */ 567 568 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu, 569 unsigned short gain) 570 { 571 unsigned int bit; 572 573 /* Enable writing to the TRIM registers */ 574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 575 576 /* Do it again to insure that we meet hold time requirements */ 577 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 578 579 for (bit = (1 << 15); bit; bit >>= 1) { 580 unsigned int value; 581 582 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); 583 584 if (gain & bit) 585 value |= EC_TRIM_SDATA; 586 587 /* Clock the bit */ 588 snd_emu10k1_ecard_write(emu, value); 589 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); 590 snd_emu10k1_ecard_write(emu, value); 591 } 592 593 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 594 } 595 596 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu) 597 { 598 unsigned int hc_value; 599 600 /* Set up the initial settings */ 601 emu->ecard_ctrl = EC_RAW_RUN_MODE | 602 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | 603 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); 604 605 /* Step 0: Set the codec type in the hardware control register 606 * and enable audio output */ 607 hc_value = inl(emu->port + HCFG); 608 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); 609 inl(emu->port + HCFG); 610 611 /* Step 1: Turn off the led and deassert TRIM_CS */ 612 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 613 614 /* Step 2: Calibrate the ADC and DAC */ 615 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); 616 617 /* Step 3: Wait for awhile; XXX We can't get away with this 618 * under a real operating system; we'll need to block and wait that 619 * way. */ 620 snd_emu10k1_wait(emu, 48000); 621 622 /* Step 4: Switch off the DAC and ADC calibration. Note 623 * That ADC_CAL is actually an inverted signal, so we assert 624 * it here to stop calibration. */ 625 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 626 627 /* Step 4: Switch into run mode */ 628 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 629 630 /* Step 5: Set the analog input gain */ 631 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); 632 633 return 0; 634 } 635 636 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu) 637 { 638 unsigned long special_port; 639 __always_unused unsigned int value; 640 641 /* Special initialisation routine 642 * before the rest of the IO-Ports become active. 643 */ 644 special_port = emu->port + 0x38; 645 value = inl(special_port); 646 outl(0x00d00000, special_port); 647 value = inl(special_port); 648 outl(0x00d00001, special_port); 649 value = inl(special_port); 650 outl(0x00d0005f, special_port); 651 value = inl(special_port); 652 outl(0x00d0007f, special_port); 653 value = inl(special_port); 654 outl(0x0090007f, special_port); 655 value = inl(special_port); 656 657 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ 658 /* Delay to give time for ADC chip to switch on. It needs 113ms */ 659 msleep(200); 660 return 0; 661 } 662 663 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu, 664 const struct firmware *fw_entry) 665 { 666 int n, i; 667 u16 reg; 668 u8 value; 669 __always_unused u16 write_post; 670 671 if (!fw_entry) 672 return -EIO; 673 674 /* The FPGA is a Xilinx Spartan IIE XC2S50E */ 675 /* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */ 676 /* GPIO7 -> FPGA PGMN 677 * GPIO6 -> FPGA CCLK 678 * GPIO5 -> FPGA DIN 679 * FPGA CONFIG OFF -> FPGA PGMN 680 */ 681 spin_lock_irq(&emu->emu_lock); 682 outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */ 683 write_post = inw(emu->port + A_GPIO); 684 udelay(100); 685 outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */ 686 write_post = inw(emu->port + A_GPIO); 687 udelay(100); /* Allow FPGA memory to clean */ 688 for (n = 0; n < fw_entry->size; n++) { 689 value = fw_entry->data[n]; 690 for (i = 0; i < 8; i++) { 691 reg = 0x80; 692 if (value & 0x1) 693 reg = reg | 0x20; 694 value = value >> 1; 695 outw(reg, emu->port + A_GPIO); 696 write_post = inw(emu->port + A_GPIO); 697 outw(reg | 0x40, emu->port + A_GPIO); 698 write_post = inw(emu->port + A_GPIO); 699 } 700 } 701 /* After programming, set GPIO bit 4 high again. */ 702 outw(0x10, emu->port + A_GPIO); 703 write_post = inw(emu->port + A_GPIO); 704 spin_unlock_irq(&emu->emu_lock); 705 706 return 0; 707 } 708 709 /* firmware file names, per model, init-fw and dock-fw (optional) */ 710 static const char * const firmware_names[5][2] = { 711 [EMU_MODEL_EMU1010] = { 712 HANA_FILENAME, DOCK_FILENAME 713 }, 714 [EMU_MODEL_EMU1010B] = { 715 EMU1010B_FILENAME, MICRO_DOCK_FILENAME 716 }, 717 [EMU_MODEL_EMU1616] = { 718 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME 719 }, 720 [EMU_MODEL_EMU0404] = { 721 EMU0404_FILENAME, NULL 722 }, 723 }; 724 725 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock, 726 const struct firmware **fw) 727 { 728 const char *filename; 729 int err; 730 731 if (!*fw) { 732 filename = firmware_names[emu->card_capabilities->emu_model][dock]; 733 if (!filename) 734 return 0; 735 err = request_firmware(fw, filename, &emu->pci->dev); 736 if (err) 737 return err; 738 } 739 740 return snd_emu1010_load_firmware_entry(emu, *fw); 741 } 742 743 static void emu1010_firmware_work(struct work_struct *work) 744 { 745 struct snd_emu10k1 *emu; 746 u32 tmp, tmp2, reg; 747 int err; 748 749 emu = container_of(work, struct snd_emu10k1, 750 emu1010.firmware_work); 751 if (emu->card->shutdown) 752 return; 753 #ifdef CONFIG_PM_SLEEP 754 if (emu->suspend) 755 return; 756 #endif 757 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */ 758 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) { 759 /* Audio Dock attached */ 760 /* Return to Audio Dock programming mode */ 761 dev_info(emu->card->dev, 762 "emu1010: Loading Audio Dock Firmware\n"); 763 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 764 EMU_HANA_FPGA_CONFIG_AUDIODOCK); 765 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw); 766 if (err < 0) 767 return; 768 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0); 769 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp); 770 dev_info(emu->card->dev, 771 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp); 772 if ((tmp & 0x1f) != 0x15) { 773 /* FPGA failed to be programmed */ 774 dev_info(emu->card->dev, 775 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", 776 tmp); 777 return; 778 } 779 dev_info(emu->card->dev, 780 "emu1010: Audio Dock Firmware loaded\n"); 781 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp); 782 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2); 783 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2); 784 /* Sync clocking between 1010 and Dock */ 785 /* Allow DLL to settle */ 786 msleep(10); 787 /* Unmute all. Default is muted after a firmware load */ 788 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 789 } 790 } 791 792 static void emu1010_clock_work(struct work_struct *work) 793 { 794 struct snd_emu10k1 *emu; 795 struct snd_ctl_elem_id id; 796 797 emu = container_of(work, struct snd_emu10k1, 798 emu1010.clock_work); 799 if (emu->card->shutdown) 800 return; 801 #ifdef CONFIG_PM_SLEEP 802 if (emu->suspend) 803 return; 804 #endif 805 806 spin_lock_irq(&emu->reg_lock); 807 // This is the only thing that can actually happen. 808 emu->emu1010.clock_source = emu->emu1010.clock_fallback; 809 emu->emu1010.wclock = 1 - emu->emu1010.clock_source; 810 snd_emu1010_update_clock(emu); 811 spin_unlock_irq(&emu->reg_lock); 812 snd_ctl_build_ioff(&id, emu->ctl_clock_source, 0); 813 snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE, &id); 814 } 815 816 static void emu1010_interrupt(struct snd_emu10k1 *emu) 817 { 818 u32 sts; 819 820 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &sts); 821 if (sts & EMU_HANA_IRQ_DOCK_LOST) { 822 /* Audio Dock removed */ 823 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n"); 824 /* The hardware auto-mutes all, so we unmute again */ 825 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 826 } else if (sts & EMU_HANA_IRQ_DOCK) { 827 schedule_work(&emu->emu1010.firmware_work); 828 } 829 if (sts & EMU_HANA_IRQ_WCLK_CHANGED) 830 schedule_work(&emu->emu1010.clock_work); 831 } 832 833 /* 834 * Current status of the driver: 835 * ---------------------------- 836 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) 837 * * PCM device nb. 2: 838 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops 839 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops 840 */ 841 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu) 842 { 843 u32 tmp, tmp2, reg; 844 int err; 845 846 dev_info(emu->card->dev, "emu1010: Special config.\n"); 847 848 /* Mute, and disable audio and lock cache, just in case. 849 * Proper init follows in snd_emu10k1_init(). */ 850 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG); 851 852 /* Disable 48Volt power to Audio Dock */ 853 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 854 855 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ 856 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 857 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg); 858 if ((reg & 0x3f) == 0x15) { 859 /* FPGA netlist already present so clear it */ 860 /* Return to programming mode */ 861 862 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA); 863 } 864 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 865 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg); 866 if ((reg & 0x3f) == 0x15) { 867 /* FPGA failed to return to programming mode */ 868 dev_info(emu->card->dev, 869 "emu1010: FPGA failed to return to programming mode\n"); 870 return -ENODEV; 871 } 872 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg); 873 874 err = snd_emu1010_load_firmware(emu, 0, &emu->firmware); 875 if (err < 0) { 876 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n"); 877 return err; 878 } 879 880 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 881 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 882 if ((reg & 0x3f) != 0x15) { 883 /* FPGA failed to be programmed */ 884 dev_info(emu->card->dev, 885 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", 886 reg); 887 return -ENODEV; 888 } 889 890 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n"); 891 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp); 892 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2); 893 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2); 894 /* Enable 48Volt power to Audio Dock */ 895 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON); 896 897 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 898 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg); 899 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) 900 schedule_work(&emu->emu1010.firmware_work); 901 if (emu->card_capabilities->no_adat) { 902 emu->emu1010.optical_in = 0; /* IN_SPDIF */ 903 emu->emu1010.optical_out = 0; /* OUT_SPDIF */ 904 } else { 905 /* Optical -> ADAT I/O */ 906 emu->emu1010.optical_in = 1; /* IN_ADAT */ 907 emu->emu1010.optical_out = 1; /* OUT_ADAT */ 908 } 909 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) | 910 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF); 911 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 912 /* Set no attenuation on Audio Dock pads. */ 913 emu->emu1010.adc_pads = 0x00; 914 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads); 915 /* Unmute Audio dock DACs, Headphone source DAC-4. */ 916 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4); 917 /* DAC PADs. */ 918 emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 | 919 EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4; 920 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads); 921 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ 922 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID); 923 /* MIDI routing */ 924 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2); 925 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2); 926 927 emu->gpio_interrupt = emu1010_interrupt; 928 // Note: The Audigy INTE is set later 929 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 930 EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST | EMU_HANA_IRQ_WCLK_CHANGED); 931 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®); // Clear pending IRQs 932 933 emu->emu1010.clock_source = 1; /* 48000 */ 934 emu->emu1010.clock_fallback = 1; /* 48000 */ 935 /* Default WCLK set to 48kHz. */ 936 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K); 937 /* Word Clock source, Internal 48kHz x1 */ 938 emu->emu1010.wclock = EMU_HANA_WCLOCK_INT_48K; 939 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 940 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 941 snd_emu1010_update_clock(emu); 942 943 // The routes are all set to EMU_SRC_SILENCE due to the reset, 944 // so it is safe to simply enable the outputs. 945 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 946 947 return 0; 948 } 949 /* 950 * Create the EMU10K1 instance 951 */ 952 953 #ifdef CONFIG_PM_SLEEP 954 static int alloc_pm_buffer(struct snd_emu10k1 *emu); 955 static void free_pm_buffer(struct snd_emu10k1 *emu); 956 #endif 957 958 static void snd_emu10k1_free(struct snd_card *card) 959 { 960 struct snd_emu10k1 *emu = card->private_data; 961 962 if (emu->port) { /* avoid access to already used hardware */ 963 snd_emu10k1_fx8010_tram_setup(emu, 0); 964 snd_emu10k1_done(emu); 965 snd_emu10k1_free_efx(emu); 966 } 967 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) { 968 /* Disable 48Volt power to Audio Dock */ 969 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 970 } 971 cancel_work_sync(&emu->emu1010.firmware_work); 972 cancel_work_sync(&emu->emu1010.clock_work); 973 release_firmware(emu->firmware); 974 release_firmware(emu->dock_fw); 975 snd_util_memhdr_free(emu->memhdr); 976 if (emu->silent_page.area) 977 snd_dma_free_pages(&emu->silent_page); 978 if (emu->ptb_pages.area) 979 snd_dma_free_pages(&emu->ptb_pages); 980 vfree(emu->page_ptr_table); 981 vfree(emu->page_addr_table); 982 #ifdef CONFIG_PM_SLEEP 983 free_pm_buffer(emu); 984 #endif 985 } 986 987 static const struct snd_emu_chip_details emu_chip_details[] = { 988 /* Audigy 5/Rx SB1550 */ 989 /* Tested by michael@gernoth.net 28 Mar 2015 */ 990 /* DSP: CA10300-IAT LF 991 * DAC: Cirrus Logic CS4382-KQZ 992 * ADC: Philips 1361T 993 * AC97: Sigmatel STAC9750 994 * CA0151: None 995 */ 996 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102, 997 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]", 998 .id = "Audigy2", 999 .emu10k2_chip = 1, 1000 .ca0108_chip = 1, 1001 .spk71 = 1, 1002 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1003 .ac97_chip = 1}, 1004 /* Audigy4 (Not PRO) SB0610 */ 1005 /* Tested by James@superbug.co.uk 4th April 2006 */ 1006 /* A_IOCFG bits 1007 * Output 1008 * 0: ? 1009 * 1: ? 1010 * 2: ? 1011 * 3: 0 - Digital Out, 1 - Line in 1012 * 4: ? 1013 * 5: ? 1014 * 6: ? 1015 * 7: ? 1016 * Input 1017 * 8: ? 1018 * 9: ? 1019 * A: Green jack sense (Front) 1020 * B: ? 1021 * C: Black jack sense (Rear/Side Right) 1022 * D: Yellow jack sense (Center/LFE/Side Left) 1023 * E: ? 1024 * F: ? 1025 * 1026 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) 1027 * 0 - Digital Out 1028 * 1 - Line in 1029 */ 1030 /* Mic input not tested. 1031 * Analog CD input not tested 1032 * Digital Out not tested. 1033 * Line in working. 1034 * Audio output 5.1 working. Side outputs not working. 1035 */ 1036 /* DSP: CA10300-IAT LF 1037 * DAC: Cirrus Logic CS4382-KQZ 1038 * ADC: Philips 1361T 1039 * AC97: Sigmatel STAC9750 1040 * CA0151: None 1041 */ 1042 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, 1043 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]", 1044 .id = "Audigy2", 1045 .emu10k2_chip = 1, 1046 .ca0108_chip = 1, 1047 .spk71 = 1, 1048 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1049 .ac97_chip = 1} , 1050 /* Audigy 2 Value AC3 out does not work yet. 1051 * Need to find out how to turn off interpolators. 1052 */ 1053 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1054 /* DSP: CA0108-IAT 1055 * DAC: CS4382-KQ 1056 * ADC: Philips 1361T 1057 * AC97: STAC9750 1058 * CA0151: None 1059 */ 1060 /* 1061 * A_IOCFG Input (GPIO) 1062 * 0x400 = Front analog jack plugged in. (Green socket) 1063 * 0x1000 = Rear analog jack plugged in. (Black socket) 1064 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket) 1065 * A_IOCFG Output (GPIO) 1066 * 0x60 = Sound out of front Left. 1067 * Win sets it to 0xXX61 1068 */ 1069 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, 1070 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]", 1071 .id = "Audigy2", 1072 .emu10k2_chip = 1, 1073 .ca0108_chip = 1, 1074 .spk71 = 1, 1075 .ac97_chip = 1} , 1076 /* Audigy 2 ZS Notebook Cardbus card.*/ 1077 /* Tested by James@superbug.co.uk 6th November 2006 */ 1078 /* Audio output 7.1/Headphones working. 1079 * Digital output working. (AC3 not checked, only PCM) 1080 * Audio Mic/Line inputs working. 1081 * Digital input not tested. 1082 */ 1083 /* DSP: Tina2 1084 * DAC: Wolfson WM8768/WM8568 1085 * ADC: Wolfson WM8775 1086 * AC97: None 1087 * CA0151: None 1088 */ 1089 /* Tested by James@superbug.co.uk 4th April 2006 */ 1090 /* A_IOCFG bits 1091 * Output 1092 * 0: Not Used 1093 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. 1094 * 2: Analog input 0 = line in, 1 = mic in 1095 * 3: Not Used 1096 * 4: Digital output 0 = off, 1 = on. 1097 * 5: Not Used 1098 * 6: Not Used 1099 * 7: Not Used 1100 * Input 1101 * All bits 1 (0x3fxx) means nothing plugged in. 1102 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. 1103 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. 1104 * C-D: 2 = Front/Rear/etc, 3 = nothing. 1105 * E-F: Always 0 1106 * 1107 */ 1108 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, 1109 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]", 1110 .id = "Audigy2", 1111 .emu10k2_chip = 1, 1112 .ca0108_chip = 1, 1113 .ca_cardbus_chip = 1, 1114 .spi_dac = 1, 1115 .i2c_adc = 1, 1116 .spk71 = 1} , 1117 /* This is MAEM8950 "Mana" */ 1118 /* Attach MicroDock[M] to make it an E-MU 1616[m]. */ 1119 /* Does NOT support sync daughter card (obviously). */ 1120 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1121 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, 1122 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]", 1123 .id = "EMU1010", 1124 .emu10k2_chip = 1, 1125 .ca0108_chip = 1, 1126 .ca_cardbus_chip = 1, 1127 .spk71 = 1 , 1128 .emu_model = EMU_MODEL_EMU1616}, 1129 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1130 /* This is MAEM8960 "Hana3", 0202 is MAEM8980 */ 1131 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1132 * MicroDock[M] to make it an E-MU 1616[m]. */ 1133 /* Does NOT support sync daughter card. */ 1134 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, 1135 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]", 1136 .id = "EMU1010", 1137 .emu10k2_chip = 1, 1138 .ca0108_chip = 1, 1139 .spk71 = 1, 1140 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */ 1141 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */ 1142 /* This is MAEM8986, 0202 is MAEM8980 */ 1143 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1144 * MicroDockM to make it an E-MU 1616m. The non-m 1145 * version was never sold with this card, but should 1146 * still work. */ 1147 /* Does NOT support sync daughter card. */ 1148 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102, 1149 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]", 1150 .id = "EMU1010", 1151 .emu10k2_chip = 1, 1152 .ca0108_chip = 1, 1153 .spk71 = 1, 1154 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */ 1155 /* Tested by James@superbug.co.uk 8th July 2005. */ 1156 /* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */ 1157 /* Attach 0202 daughter card to make it an E-MU 1212m, OR an 1158 * AudioDock[M] to make it an E-MU 1820[m]. */ 1159 /* Supports sync daughter card. */ 1160 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, 1161 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]", 1162 .id = "EMU1010", 1163 .emu10k2_chip = 1, 1164 .ca0102_chip = 1, 1165 .spk71 = 1, 1166 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */ 1167 /* This is MAEM8852 "HanaLiteLite" */ 1168 /* Supports sync daughter card. */ 1169 /* Tested by oswald.buddenhagen@gmx.de Mar 2023. */ 1170 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102, 1171 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]", 1172 .id = "EMU0404", 1173 .emu10k2_chip = 1, 1174 .ca0108_chip = 1, 1175 .spk20 = 1, 1176 .no_adat = 1, 1177 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */ 1178 /* This is MAEM8850 "HanaLite" */ 1179 /* Supports sync daughter card. */ 1180 /* Tested by James@superbug.co.uk 20-3-2007. */ 1181 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102, 1182 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]", 1183 .id = "EMU0404", 1184 .emu10k2_chip = 1, 1185 .ca0102_chip = 1, 1186 .spk20 = 1, 1187 .no_adat = 1, 1188 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */ 1189 /* EMU0404 PCIe */ 1190 /* Does NOT support sync daughter card. */ 1191 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102, 1192 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]", 1193 .id = "EMU0404", 1194 .emu10k2_chip = 1, 1195 .ca0108_chip = 1, 1196 .spk20 = 1, 1197 .no_adat = 1, 1198 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */ 1199 {.vendor = 0x1102, .device = 0x0008, 1200 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]", 1201 .id = "Audigy2", 1202 .emu10k2_chip = 1, 1203 .ca0108_chip = 1, 1204 .ac97_chip = 1} , 1205 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1206 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, 1207 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]", 1208 .id = "Audigy2", 1209 .emu10k2_chip = 1, 1210 .ca0102_chip = 1, 1211 .ca0151_chip = 1, 1212 .spk71 = 1, 1213 .spdif_bug = 1, 1214 .ac97_chip = 1} , 1215 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ 1216 /* The 0x20061102 does have SB0350 written on it 1217 * Just like 0x20021102 1218 */ 1219 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, 1220 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]", 1221 .id = "Audigy2", 1222 .emu10k2_chip = 1, 1223 .ca0102_chip = 1, 1224 .ca0151_chip = 1, 1225 .spk71 = 1, 1226 .spdif_bug = 1, 1227 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1228 .ac97_chip = 1} , 1229 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by 1230 Creative's Windows driver */ 1231 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102, 1232 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]", 1233 .id = "Audigy2", 1234 .emu10k2_chip = 1, 1235 .ca0102_chip = 1, 1236 .ca0151_chip = 1, 1237 .spk71 = 1, 1238 .spdif_bug = 1, 1239 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1240 .ac97_chip = 1} , 1241 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, 1242 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]", 1243 .id = "Audigy2", 1244 .emu10k2_chip = 1, 1245 .ca0102_chip = 1, 1246 .ca0151_chip = 1, 1247 .spk71 = 1, 1248 .spdif_bug = 1, 1249 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1250 .ac97_chip = 1} , 1251 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, 1252 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]", 1253 .id = "Audigy2", 1254 .emu10k2_chip = 1, 1255 .ca0102_chip = 1, 1256 .ca0151_chip = 1, 1257 .spk71 = 1, 1258 .spdif_bug = 1, 1259 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1260 .ac97_chip = 1} , 1261 /* Audigy 2 */ 1262 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1263 /* DSP: CA0102-IAT 1264 * DAC: CS4382-KQ 1265 * ADC: Philips 1361T 1266 * AC97: STAC9721 1267 * CA0151: Yes 1268 */ 1269 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, 1270 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]", 1271 .id = "Audigy2", 1272 .emu10k2_chip = 1, 1273 .ca0102_chip = 1, 1274 .ca0151_chip = 1, 1275 .spk71 = 1, 1276 .spdif_bug = 1, 1277 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1278 .ac97_chip = 1} , 1279 /* Audigy 2 Platinum EX */ 1280 /* Win driver sets A_IOCFG output to 0x1c00 */ 1281 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, 1282 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]", 1283 .id = "Audigy2", 1284 .emu10k2_chip = 1, 1285 .ca0102_chip = 1, 1286 .ca0151_chip = 1, 1287 .spk71 = 1, 1288 .spdif_bug = 1} , 1289 /* Dell OEM/Creative Labs Audigy 2 ZS */ 1290 /* See ALSA bug#1365 */ 1291 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, 1292 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]", 1293 .id = "Audigy2", 1294 .emu10k2_chip = 1, 1295 .ca0102_chip = 1, 1296 .ca0151_chip = 1, 1297 .spk71 = 1, 1298 .spdif_bug = 1, 1299 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1300 .ac97_chip = 1} , 1301 /* Audigy 2 Platinum */ 1302 /* Win driver sets A_IOCFG output to 0xa00 */ 1303 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, 1304 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]", 1305 .id = "Audigy2", 1306 .emu10k2_chip = 1, 1307 .ca0102_chip = 1, 1308 .ca0151_chip = 1, 1309 .spk71 = 1, 1310 .spdif_bug = 1, 1311 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1312 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ 1313 .ac97_chip = 1} , 1314 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, 1315 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]", 1316 .id = "Audigy2", 1317 .emu10k2_chip = 1, 1318 .ca0102_chip = 1, 1319 .ca0151_chip = 1, 1320 .spdif_bug = 1, 1321 .ac97_chip = 1} , 1322 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, 1323 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]", 1324 .id = "Audigy", 1325 .emu10k2_chip = 1, 1326 .ca0102_chip = 1, 1327 .ac97_chip = 1} , 1328 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, 1329 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]", 1330 .id = "Audigy", 1331 .emu10k2_chip = 1, 1332 .ca0102_chip = 1, 1333 .spdif_bug = 1, 1334 .ac97_chip = 1} , 1335 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, 1336 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]", 1337 .id = "Audigy", 1338 .emu10k2_chip = 1, 1339 .ca0102_chip = 1, 1340 .ac97_chip = 1} , 1341 {.vendor = 0x1102, .device = 0x0004, 1342 .driver = "Audigy", .name = "Audigy 1 [Unknown]", 1343 .id = "Audigy", 1344 .emu10k2_chip = 1, 1345 .ca0102_chip = 1, 1346 .ac97_chip = 1} , 1347 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, 1348 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1349 .id = "Live", 1350 .emu10k1_chip = 1, 1351 .ac97_chip = 1, 1352 .sblive51 = 1} , 1353 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102, 1354 .driver = "EMU10K1", .name = "SB Live! [SB0105]", 1355 .id = "Live", 1356 .emu10k1_chip = 1, 1357 .ac97_chip = 1, 1358 .sblive51 = 1} , 1359 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102, 1360 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]", 1361 .id = "Live", 1362 .emu10k1_chip = 1, 1363 .ac97_chip = 1, 1364 .sblive51 = 1} , 1365 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, 1366 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]", 1367 .id = "Live", 1368 .emu10k1_chip = 1, 1369 .ac97_chip = 1, 1370 .sblive51 = 1} , 1371 /* Tested by ALSA bug#1680 26th December 2005 */ 1372 /* note: It really has SB0220 written on the card, */ 1373 /* but it's SB0228 according to kx.inf */ 1374 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, 1375 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]", 1376 .id = "Live", 1377 .emu10k1_chip = 1, 1378 .ac97_chip = 1, 1379 .sblive51 = 1} , 1380 /* Tested by Thomas Zehetbauer 27th Aug 2005 */ 1381 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, 1382 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1383 .id = "Live", 1384 .emu10k1_chip = 1, 1385 .ac97_chip = 1, 1386 .sblive51 = 1} , 1387 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, 1388 .driver = "EMU10K1", .name = "SB Live! 5.1", 1389 .id = "Live", 1390 .emu10k1_chip = 1, 1391 .ac97_chip = 1, 1392 .sblive51 = 1} , 1393 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ 1394 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, 1395 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]", 1396 .id = "Live", 1397 .emu10k1_chip = 1, 1398 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum 1399 * share the same IDs! 1400 */ 1401 .sblive51 = 1} , 1402 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, 1403 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]", 1404 .id = "Live", 1405 .emu10k1_chip = 1, 1406 .ac97_chip = 1, 1407 .sblive51 = 1} , 1408 /* SB Live! Platinum */ 1409 /* Win driver sets A_IOCFG output to 0 */ 1410 /* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */ 1411 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, 1412 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]", 1413 .id = "Live", 1414 .emu10k1_chip = 1, 1415 .ac97_chip = 1} , 1416 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, 1417 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]", 1418 .id = "Live", 1419 .emu10k1_chip = 1, 1420 .ac97_chip = 1, 1421 .sblive51 = 1} , 1422 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, 1423 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]", 1424 .id = "Live", 1425 .emu10k1_chip = 1, 1426 .ac97_chip = 1, 1427 .sblive51 = 1} , 1428 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, 1429 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]", 1430 .id = "Live", 1431 .emu10k1_chip = 1, 1432 .ac97_chip = 1, 1433 .sblive51 = 1} , 1434 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1435 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, 1436 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]", 1437 .id = "Live", 1438 .emu10k1_chip = 1, 1439 .ac97_chip = 1, 1440 .sblive51 = 1} , 1441 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, 1442 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]", 1443 .id = "Live", 1444 .emu10k1_chip = 1, 1445 .ac97_chip = 1, 1446 .sblive51 = 1} , 1447 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, 1448 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", 1449 .id = "Live", 1450 .emu10k1_chip = 1, 1451 .ac97_chip = 1, 1452 .sblive51 = 1} , 1453 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, 1454 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]", 1455 .id = "Live", 1456 .emu10k1_chip = 1, 1457 .ac97_chip = 1, 1458 .sblive51 = 1} , 1459 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, 1460 .driver = "EMU10K1", .name = "E-MU APS [PC545]", 1461 .id = "APS", 1462 .emu10k1_chip = 1, 1463 .ecard = 1} , 1464 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, 1465 .driver = "EMU10K1", .name = "SB Live! [CT4620]", 1466 .id = "Live", 1467 .emu10k1_chip = 1, 1468 .ac97_chip = 1, 1469 .sblive51 = 1} , 1470 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, 1471 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]", 1472 .id = "Live", 1473 .emu10k1_chip = 1, 1474 .ac97_chip = 1, 1475 .sblive51 = 1} , 1476 {.vendor = 0x1102, .device = 0x0002, 1477 .driver = "EMU10K1", .name = "SB Live! [Unknown]", 1478 .id = "Live", 1479 .emu10k1_chip = 1, 1480 .ac97_chip = 1, 1481 .sblive51 = 1} , 1482 { } /* terminator */ 1483 }; 1484 1485 /* 1486 * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too) 1487 * has a problem that from time to time it likes to do few DMA reads a bit 1488 * beyond its normal allocation and gets very confused if these reads get 1489 * blocked by a IOMMU. 1490 * 1491 * This behaviour has been observed for the first (reserved) page 1492 * (for which it happens multiple times at every playback), often for various 1493 * synth pages and sometimes for PCM playback buffers and the page table 1494 * memory itself. 1495 * 1496 * As a workaround let's widen these DMA allocations by an extra page if we 1497 * detect that the device is behind a non-passthrough IOMMU. 1498 */ 1499 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu) 1500 { 1501 struct iommu_domain *domain; 1502 1503 emu->iommu_workaround = false; 1504 1505 domain = iommu_get_domain_for_dev(emu->card->dev); 1506 if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY) 1507 return; 1508 1509 dev_notice(emu->card->dev, 1510 "non-passthrough IOMMU detected, widening DMA allocations"); 1511 emu->iommu_workaround = true; 1512 } 1513 1514 int snd_emu10k1_create(struct snd_card *card, 1515 struct pci_dev *pci, 1516 unsigned short extin_mask, 1517 unsigned short extout_mask, 1518 long max_cache_bytes, 1519 int enable_ir, 1520 uint subsystem) 1521 { 1522 struct snd_emu10k1 *emu = card->private_data; 1523 int idx, err; 1524 int is_audigy; 1525 size_t page_table_size; 1526 __le32 *pgtbl; 1527 unsigned int silent_page; 1528 const struct snd_emu_chip_details *c; 1529 1530 /* enable PCI device */ 1531 err = pcim_enable_device(pci); 1532 if (err < 0) 1533 return err; 1534 1535 card->private_free = snd_emu10k1_free; 1536 emu->card = card; 1537 spin_lock_init(&emu->reg_lock); 1538 spin_lock_init(&emu->emu_lock); 1539 spin_lock_init(&emu->spi_lock); 1540 spin_lock_init(&emu->i2c_lock); 1541 spin_lock_init(&emu->voice_lock); 1542 spin_lock_init(&emu->synth_lock); 1543 spin_lock_init(&emu->memblk_lock); 1544 mutex_init(&emu->fx8010.lock); 1545 INIT_LIST_HEAD(&emu->mapped_link_head); 1546 INIT_LIST_HEAD(&emu->mapped_order_link_head); 1547 emu->pci = pci; 1548 emu->irq = -1; 1549 emu->synth = NULL; 1550 emu->get_synth_voice = NULL; 1551 INIT_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work); 1552 INIT_WORK(&emu->emu1010.clock_work, emu1010_clock_work); 1553 /* read revision & serial */ 1554 emu->revision = pci->revision; 1555 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); 1556 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); 1557 dev_dbg(card->dev, 1558 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", 1559 pci->vendor, pci->device, emu->serial, emu->model); 1560 1561 for (c = emu_chip_details; c->vendor; c++) { 1562 if (c->vendor == pci->vendor && c->device == pci->device) { 1563 if (subsystem) { 1564 if (c->subsystem && (c->subsystem == subsystem)) 1565 break; 1566 else 1567 continue; 1568 } else { 1569 if (c->subsystem && (c->subsystem != emu->serial)) 1570 continue; 1571 if (c->revision && c->revision != emu->revision) 1572 continue; 1573 } 1574 break; 1575 } 1576 } 1577 if (c->vendor == 0) { 1578 dev_err(card->dev, "emu10k1: Card not recognised\n"); 1579 return -ENOENT; 1580 } 1581 emu->card_capabilities = c; 1582 if (c->subsystem && !subsystem) 1583 dev_dbg(card->dev, "Sound card name = %s\n", c->name); 1584 else if (subsystem) 1585 dev_dbg(card->dev, "Sound card name = %s, " 1586 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. " 1587 "Forced to subsystem = 0x%x\n", c->name, 1588 pci->vendor, pci->device, emu->serial, c->subsystem); 1589 else 1590 dev_dbg(card->dev, "Sound card name = %s, " 1591 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n", 1592 c->name, pci->vendor, pci->device, 1593 emu->serial); 1594 1595 if (!*card->id && c->id) 1596 strscpy(card->id, c->id, sizeof(card->id)); 1597 1598 is_audigy = emu->audigy = c->emu10k2_chip; 1599 1600 snd_emu10k1_detect_iommu(emu); 1601 1602 /* set addressing mode */ 1603 emu->address_mode = is_audigy ? 0 : 1; 1604 /* set the DMA transfer mask */ 1605 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK; 1606 if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) { 1607 dev_err(card->dev, 1608 "architecture does not support PCI busmaster DMA with mask 0x%lx\n", 1609 emu->dma_mask); 1610 return -ENXIO; 1611 } 1612 if (is_audigy) 1613 emu->gpr_base = A_FXGPREGBASE; 1614 else 1615 emu->gpr_base = FXGPREGBASE; 1616 1617 err = pci_request_regions(pci, "EMU10K1"); 1618 if (err < 0) 1619 return err; 1620 emu->port = pci_resource_start(pci, 0); 1621 1622 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; 1623 1624 page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 : 1625 MAXPAGES0); 1626 if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size, 1627 &emu->ptb_pages) < 0) 1628 return -ENOMEM; 1629 dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n", 1630 (unsigned long)emu->ptb_pages.addr, 1631 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes)); 1632 1633 emu->page_ptr_table = vmalloc(array_size(sizeof(void *), 1634 emu->max_cache_pages)); 1635 emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long), 1636 emu->max_cache_pages)); 1637 if (!emu->page_ptr_table || !emu->page_addr_table) 1638 return -ENOMEM; 1639 1640 if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE, 1641 &emu->silent_page) < 0) 1642 return -ENOMEM; 1643 dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n", 1644 (unsigned long)emu->silent_page.addr, 1645 (unsigned long)(emu->silent_page.addr + 1646 emu->silent_page.bytes)); 1647 1648 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); 1649 if (!emu->memhdr) 1650 return -ENOMEM; 1651 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - 1652 sizeof(struct snd_util_memblk); 1653 1654 pci_set_master(pci); 1655 1656 // The masks are not used for Audigy. 1657 // FIXME: these should come from the card_capabilites table. 1658 if (extin_mask == 0) 1659 extin_mask = 0x3fcf; // EXTIN_* 1660 if (extout_mask == 0) 1661 extout_mask = 0x7fff; // EXTOUT_* 1662 emu->fx8010.extin_mask = extin_mask; 1663 emu->fx8010.extout_mask = extout_mask; 1664 emu->enable_ir = enable_ir; 1665 1666 if (emu->card_capabilities->ca_cardbus_chip) { 1667 err = snd_emu10k1_cardbus_init(emu); 1668 if (err < 0) 1669 return err; 1670 } 1671 if (emu->card_capabilities->ecard) { 1672 err = snd_emu10k1_ecard_init(emu); 1673 if (err < 0) 1674 return err; 1675 } else if (emu->card_capabilities->emu_model) { 1676 err = snd_emu10k1_emu1010_init(emu); 1677 if (err < 0) 1678 return err; 1679 } else { 1680 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version 1681 does not support this, it shouldn't do any harm */ 1682 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, 1683 AC97SLOT_CNTR|AC97SLOT_LFE); 1684 } 1685 1686 /* initialize TRAM setup */ 1687 emu->fx8010.itram_size = (16 * 1024)/2; 1688 emu->fx8010.etram_pages.area = NULL; 1689 emu->fx8010.etram_pages.bytes = 0; 1690 1691 /* irq handler must be registered after I/O ports are activated */ 1692 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt, 1693 IRQF_SHARED, KBUILD_MODNAME, emu)) 1694 return -EBUSY; 1695 emu->irq = pci->irq; 1696 card->sync_irq = emu->irq; 1697 1698 /* 1699 * Init to 0x02109204 : 1700 * Clock accuracy = 0 (1000ppm) 1701 * Sample Rate = 2 (48kHz) 1702 * Audio Channel = 1 (Left of 2) 1703 * Source Number = 0 (Unspecified) 1704 * Generation Status = 1 (Original for Cat Code 12) 1705 * Cat Code = 12 (Digital Signal Mixer) 1706 * Mode = 0 (Mode 0) 1707 * Emphasis = 0 (None) 1708 * CP = 1 (Copyright unasserted) 1709 * AN = 0 (Audio data) 1710 * P = 0 (Consumer) 1711 */ 1712 emu->spdif_bits[0] = emu->spdif_bits[1] = 1713 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1714 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1715 SPCS_GENERATIONSTATUS | 0x00001200 | 1716 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1717 1718 /* Clear silent pages and set up pointers */ 1719 memset(emu->silent_page.area, 0, emu->silent_page.bytes); 1720 silent_page = emu->silent_page.addr << emu->address_mode; 1721 pgtbl = (__le32 *)emu->ptb_pages.area; 1722 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++) 1723 pgtbl[idx] = cpu_to_le32(silent_page | idx); 1724 1725 /* set up voice indices */ 1726 for (idx = 0; idx < NUM_G; idx++) 1727 emu->voices[idx].number = idx; 1728 1729 err = snd_emu10k1_init(emu, enable_ir); 1730 if (err < 0) 1731 return err; 1732 #ifdef CONFIG_PM_SLEEP 1733 err = alloc_pm_buffer(emu); 1734 if (err < 0) 1735 return err; 1736 #endif 1737 1738 /* Initialize the effect engine */ 1739 err = snd_emu10k1_init_efx(emu); 1740 if (err < 0) 1741 return err; 1742 snd_emu10k1_audio_enable(emu); 1743 1744 #ifdef CONFIG_SND_PROC_FS 1745 snd_emu10k1_proc_init(emu); 1746 #endif 1747 return 0; 1748 } 1749 1750 #ifdef CONFIG_PM_SLEEP 1751 static const unsigned char saved_regs[] = { 1752 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, 1753 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, 1754 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, 1755 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, 1756 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, 1757 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, 1758 0xff /* end */ 1759 }; 1760 static const unsigned char saved_regs_audigy[] = { 1761 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC, 1762 A_FXRT2, A_SENDAMOUNTS, A_FXRT1, 1763 0xff /* end */ 1764 }; 1765 1766 static int alloc_pm_buffer(struct snd_emu10k1 *emu) 1767 { 1768 int size; 1769 1770 size = ARRAY_SIZE(saved_regs); 1771 if (emu->audigy) 1772 size += ARRAY_SIZE(saved_regs_audigy); 1773 emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size)); 1774 if (!emu->saved_ptr) 1775 return -ENOMEM; 1776 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) 1777 return -ENOMEM; 1778 if (emu->card_capabilities->ca0151_chip && 1779 snd_p16v_alloc_pm_buffer(emu) < 0) 1780 return -ENOMEM; 1781 return 0; 1782 } 1783 1784 static void free_pm_buffer(struct snd_emu10k1 *emu) 1785 { 1786 vfree(emu->saved_ptr); 1787 snd_emu10k1_efx_free_pm_buffer(emu); 1788 if (emu->card_capabilities->ca0151_chip) 1789 snd_p16v_free_pm_buffer(emu); 1790 } 1791 1792 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) 1793 { 1794 int i; 1795 const unsigned char *reg; 1796 unsigned int *val; 1797 1798 val = emu->saved_ptr; 1799 for (reg = saved_regs; *reg != 0xff; reg++) 1800 for (i = 0; i < NUM_G; i++, val++) 1801 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1802 if (emu->audigy) { 1803 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1804 for (i = 0; i < NUM_G; i++, val++) 1805 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1806 } 1807 if (emu->audigy) 1808 emu->saved_a_iocfg = inw(emu->port + A_IOCFG); 1809 emu->saved_hcfg = inl(emu->port + HCFG); 1810 } 1811 1812 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) 1813 { 1814 if (emu->card_capabilities->ca_cardbus_chip) 1815 snd_emu10k1_cardbus_init(emu); 1816 if (emu->card_capabilities->ecard) 1817 snd_emu10k1_ecard_init(emu); 1818 else if (emu->card_capabilities->emu_model) 1819 snd_emu10k1_emu1010_init(emu); 1820 else 1821 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); 1822 snd_emu10k1_init(emu, emu->enable_ir); 1823 } 1824 1825 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) 1826 { 1827 int i; 1828 const unsigned char *reg; 1829 unsigned int *val; 1830 1831 snd_emu10k1_audio_enable(emu); 1832 1833 /* resore for spdif */ 1834 if (emu->audigy) 1835 outw(emu->saved_a_iocfg, emu->port + A_IOCFG); 1836 outl(emu->saved_hcfg, emu->port + HCFG); 1837 1838 val = emu->saved_ptr; 1839 for (reg = saved_regs; *reg != 0xff; reg++) 1840 for (i = 0; i < NUM_G; i++, val++) 1841 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1842 if (emu->audigy) { 1843 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1844 for (i = 0; i < NUM_G; i++, val++) 1845 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1846 } 1847 } 1848 #endif 1849