xref: /linux/sound/pci/emu10k1/emu10k1_main.c (revision 9034ff11693b0246ef0e2bd5b69b2686c429070f)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4  *                   Creative Labs, Inc.
5  *  Routines for control of EMU10K1 chips
6  *
7  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
8  *      Added support for Audigy 2 Value.
9  *  	Added EMU 1010 support.
10  *  	General bug fixes and enhancements.
11  */
12 
13 #include <linux/sched.h>
14 #include <linux/delay.h>
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/iommu.h>
19 #include <linux/pci.h>
20 #include <linux/slab.h>
21 #include <linux/vmalloc.h>
22 #include <linux/mutex.h>
23 
24 
25 #include <sound/core.h>
26 #include <sound/emu10k1.h>
27 #include <linux/firmware.h>
28 #include "p16v.h"
29 #include "tina2.h"
30 #include "p17v.h"
31 
32 
33 #define HANA_FILENAME "emu/hana.fw"
34 #define DOCK_FILENAME "emu/audio_dock.fw"
35 #define EMU1010B_FILENAME "emu/emu1010b.fw"
36 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
37 #define EMU0404_FILENAME "emu/emu0404.fw"
38 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
39 
40 MODULE_FIRMWARE(HANA_FILENAME);
41 MODULE_FIRMWARE(DOCK_FILENAME);
42 MODULE_FIRMWARE(EMU1010B_FILENAME);
43 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
44 MODULE_FIRMWARE(EMU0404_FILENAME);
45 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
46 
47 
48 /*************************************************************************
49  * EMU10K1 init / done
50  *************************************************************************/
51 
52 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
53 {
54 	snd_emu10k1_ptr_write_multiple(emu, ch,
55 		DCYSUSV, 0,
56 		VTFT, VTFT_FILTERTARGET_MASK,
57 		CVCF, CVCF_CURRENTFILTER_MASK,
58 		PTRX, 0,
59 		CPF, 0,
60 		CCR, 0,
61 
62 		PSST, 0,
63 		DSL, 0x10,
64 		CCCA, 0,
65 		Z1, 0,
66 		Z2, 0,
67 		FXRT, 0x32100000,
68 
69 		// The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero
70 		DCYSUSM, 0,
71 		ATKHLDV, 0,
72 		ATKHLDM, 0,
73 		IP, 0,
74 		IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK,
75 		PEFE, 0,
76 		FMMOD, 0,
77 		TREMFRQ, 24,	/* 1 Hz */
78 		FM2FRQ2, 24,	/* 1 Hz */
79 		LFOVAL2, 0,
80 		LFOVAL1, 0,
81 		ENVVOL, 0,
82 		ENVVAL, 0,
83 
84 		REGLIST_END);
85 
86 	/* Audigy extra stuffs */
87 	if (emu->audigy) {
88 		snd_emu10k1_ptr_write_multiple(emu, ch,
89 			A_CSBA, 0,
90 			A_CSDC, 0,
91 			A_CSFE, 0,
92 			A_CSHG, 0,
93 			A_FXRT1, 0x03020100,
94 			A_FXRT2, 0x07060504,
95 			A_SENDAMOUNTS, 0,
96 			REGLIST_END);
97 	}
98 }
99 
100 static const unsigned int spi_dac_init[] = {
101 		0x00ff,
102 		0x02ff,
103 		0x0400,
104 		0x0520,
105 		0x0600,
106 		0x08ff,
107 		0x0aff,
108 		0x0cff,
109 		0x0eff,
110 		0x10ff,
111 		0x1200,
112 		0x1400,
113 		0x1480,
114 		0x1800,
115 		0x1aff,
116 		0x1cff,
117 		0x1e00,
118 		0x0530,
119 		0x0602,
120 		0x0622,
121 		0x1400,
122 };
123 
124 static const unsigned int i2c_adc_init[][2] = {
125 	{ 0x17, 0x00 }, /* Reset */
126 	{ 0x07, 0x00 }, /* Timeout */
127 	{ 0x0b, 0x22 },  /* Interface control */
128 	{ 0x0c, 0x22 },  /* Master mode control */
129 	{ 0x0d, 0x08 },  /* Powerdown control */
130 	{ 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
131 	{ 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
132 	{ 0x10, 0x7b },  /* ALC Control 1 */
133 	{ 0x11, 0x00 },  /* ALC Control 2 */
134 	{ 0x12, 0x32 },  /* ALC Control 3 */
135 	{ 0x13, 0x00 },  /* Noise gate control */
136 	{ 0x14, 0xa6 },  /* Limiter control */
137 	{ 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for A2ZS Notebook */
138 };
139 
140 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir)
141 {
142 	unsigned int silent_page;
143 	int ch;
144 	u32 tmp;
145 
146 	/* disable audio and lock cache */
147 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
148 		HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
149 
150 	outl(0, emu->port + INTE);
151 
152 	snd_emu10k1_ptr_write_multiple(emu, 0,
153 		/* reset recording buffers */
154 		MICBS, ADCBS_BUFSIZE_NONE,
155 		MICBA, 0,
156 		FXBS, ADCBS_BUFSIZE_NONE,
157 		FXBA, 0,
158 		ADCBS, ADCBS_BUFSIZE_NONE,
159 		ADCBA, 0,
160 
161 		/* disable channel interrupt */
162 		CLIEL, 0,
163 		CLIEH, 0,
164 
165 		/* disable stop on loop end */
166 		SOLEL, 0,
167 		SOLEH, 0,
168 
169 		REGLIST_END);
170 
171 	if (emu->audigy) {
172 		/* set SPDIF bypass mode */
173 		snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
174 		/* enable rear left + rear right AC97 slots */
175 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
176 				      AC97SLOT_REAR_LEFT);
177 	}
178 
179 	/* init envelope engine */
180 	for (ch = 0; ch < NUM_G; ch++)
181 		snd_emu10k1_voice_init(emu, ch);
182 
183 	snd_emu10k1_ptr_write_multiple(emu, 0,
184 		SPCS0, emu->spdif_bits[0],
185 		SPCS1, emu->spdif_bits[1],
186 		SPCS2, emu->spdif_bits[2],
187 		REGLIST_END);
188 
189 	if (emu->card_capabilities->emu_model) {
190 	} else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
191 		/* Hacks for Alice3 to work independent of haP16V driver */
192 		/* Setup SRCMulti_I2S SamplingRate */
193 		snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
194 
195 		/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
196 		snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
197 		/* Setup SRCMulti Input Audio Enable */
198 		/* Use 0xFFFFFFFF to enable P16V sounds. */
199 		snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
200 
201 		/* Enabled Phased (8-channel) P16V playback */
202 		outl(0x0201, emu->port + HCFG2);
203 		/* Set playback routing. */
204 		snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
205 	} else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
206 		/* Hacks for Alice3 to work independent of haP16V driver */
207 		dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
208 		/* Setup SRCMulti_I2S SamplingRate */
209 		snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
210 
211 		/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
212 		snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14);
213 
214 		/* Setup SRCMulti Input Audio Enable */
215 		snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000);
216 
217 		/* Setup SPDIF Out Audio Enable */
218 		/* The Audigy 2 Value has a separate SPDIF out,
219 		 * so no need for a mixer switch
220 		 */
221 		snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000);
222 
223 		tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
224 		outw(tmp, emu->port + A_IOCFG);
225 	}
226 	if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
227 		int size, n;
228 
229 		size = ARRAY_SIZE(spi_dac_init);
230 		for (n = 0; n < size; n++)
231 			snd_emu10k1_spi_write(emu, spi_dac_init[n]);
232 
233 		snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
234 		/* Enable GPIOs
235 		 * GPIO0: Unknown
236 		 * GPIO1: Speakers-enabled.
237 		 * GPIO2: Unknown
238 		 * GPIO3: Unknown
239 		 * GPIO4: IEC958 Output on.
240 		 * GPIO5: Unknown
241 		 * GPIO6: Unknown
242 		 * GPIO7: Unknown
243 		 */
244 		outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
245 	}
246 	if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
247 		int size, n;
248 
249 		snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
250 		tmp = inw(emu->port + A_IOCFG);
251 		outw(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
252 		tmp = inw(emu->port + A_IOCFG);
253 		size = ARRAY_SIZE(i2c_adc_init);
254 		for (n = 0; n < size; n++)
255 			snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
256 		for (n = 0; n < 4; n++) {
257 			emu->i2c_capture_volume[n][0] = 0xcf;
258 			emu->i2c_capture_volume[n][1] = 0xcf;
259 		}
260 	}
261 
262 
263 	snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
264 	snd_emu10k1_ptr_write(emu, TCB, 0, 0);	/* taken from original driver */
265 	snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K);	/* taken from original driver */
266 
267 	silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
268 	for (ch = 0; ch < NUM_G; ch++) {
269 		snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
270 		snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
271 	}
272 
273 	if (emu->card_capabilities->emu_model) {
274 		outl(HCFG_AUTOMUTE_ASYNC |
275 			HCFG_EMU32_SLAVE |
276 			HCFG_AUDIOENABLE, emu->port + HCFG);
277 	/*
278 	 *  Hokay, setup HCFG
279 	 *   Mute Disable Audio = 0
280 	 *   Lock Tank Memory = 1
281 	 *   Lock Sound Memory = 0
282 	 *   Auto Mute = 1
283 	 */
284 	} else if (emu->audigy) {
285 		if (emu->revision == 4) /* audigy2 */
286 			outl(HCFG_AUDIOENABLE |
287 			     HCFG_AC3ENABLE_CDSPDIF |
288 			     HCFG_AC3ENABLE_GPSPDIF |
289 			     HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
290 		else
291 			outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
292 	/* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
293 	 * e.g. card_capabilities->joystick */
294 	} else if (emu->model == 0x20 ||
295 	    emu->model == 0xc400 ||
296 	    (emu->model == 0x21 && emu->revision < 6))
297 		outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
298 	else
299 		/* With on-chip joystick */
300 		outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
301 
302 	if (enable_ir) {	/* enable IR for SB Live */
303 		if (emu->card_capabilities->emu_model) {
304 			;  /* Disable all access to A_IOCFG for the emu1010 */
305 		} else if (emu->card_capabilities->i2c_adc) {
306 			;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
307 		} else if (emu->audigy) {
308 			u16 reg = inw(emu->port + A_IOCFG);
309 			outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
310 			udelay(500);
311 			outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
312 			udelay(100);
313 			outw(reg, emu->port + A_IOCFG);
314 		} else {
315 			unsigned int reg = inl(emu->port + HCFG);
316 			outl(reg | HCFG_GPOUT2, emu->port + HCFG);
317 			udelay(500);
318 			outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
319 			udelay(100);
320 			outl(reg, emu->port + HCFG);
321 		}
322 	}
323 
324 	if (emu->card_capabilities->emu_model) {
325 		;  /* Disable all access to A_IOCFG for the emu1010 */
326 	} else if (emu->card_capabilities->i2c_adc) {
327 		;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
328 	} else if (emu->audigy) {	/* enable analog output */
329 		u16 reg = inw(emu->port + A_IOCFG);
330 		outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
331 	}
332 
333 	if (emu->address_mode == 0) {
334 		/* use 16M in 4G */
335 		outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
336 	}
337 
338 	return 0;
339 }
340 
341 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
342 {
343 	/*
344 	 *  Enable the audio bit
345 	 */
346 	outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
347 
348 	/* Enable analog/digital outs on audigy */
349 	if (emu->card_capabilities->emu_model) {
350 		;  /* Disable all access to A_IOCFG for the emu1010 */
351 	} else if (emu->card_capabilities->i2c_adc) {
352 		;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
353 	} else if (emu->audigy) {
354 		outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
355 
356 		if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
357 			/* Unmute Analog now.  Set GPO6 to 1 for Apollo.
358 			 * This has to be done after init ALice3 I2SOut beyond 48KHz.
359 			 * So, sequence is important. */
360 			outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
361 		} else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
362 			/* Unmute Analog now. */
363 			outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
364 		} else {
365 			/* Disable routing from AC97 line out to Front speakers */
366 			outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
367 		}
368 	}
369 
370 #if 0
371 	{
372 	unsigned int tmp;
373 	/* FIXME: the following routine disables LiveDrive-II !! */
374 	/* TOSLink detection */
375 	emu->tos_link = 0;
376 	tmp = inl(emu->port + HCFG);
377 	if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
378 		outl(tmp|0x800, emu->port + HCFG);
379 		udelay(50);
380 		if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
381 			emu->tos_link = 1;
382 			outl(tmp, emu->port + HCFG);
383 		}
384 	}
385 	}
386 #endif
387 
388 	if (emu->card_capabilities->emu_model)
389 		snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE | INTE_A_GPIOENABLE);
390 	else
391 		snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
392 }
393 
394 int snd_emu10k1_done(struct snd_emu10k1 *emu)
395 {
396 	int ch;
397 
398 	outl(0, emu->port + INTE);
399 
400 	/*
401 	 *  Shutdown the voices
402 	 */
403 	for (ch = 0; ch < NUM_G; ch++) {
404 		snd_emu10k1_ptr_write_multiple(emu, ch,
405 			DCYSUSV, 0,
406 			VTFT, 0,
407 			CVCF, 0,
408 			PTRX, 0,
409 			CPF, 0,
410 			REGLIST_END);
411 	}
412 
413 	// stop the DSP
414 	if (emu->audigy)
415 		snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
416 	else
417 		snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
418 
419 	snd_emu10k1_ptr_write_multiple(emu, 0,
420 		/* reset recording buffers */
421 		MICBS, 0,
422 		MICBA, 0,
423 		FXBS, 0,
424 		FXBA, 0,
425 		FXWC, 0,
426 		ADCBS, ADCBS_BUFSIZE_NONE,
427 		ADCBA, 0,
428 		TCBS, TCBS_BUFFSIZE_16K,
429 		TCB, 0,
430 
431 		/* disable channel interrupt */
432 		CLIEL, 0,
433 		CLIEH, 0,
434 		SOLEL, 0,
435 		SOLEH, 0,
436 
437 		PTB, 0,
438 
439 		REGLIST_END);
440 
441 	/* disable audio and lock cache */
442 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
443 
444 	return 0;
445 }
446 
447 /*************************************************************************
448  * ECARD functional implementation
449  *************************************************************************/
450 
451 /* In A1 Silicon, these bits are in the HC register */
452 #define HOOKN_BIT		(1L << 12)
453 #define HANDN_BIT		(1L << 11)
454 #define PULSEN_BIT		(1L << 10)
455 
456 #define EC_GDI1			(1 << 13)
457 #define EC_GDI0			(1 << 14)
458 
459 #define EC_NUM_CONTROL_BITS	20
460 
461 #define EC_AC3_DATA_SELN	0x0001L
462 #define EC_EE_DATA_SEL		0x0002L
463 #define EC_EE_CNTRL_SELN	0x0004L
464 #define EC_EECLK		0x0008L
465 #define EC_EECS			0x0010L
466 #define EC_EESDO		0x0020L
467 #define EC_TRIM_CSN		0x0040L
468 #define EC_TRIM_SCLK		0x0080L
469 #define EC_TRIM_SDATA		0x0100L
470 #define EC_TRIM_MUTEN		0x0200L
471 #define EC_ADCCAL		0x0400L
472 #define EC_ADCRSTN		0x0800L
473 #define EC_DACCAL		0x1000L
474 #define EC_DACMUTEN		0x2000L
475 #define EC_LEDN			0x4000L
476 
477 #define EC_SPDIF0_SEL_SHIFT	15
478 #define EC_SPDIF1_SEL_SHIFT	17
479 #define EC_SPDIF0_SEL_MASK	(0x3L << EC_SPDIF0_SEL_SHIFT)
480 #define EC_SPDIF1_SEL_MASK	(0x7L << EC_SPDIF1_SEL_SHIFT)
481 #define EC_SPDIF0_SELECT(_x)	(((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
482 #define EC_SPDIF1_SELECT(_x)	(((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
483 #define EC_CURRENT_PROM_VERSION 0x01	/* Self-explanatory.  This should
484 					 * be incremented any time the EEPROM's
485 					 * format is changed.  */
486 
487 #define EC_EEPROM_SIZE		0x40	/* ECARD EEPROM has 64 16-bit words */
488 
489 /* Addresses for special values stored in to EEPROM */
490 #define EC_PROM_VERSION_ADDR	0x20	/* Address of the current prom version */
491 #define EC_BOARDREV0_ADDR	0x21	/* LSW of board rev */
492 #define EC_BOARDREV1_ADDR	0x22	/* MSW of board rev */
493 
494 #define EC_LAST_PROMFILE_ADDR	0x2f
495 
496 #define EC_SERIALNUM_ADDR	0x30	/* First word of serial number.  The
497 					 * can be up to 30 characters in length
498 					 * and is stored as a NULL-terminated
499 					 * ASCII string.  Any unused bytes must be
500 					 * filled with zeros */
501 #define EC_CHECKSUM_ADDR	0x3f	/* Location at which checksum is stored */
502 
503 
504 /* Most of this stuff is pretty self-evident.  According to the hardware
505  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
506  * offset problem.  Weird.
507  */
508 #define EC_RAW_RUN_MODE		(EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
509 				 EC_TRIM_CSN)
510 
511 
512 #define EC_DEFAULT_ADC_GAIN	0xC4C4
513 #define EC_DEFAULT_SPDIF0_SEL	0x0
514 #define EC_DEFAULT_SPDIF1_SEL	0x4
515 
516 /**************************************************************************
517  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
518  *  control latch will is loaded bit-serially by toggling the Modem control
519  *  lines from function 2 on the E8010.  This function hides these details
520  *  and presents the illusion that we are actually writing to a distinct
521  *  register.
522  */
523 
524 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
525 {
526 	unsigned short count;
527 	unsigned int data;
528 	unsigned long hc_port;
529 	unsigned int hc_value;
530 
531 	hc_port = emu->port + HCFG;
532 	hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
533 	outl(hc_value, hc_port);
534 
535 	for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
536 
537 		/* Set up the value */
538 		data = ((value & 0x1) ? PULSEN_BIT : 0);
539 		value >>= 1;
540 
541 		outl(hc_value | data, hc_port);
542 
543 		/* Clock the shift register */
544 		outl(hc_value | data | HANDN_BIT, hc_port);
545 		outl(hc_value | data, hc_port);
546 	}
547 
548 	/* Latch the bits */
549 	outl(hc_value | HOOKN_BIT, hc_port);
550 	outl(hc_value, hc_port);
551 }
552 
553 /**************************************************************************
554  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
555  * trim value consists of a 16bit value which is composed of two
556  * 8 bit gain/trim values, one for the left channel and one for the
557  * right channel.  The following table maps from the Gain/Attenuation
558  * value in decibels into the corresponding bit pattern for a single
559  * channel.
560  */
561 
562 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
563 					 unsigned short gain)
564 {
565 	unsigned int bit;
566 
567 	/* Enable writing to the TRIM registers */
568 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
569 
570 	/* Do it again to insure that we meet hold time requirements */
571 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
572 
573 	for (bit = (1 << 15); bit; bit >>= 1) {
574 		unsigned int value;
575 
576 		value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
577 
578 		if (gain & bit)
579 			value |= EC_TRIM_SDATA;
580 
581 		/* Clock the bit */
582 		snd_emu10k1_ecard_write(emu, value);
583 		snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
584 		snd_emu10k1_ecard_write(emu, value);
585 	}
586 
587 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
588 }
589 
590 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
591 {
592 	unsigned int hc_value;
593 
594 	/* Set up the initial settings */
595 	emu->ecard_ctrl = EC_RAW_RUN_MODE |
596 			  EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
597 			  EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
598 
599 	/* Step 0: Set the codec type in the hardware control register
600 	 * and enable audio output */
601 	hc_value = inl(emu->port + HCFG);
602 	outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
603 	inl(emu->port + HCFG);
604 
605 	/* Step 1: Turn off the led and deassert TRIM_CS */
606 	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
607 
608 	/* Step 2: Calibrate the ADC and DAC */
609 	snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
610 
611 	/* Step 3: Wait for awhile;   XXX We can't get away with this
612 	 * under a real operating system; we'll need to block and wait that
613 	 * way. */
614 	snd_emu10k1_wait(emu, 48000);
615 
616 	/* Step 4: Switch off the DAC and ADC calibration.  Note
617 	 * That ADC_CAL is actually an inverted signal, so we assert
618 	 * it here to stop calibration.  */
619 	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
620 
621 	/* Step 4: Switch into run mode */
622 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
623 
624 	/* Step 5: Set the analog input gain */
625 	snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
626 
627 	return 0;
628 }
629 
630 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
631 {
632 	unsigned long special_port;
633 	__always_unused unsigned int value;
634 
635 	/* Special initialisation routine
636 	 * before the rest of the IO-Ports become active.
637 	 */
638 	special_port = emu->port + 0x38;
639 	value = inl(special_port);
640 	outl(0x00d00000, special_port);
641 	value = inl(special_port);
642 	outl(0x00d00001, special_port);
643 	value = inl(special_port);
644 	outl(0x00d0005f, special_port);
645 	value = inl(special_port);
646 	outl(0x00d0007f, special_port);
647 	value = inl(special_port);
648 	outl(0x0090007f, special_port);
649 	value = inl(special_port);
650 
651 	snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
652 	/* Delay to give time for ADC chip to switch on. It needs 113ms */
653 	msleep(200);
654 	return 0;
655 }
656 
657 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu,
658 				     const struct firmware *fw_entry)
659 {
660 	int n, i;
661 	u16 reg;
662 	u8 value;
663 	__always_unused u16 write_post;
664 
665 	if (!fw_entry)
666 		return -EIO;
667 
668 	/* The FPGA is a Xilinx Spartan IIE XC2S50E */
669 	/* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */
670 	/* GPIO7 -> FPGA PGMN
671 	 * GPIO6 -> FPGA CCLK
672 	 * GPIO5 -> FPGA DIN
673 	 * FPGA CONFIG OFF -> FPGA PGMN
674 	 */
675 	spin_lock_irq(&emu->emu_lock);
676 	outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */
677 	write_post = inw(emu->port + A_GPIO);
678 	udelay(100);
679 	outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */
680 	write_post = inw(emu->port + A_GPIO);
681 	udelay(100); /* Allow FPGA memory to clean */
682 	for (n = 0; n < fw_entry->size; n++) {
683 		value = fw_entry->data[n];
684 		for (i = 0; i < 8; i++) {
685 			reg = 0x80;
686 			if (value & 0x1)
687 				reg = reg | 0x20;
688 			value = value >> 1;
689 			outw(reg, emu->port + A_GPIO);
690 			write_post = inw(emu->port + A_GPIO);
691 			outw(reg | 0x40, emu->port + A_GPIO);
692 			write_post = inw(emu->port + A_GPIO);
693 		}
694 	}
695 	/* After programming, set GPIO bit 4 high again. */
696 	outw(0x10, emu->port + A_GPIO);
697 	write_post = inw(emu->port + A_GPIO);
698 	spin_unlock_irq(&emu->emu_lock);
699 
700 	return 0;
701 }
702 
703 /* firmware file names, per model, init-fw and dock-fw (optional) */
704 static const char * const firmware_names[5][2] = {
705 	[EMU_MODEL_EMU1010] = {
706 		HANA_FILENAME, DOCK_FILENAME
707 	},
708 	[EMU_MODEL_EMU1010B] = {
709 		EMU1010B_FILENAME, MICRO_DOCK_FILENAME
710 	},
711 	[EMU_MODEL_EMU1616] = {
712 		EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME
713 	},
714 	[EMU_MODEL_EMU0404] = {
715 		EMU0404_FILENAME, NULL
716 	},
717 };
718 
719 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock,
720 				     const struct firmware **fw)
721 {
722 	const char *filename;
723 	int err;
724 
725 	if (!*fw) {
726 		filename = firmware_names[emu->card_capabilities->emu_model][dock];
727 		if (!filename)
728 			return 0;
729 		err = request_firmware(fw, filename, &emu->pci->dev);
730 		if (err)
731 			return err;
732 	}
733 
734 	return snd_emu1010_load_firmware_entry(emu, *fw);
735 }
736 
737 static void emu1010_firmware_work(struct work_struct *work)
738 {
739 	struct snd_emu10k1 *emu;
740 	u32 tmp, tmp2, reg;
741 	int err;
742 
743 	emu = container_of(work, struct snd_emu10k1,
744 			   emu1010.firmware_work);
745 	if (emu->card->shutdown)
746 		return;
747 #ifdef CONFIG_PM_SLEEP
748 	if (emu->suspend)
749 		return;
750 #endif
751 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
752 	if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
753 		/* Audio Dock attached */
754 		/* Return to Audio Dock programming mode */
755 		dev_info(emu->card->dev,
756 			 "emu1010: Loading Audio Dock Firmware\n");
757 		snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG,
758 				       EMU_HANA_FPGA_CONFIG_AUDIODOCK);
759 		err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw);
760 		if (err < 0)
761 			return;
762 		snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
763 		snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp);
764 		dev_info(emu->card->dev,
765 			 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp);
766 		if ((tmp & 0x1f) != 0x15) {
767 			/* FPGA failed to be programmed */
768 			dev_info(emu->card->dev,
769 				 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
770 				 tmp);
771 			return;
772 		}
773 		dev_info(emu->card->dev,
774 			 "emu1010: Audio Dock Firmware loaded\n");
775 		snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
776 		snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
777 		dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2);
778 		/* Sync clocking between 1010 and Dock */
779 		/* Allow DLL to settle */
780 		msleep(10);
781 		/* Unmute all. Default is muted after a firmware load */
782 		snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
783 	}
784 }
785 
786 static void emu1010_clock_work(struct work_struct *work)
787 {
788 	struct snd_emu10k1 *emu;
789 	struct snd_ctl_elem_id id;
790 
791 	emu = container_of(work, struct snd_emu10k1,
792 			   emu1010.clock_work);
793 	if (emu->card->shutdown)
794 		return;
795 #ifdef CONFIG_PM_SLEEP
796 	if (emu->suspend)
797 		return;
798 #endif
799 
800 	spin_lock_irq(&emu->reg_lock);
801 	// This is the only thing that can actually happen.
802 	emu->emu1010.clock_source = emu->emu1010.clock_fallback;
803 	emu->emu1010.wclock = 1 - emu->emu1010.clock_source;
804 	snd_emu1010_update_clock(emu);
805 	spin_unlock_irq(&emu->reg_lock);
806 	snd_ctl_build_ioff(&id, emu->ctl_clock_source, 0);
807 	snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE, &id);
808 }
809 
810 static void emu1010_interrupt(struct snd_emu10k1 *emu)
811 {
812 	u32 sts;
813 
814 	snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &sts);
815 	if (sts & EMU_HANA_IRQ_DOCK_LOST) {
816 		/* Audio Dock removed */
817 		dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
818 		/* The hardware auto-mutes all, so we unmute again */
819 		snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
820 	} else if (sts & EMU_HANA_IRQ_DOCK) {
821 		schedule_work(&emu->emu1010.firmware_work);
822 	}
823 	if (sts & EMU_HANA_IRQ_WCLK_CHANGED)
824 		schedule_work(&emu->emu1010.clock_work);
825 }
826 
827 /*
828  * Current status of the driver:
829  * ----------------------------
830  * 	* only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
831  * 	* PCM device nb. 2:
832  *		16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
833  * 		16 x 32-bit capture - snd_emu10k1_capture_efx_ops
834  */
835 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
836 {
837 	u32 tmp, tmp2, reg;
838 	int err;
839 
840 	dev_info(emu->card->dev, "emu1010: Special config.\n");
841 
842 	/* Mute, and disable audio and lock cache, just in case.
843 	 * Proper init follows in snd_emu10k1_init(). */
844 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
845 
846 	/* Disable 48Volt power to Audio Dock */
847 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
848 
849 	/* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
850 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
851 	dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
852 	if ((reg & 0x3f) == 0x15) {
853 		/* FPGA netlist already present so clear it */
854 		/* Return to programming mode */
855 
856 		snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA);
857 	}
858 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
859 	dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
860 	if ((reg & 0x3f) == 0x15) {
861 		/* FPGA failed to return to programming mode */
862 		dev_info(emu->card->dev,
863 			 "emu1010: FPGA failed to return to programming mode\n");
864 		return -ENODEV;
865 	}
866 	dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
867 
868 	err = snd_emu1010_load_firmware(emu, 0, &emu->firmware);
869 	if (err < 0) {
870 		dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
871 		return err;
872 	}
873 
874 	/* ID, should read & 0x7f = 0x55 when FPGA programmed. */
875 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
876 	if ((reg & 0x3f) != 0x15) {
877 		/* FPGA failed to be programmed */
878 		dev_info(emu->card->dev,
879 			 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
880 			 reg);
881 		return -ENODEV;
882 	}
883 
884 	dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
885 	snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
886 	snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
887 	dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
888 	/* Enable 48Volt power to Audio Dock */
889 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
890 
891 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
892 	dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
893 	if (reg & EMU_HANA_OPTION_DOCK_OFFLINE)
894 		schedule_work(&emu->emu1010.firmware_work);
895 	if (emu->card_capabilities->no_adat) {
896 		emu->emu1010.optical_in = 0; /* IN_SPDIF */
897 		emu->emu1010.optical_out = 0; /* OUT_SPDIF */
898 	} else {
899 		/* Optical -> ADAT I/O  */
900 		emu->emu1010.optical_in = 1; /* IN_ADAT */
901 		emu->emu1010.optical_out = 1; /* OUT_ADAT */
902 	}
903 	tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
904 		(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
905 	snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
906 	/* Set no attenuation on Audio Dock pads. */
907 	emu->emu1010.adc_pads = 0x00;
908 	snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads);
909 	/* Unmute Audio dock DACs, Headphone source DAC-4. */
910 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4);
911 	/* DAC PADs. */
912 	emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 |
913 				EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4;
914 	snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads);
915 	/* SPDIF Format. Set Consumer mode, 24bit, copy enable */
916 	snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID);
917 	/* MIDI routing */
918 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2);
919 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2);
920 
921 	emu->gpio_interrupt = emu1010_interrupt;
922 	// Note: The Audigy INTE is set later
923 	snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE,
924 			       EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST | EMU_HANA_IRQ_WCLK_CHANGED);
925 	snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);  // Clear pending IRQs
926 
927 	emu->emu1010.clock_source = 1;  /* 48000 */
928 	emu->emu1010.clock_fallback = 1;  /* 48000 */
929 	/* Default WCLK set to 48kHz. */
930 	snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K);
931 	/* Word Clock source, Internal 48kHz x1 */
932 	emu->emu1010.wclock = EMU_HANA_WCLOCK_INT_48K;
933 	snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
934 	/* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
935 	snd_emu1010_update_clock(emu);
936 
937 	// The routes are all set to EMU_SRC_SILENCE due to the reset,
938 	// so it is safe to simply enable the outputs.
939 	snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
940 
941 	return 0;
942 }
943 /*
944  *  Create the EMU10K1 instance
945  */
946 
947 #ifdef CONFIG_PM_SLEEP
948 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
949 static void free_pm_buffer(struct snd_emu10k1 *emu);
950 #endif
951 
952 static void snd_emu10k1_free(struct snd_card *card)
953 {
954 	struct snd_emu10k1 *emu = card->private_data;
955 
956 	if (emu->port) {	/* avoid access to already used hardware */
957 		snd_emu10k1_fx8010_tram_setup(emu, 0);
958 		snd_emu10k1_done(emu);
959 		snd_emu10k1_free_efx(emu);
960 	}
961 	if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
962 		/* Disable 48Volt power to Audio Dock */
963 		snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
964 	}
965 	cancel_work_sync(&emu->emu1010.firmware_work);
966 	cancel_work_sync(&emu->emu1010.clock_work);
967 	release_firmware(emu->firmware);
968 	release_firmware(emu->dock_fw);
969 	snd_util_memhdr_free(emu->memhdr);
970 	if (emu->silent_page.area)
971 		snd_dma_free_pages(&emu->silent_page);
972 	if (emu->ptb_pages.area)
973 		snd_dma_free_pages(&emu->ptb_pages);
974 	vfree(emu->page_ptr_table);
975 	vfree(emu->page_addr_table);
976 #ifdef CONFIG_PM_SLEEP
977 	free_pm_buffer(emu);
978 #endif
979 }
980 
981 static const struct snd_emu_chip_details emu_chip_details[] = {
982 	/* Audigy 5/Rx SB1550 */
983 	/* Tested by michael@gernoth.net 28 Mar 2015 */
984 	/* DSP: CA10300-IAT LF
985 	 * DAC: Cirrus Logic CS4382-KQZ
986 	 * ADC: Philips 1361T
987 	 * AC97: Sigmatel STAC9750
988 	 * CA0151: None
989 	 */
990 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
991 	 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
992 	 .id = "Audigy2",
993 	 .emu10k2_chip = 1,
994 	 .ca0108_chip = 1,
995 	 .spk71 = 1,
996 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
997 	 .ac97_chip = 1},
998 	/* Audigy4 (Not PRO) SB0610 */
999 	/* Tested by James@superbug.co.uk 4th April 2006 */
1000 	/* A_IOCFG bits
1001 	 * Output
1002 	 * 0: ?
1003 	 * 1: ?
1004 	 * 2: ?
1005 	 * 3: 0 - Digital Out, 1 - Line in
1006 	 * 4: ?
1007 	 * 5: ?
1008 	 * 6: ?
1009 	 * 7: ?
1010 	 * Input
1011 	 * 8: ?
1012 	 * 9: ?
1013 	 * A: Green jack sense (Front)
1014 	 * B: ?
1015 	 * C: Black jack sense (Rear/Side Right)
1016 	 * D: Yellow jack sense (Center/LFE/Side Left)
1017 	 * E: ?
1018 	 * F: ?
1019 	 *
1020 	 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1021 	 * 0 - Digital Out
1022 	 * 1 - Line in
1023 	 */
1024 	/* Mic input not tested.
1025 	 * Analog CD input not tested
1026 	 * Digital Out not tested.
1027 	 * Line in working.
1028 	 * Audio output 5.1 working. Side outputs not working.
1029 	 */
1030 	/* DSP: CA10300-IAT LF
1031 	 * DAC: Cirrus Logic CS4382-KQZ
1032 	 * ADC: Philips 1361T
1033 	 * AC97: Sigmatel STAC9750
1034 	 * CA0151: None
1035 	 */
1036 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1037 	 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1038 	 .id = "Audigy2",
1039 	 .emu10k2_chip = 1,
1040 	 .ca0108_chip = 1,
1041 	 .spk71 = 1,
1042 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1043 	 .ac97_chip = 1} ,
1044 	/* Audigy 2 Value AC3 out does not work yet.
1045 	 * Need to find out how to turn off interpolators.
1046 	 */
1047 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1048 	/* DSP: CA0108-IAT
1049 	 * DAC: CS4382-KQ
1050 	 * ADC: Philips 1361T
1051 	 * AC97: STAC9750
1052 	 * CA0151: None
1053 	 */
1054 	/*
1055 	 * A_IOCFG Input (GPIO)
1056 	 * 0x400  = Front analog jack plugged in. (Green socket)
1057 	 * 0x1000 = Rear analog jack plugged in. (Black socket)
1058 	 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket)
1059 	 * A_IOCFG Output (GPIO)
1060 	 * 0x60 = Sound out of front Left.
1061 	 * Win sets it to 0xXX61
1062 	 */
1063 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1064 	 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1065 	 .id = "Audigy2",
1066 	 .emu10k2_chip = 1,
1067 	 .ca0108_chip = 1,
1068 	 .spk71 = 1,
1069 	 .ac97_chip = 1} ,
1070 	/* Audigy 2 ZS Notebook Cardbus card.*/
1071 	/* Tested by James@superbug.co.uk 6th November 2006 */
1072 	/* Audio output 7.1/Headphones working.
1073 	 * Digital output working. (AC3 not checked, only PCM)
1074 	 * Audio Mic/Line inputs working.
1075 	 * Digital input not tested.
1076 	 */
1077 	/* DSP: Tina2
1078 	 * DAC: Wolfson WM8768/WM8568
1079 	 * ADC: Wolfson WM8775
1080 	 * AC97: None
1081 	 * CA0151: None
1082 	 */
1083 	/* Tested by James@superbug.co.uk 4th April 2006 */
1084 	/* A_IOCFG bits
1085 	 * Output
1086 	 * 0: Not Used
1087 	 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1088 	 * 2: Analog input 0 = line in, 1 = mic in
1089 	 * 3: Not Used
1090 	 * 4: Digital output 0 = off, 1 = on.
1091 	 * 5: Not Used
1092 	 * 6: Not Used
1093 	 * 7: Not Used
1094 	 * Input
1095 	 *      All bits 1 (0x3fxx) means nothing plugged in.
1096 	 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1097 	 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1098 	 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1099 	 * E-F: Always 0
1100 	 *
1101 	 */
1102 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1103 	 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1104 	 .id = "Audigy2",
1105 	 .emu10k2_chip = 1,
1106 	 .ca0108_chip = 1,
1107 	 .ca_cardbus_chip = 1,
1108 	 .spi_dac = 1,
1109 	 .i2c_adc = 1,
1110 	 .spk71 = 1} ,
1111 	/* This is MAEM8950 "Mana" */
1112 	/* Attach MicroDock[M] to make it an E-MU 1616[m]. */
1113 	/* Does NOT support sync daughter card (obviously). */
1114 	/* Tested by James@superbug.co.uk 4th Nov 2007. */
1115 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1116 	 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]",
1117 	 .id = "EMU1010",
1118 	 .emu10k2_chip = 1,
1119 	 .ca0108_chip = 1,
1120 	 .ca_cardbus_chip = 1,
1121 	 .spk71 = 1 ,
1122 	 .emu_model = EMU_MODEL_EMU1616},
1123 	/* Tested by James@superbug.co.uk 4th Nov 2007. */
1124 	/* This is MAEM8960 "Hana3", 0202 is MAEM8980 */
1125 	/* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1126 	 * MicroDock[M] to make it an E-MU 1616[m]. */
1127 	/* Does NOT support sync daughter card. */
1128 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1129 	 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]",
1130 	 .id = "EMU1010",
1131 	 .emu10k2_chip = 1,
1132 	 .ca0108_chip = 1,
1133 	 .spk71 = 1,
1134 	 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1135 	/* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1136 	/* This is MAEM8986, 0202 is MAEM8980 */
1137 	/* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1138 	 * MicroDockM to make it an E-MU 1616m. The non-m
1139 	 * version was never sold with this card, but should
1140 	 * still work. */
1141 	/* Does NOT support sync daughter card. */
1142 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1143 	 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]",
1144 	 .id = "EMU1010",
1145 	 .emu10k2_chip = 1,
1146 	 .ca0108_chip = 1,
1147 	 .spk71 = 1,
1148 	 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1149 	/* Tested by James@superbug.co.uk 8th July 2005. */
1150 	/* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */
1151 	/* Attach 0202 daughter card to make it an E-MU 1212m, OR an
1152 	 * AudioDock[M] to make it an E-MU 1820[m]. */
1153 	/* Supports sync daughter card. */
1154 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1155 	 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]",
1156 	 .id = "EMU1010",
1157 	 .emu10k2_chip = 1,
1158 	 .ca0102_chip = 1,
1159 	 .spk71 = 1,
1160 	 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1161 	/* This is MAEM8852 "HanaLiteLite" */
1162 	/* Supports sync daughter card. */
1163 	/* Tested by oswald.buddenhagen@gmx.de Mar 2023. */
1164 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1165 	 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]",
1166 	 .id = "EMU0404",
1167 	 .emu10k2_chip = 1,
1168 	 .ca0108_chip = 1,
1169 	 .spk20 = 1,
1170 	 .no_adat = 1,
1171 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1172 	/* This is MAEM8850 "HanaLite" */
1173 	/* Supports sync daughter card. */
1174 	/* Tested by James@superbug.co.uk 20-3-2007. */
1175 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1176 	 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]",
1177 	 .id = "EMU0404",
1178 	 .emu10k2_chip = 1,
1179 	 .ca0102_chip = 1,
1180 	 .spk20 = 1,
1181 	 .no_adat = 1,
1182 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1183 	/* EMU0404 PCIe */
1184 	/* Does NOT support sync daughter card. */
1185 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1186 	 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]",
1187 	 .id = "EMU0404",
1188 	 .emu10k2_chip = 1,
1189 	 .ca0108_chip = 1,
1190 	 .spk20 = 1,
1191 	 .no_adat = 1,
1192 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1193 	{.vendor = 0x1102, .device = 0x0008,
1194 	 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1195 	 .id = "Audigy2",
1196 	 .emu10k2_chip = 1,
1197 	 .ca0108_chip = 1,
1198 	 .ac97_chip = 1} ,
1199 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1200 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1201 	 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1202 	 .id = "Audigy2",
1203 	 .emu10k2_chip = 1,
1204 	 .ca0102_chip = 1,
1205 	 .ca0151_chip = 1,
1206 	 .spk71 = 1,
1207 	 .spdif_bug = 1,
1208 	 .ac97_chip = 1} ,
1209 	/* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1210 	/* The 0x20061102 does have SB0350 written on it
1211 	 * Just like 0x20021102
1212 	 */
1213 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1214 	 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1215 	 .id = "Audigy2",
1216 	 .emu10k2_chip = 1,
1217 	 .ca0102_chip = 1,
1218 	 .ca0151_chip = 1,
1219 	 .spk71 = 1,
1220 	 .spdif_bug = 1,
1221 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1222 	 .ac97_chip = 1} ,
1223 	/* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1224 	   Creative's Windows driver */
1225 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1226 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1227 	 .id = "Audigy2",
1228 	 .emu10k2_chip = 1,
1229 	 .ca0102_chip = 1,
1230 	 .ca0151_chip = 1,
1231 	 .spk71 = 1,
1232 	 .spdif_bug = 1,
1233 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1234 	 .ac97_chip = 1} ,
1235 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1236 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1237 	 .id = "Audigy2",
1238 	 .emu10k2_chip = 1,
1239 	 .ca0102_chip = 1,
1240 	 .ca0151_chip = 1,
1241 	 .spk71 = 1,
1242 	 .spdif_bug = 1,
1243 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1244 	 .ac97_chip = 1} ,
1245 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1246 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1247 	 .id = "Audigy2",
1248 	 .emu10k2_chip = 1,
1249 	 .ca0102_chip = 1,
1250 	 .ca0151_chip = 1,
1251 	 .spk71 = 1,
1252 	 .spdif_bug = 1,
1253 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1254 	 .ac97_chip = 1} ,
1255 	/* Audigy 2 */
1256 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1257 	/* DSP: CA0102-IAT
1258 	 * DAC: CS4382-KQ
1259 	 * ADC: Philips 1361T
1260 	 * AC97: STAC9721
1261 	 * CA0151: Yes
1262 	 */
1263 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1264 	 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1265 	 .id = "Audigy2",
1266 	 .emu10k2_chip = 1,
1267 	 .ca0102_chip = 1,
1268 	 .ca0151_chip = 1,
1269 	 .spk71 = 1,
1270 	 .spdif_bug = 1,
1271 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1272 	 .ac97_chip = 1} ,
1273 	/* Audigy 2 Platinum EX */
1274 	/* Win driver sets A_IOCFG output to 0x1c00 */
1275 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1276 	 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1277 	 .id = "Audigy2",
1278 	 .emu10k2_chip = 1,
1279 	 .ca0102_chip = 1,
1280 	 .ca0151_chip = 1,
1281 	 .spk71 = 1,
1282 	 .spdif_bug = 1} ,
1283 	/* Dell OEM/Creative Labs Audigy 2 ZS */
1284 	/* See ALSA bug#1365 */
1285 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1286 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1287 	 .id = "Audigy2",
1288 	 .emu10k2_chip = 1,
1289 	 .ca0102_chip = 1,
1290 	 .ca0151_chip = 1,
1291 	 .spk71 = 1,
1292 	 .spdif_bug = 1,
1293 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1294 	 .ac97_chip = 1} ,
1295 	/* Audigy 2 Platinum */
1296 	/* Win driver sets A_IOCFG output to 0xa00 */
1297 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1298 	 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1299 	 .id = "Audigy2",
1300 	 .emu10k2_chip = 1,
1301 	 .ca0102_chip = 1,
1302 	 .ca0151_chip = 1,
1303 	 .spk71 = 1,
1304 	 .spdif_bug = 1,
1305 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1306 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1307 	 .ac97_chip = 1} ,
1308 	{.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1309 	 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1310 	 .id = "Audigy2",
1311 	 .emu10k2_chip = 1,
1312 	 .ca0102_chip = 1,
1313 	 .ca0151_chip = 1,
1314 	 .spdif_bug = 1,
1315 	 .ac97_chip = 1} ,
1316 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1317 	 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1318 	 .id = "Audigy",
1319 	 .emu10k2_chip = 1,
1320 	 .ca0102_chip = 1,
1321 	 .ac97_chip = 1} ,
1322 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1323 	 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1324 	 .id = "Audigy",
1325 	 .emu10k2_chip = 1,
1326 	 .ca0102_chip = 1,
1327 	 .spdif_bug = 1,
1328 	 .ac97_chip = 1} ,
1329 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1330 	 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1331 	 .id = "Audigy",
1332 	 .emu10k2_chip = 1,
1333 	 .ca0102_chip = 1,
1334 	 .ac97_chip = 1} ,
1335 	{.vendor = 0x1102, .device = 0x0004,
1336 	 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1337 	 .id = "Audigy",
1338 	 .emu10k2_chip = 1,
1339 	 .ca0102_chip = 1,
1340 	 .ac97_chip = 1} ,
1341 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1342 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1343 	 .id = "Live",
1344 	 .emu10k1_chip = 1,
1345 	 .ac97_chip = 1,
1346 	 .sblive51 = 1} ,
1347 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1348 	 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1349 	 .id = "Live",
1350 	 .emu10k1_chip = 1,
1351 	 .ac97_chip = 1,
1352 	 .sblive51 = 1} ,
1353 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1354 	 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1355 	 .id = "Live",
1356 	 .emu10k1_chip = 1,
1357 	 .ac97_chip = 1,
1358 	 .sblive51 = 1} ,
1359 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1360 	 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1361 	 .id = "Live",
1362 	 .emu10k1_chip = 1,
1363 	 .ac97_chip = 1,
1364 	 .sblive51 = 1} ,
1365 	/* Tested by ALSA bug#1680 26th December 2005 */
1366 	/* note: It really has SB0220 written on the card, */
1367 	/* but it's SB0228 according to kx.inf */
1368 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1369 	 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1370 	 .id = "Live",
1371 	 .emu10k1_chip = 1,
1372 	 .ac97_chip = 1,
1373 	 .sblive51 = 1} ,
1374 	/* Tested by Thomas Zehetbauer 27th Aug 2005 */
1375 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1376 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1377 	 .id = "Live",
1378 	 .emu10k1_chip = 1,
1379 	 .ac97_chip = 1,
1380 	 .sblive51 = 1} ,
1381 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1382 	 .driver = "EMU10K1", .name = "SB Live! 5.1",
1383 	 .id = "Live",
1384 	 .emu10k1_chip = 1,
1385 	 .ac97_chip = 1,
1386 	 .sblive51 = 1} ,
1387 	/* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1388 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1389 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1390 	 .id = "Live",
1391 	 .emu10k1_chip = 1,
1392 	 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1393 			  * share the same IDs!
1394 			  */
1395 	 .sblive51 = 1} ,
1396 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1397 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1398 	 .id = "Live",
1399 	 .emu10k1_chip = 1,
1400 	 .ac97_chip = 1,
1401 	 .sblive51 = 1} ,
1402 	/* SB Live! Platinum */
1403 	/* Win driver sets A_IOCFG output to 0 */
1404 	/* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */
1405 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1406 	 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1407 	 .id = "Live",
1408 	 .emu10k1_chip = 1,
1409 	 .ac97_chip = 1} ,
1410 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1411 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1412 	 .id = "Live",
1413 	 .emu10k1_chip = 1,
1414 	 .ac97_chip = 1,
1415 	 .sblive51 = 1} ,
1416 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1417 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1418 	 .id = "Live",
1419 	 .emu10k1_chip = 1,
1420 	 .ac97_chip = 1,
1421 	 .sblive51 = 1} ,
1422 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1423 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1424 	 .id = "Live",
1425 	 .emu10k1_chip = 1,
1426 	 .ac97_chip = 1,
1427 	 .sblive51 = 1} ,
1428 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1429 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1430 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1431 	 .id = "Live",
1432 	 .emu10k1_chip = 1,
1433 	 .ac97_chip = 1,
1434 	 .sblive51 = 1} ,
1435 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1436 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1437 	 .id = "Live",
1438 	 .emu10k1_chip = 1,
1439 	 .ac97_chip = 1,
1440 	 .sblive51 = 1} ,
1441 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1442 	 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1443 	 .id = "Live",
1444 	 .emu10k1_chip = 1,
1445 	 .ac97_chip = 1,
1446 	 .sblive51 = 1} ,
1447 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1448 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1449 	 .id = "Live",
1450 	 .emu10k1_chip = 1,
1451 	 .ac97_chip = 1,
1452 	 .sblive51 = 1} ,
1453 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1454 	 .driver = "EMU10K1", .name = "E-MU APS [PC545]",
1455 	 .id = "APS",
1456 	 .emu10k1_chip = 1,
1457 	 .ecard = 1} ,
1458 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1459 	 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1460 	 .id = "Live",
1461 	 .emu10k1_chip = 1,
1462 	 .ac97_chip = 1,
1463 	 .sblive51 = 1} ,
1464 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1465 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1466 	 .id = "Live",
1467 	 .emu10k1_chip = 1,
1468 	 .ac97_chip = 1,
1469 	 .sblive51 = 1} ,
1470 	{.vendor = 0x1102, .device = 0x0002,
1471 	 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1472 	 .id = "Live",
1473 	 .emu10k1_chip = 1,
1474 	 .ac97_chip = 1,
1475 	 .sblive51 = 1} ,
1476 	{ } /* terminator */
1477 };
1478 
1479 /*
1480  * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too)
1481  * has a problem that from time to time it likes to do few DMA reads a bit
1482  * beyond its normal allocation and gets very confused if these reads get
1483  * blocked by a IOMMU.
1484  *
1485  * This behaviour has been observed for the first (reserved) page
1486  * (for which it happens multiple times at every playback), often for various
1487  * synth pages and sometimes for PCM playback buffers and the page table
1488  * memory itself.
1489  *
1490  * As a workaround let's widen these DMA allocations by an extra page if we
1491  * detect that the device is behind a non-passthrough IOMMU.
1492  */
1493 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu)
1494 {
1495 	struct iommu_domain *domain;
1496 
1497 	emu->iommu_workaround = false;
1498 
1499 	domain = iommu_get_domain_for_dev(emu->card->dev);
1500 	if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY)
1501 		return;
1502 
1503 	dev_notice(emu->card->dev,
1504 		   "non-passthrough IOMMU detected, widening DMA allocations");
1505 	emu->iommu_workaround = true;
1506 }
1507 
1508 int snd_emu10k1_create(struct snd_card *card,
1509 		       struct pci_dev *pci,
1510 		       unsigned short extin_mask,
1511 		       unsigned short extout_mask,
1512 		       long max_cache_bytes,
1513 		       int enable_ir,
1514 		       uint subsystem)
1515 {
1516 	struct snd_emu10k1 *emu = card->private_data;
1517 	int idx, err;
1518 	int is_audigy;
1519 	size_t page_table_size;
1520 	__le32 *pgtbl;
1521 	unsigned int silent_page;
1522 	const struct snd_emu_chip_details *c;
1523 
1524 	/* enable PCI device */
1525 	err = pcim_enable_device(pci);
1526 	if (err < 0)
1527 		return err;
1528 
1529 	card->private_free = snd_emu10k1_free;
1530 	emu->card = card;
1531 	spin_lock_init(&emu->reg_lock);
1532 	spin_lock_init(&emu->emu_lock);
1533 	spin_lock_init(&emu->spi_lock);
1534 	spin_lock_init(&emu->i2c_lock);
1535 	spin_lock_init(&emu->voice_lock);
1536 	spin_lock_init(&emu->synth_lock);
1537 	spin_lock_init(&emu->memblk_lock);
1538 	mutex_init(&emu->fx8010.lock);
1539 	INIT_LIST_HEAD(&emu->mapped_link_head);
1540 	INIT_LIST_HEAD(&emu->mapped_order_link_head);
1541 	emu->pci = pci;
1542 	emu->irq = -1;
1543 	emu->synth = NULL;
1544 	emu->get_synth_voice = NULL;
1545 	INIT_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work);
1546 	INIT_WORK(&emu->emu1010.clock_work, emu1010_clock_work);
1547 	/* read revision & serial */
1548 	emu->revision = pci->revision;
1549 	pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1550 	pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1551 	dev_dbg(card->dev,
1552 		"vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1553 		pci->vendor, pci->device, emu->serial, emu->model);
1554 
1555 	for (c = emu_chip_details; c->vendor; c++) {
1556 		if (c->vendor == pci->vendor && c->device == pci->device) {
1557 			if (subsystem) {
1558 				if (c->subsystem && (c->subsystem == subsystem))
1559 					break;
1560 				else
1561 					continue;
1562 			} else {
1563 				if (c->subsystem && (c->subsystem != emu->serial))
1564 					continue;
1565 				if (c->revision && c->revision != emu->revision)
1566 					continue;
1567 			}
1568 			break;
1569 		}
1570 	}
1571 	if (c->vendor == 0) {
1572 		dev_err(card->dev, "emu10k1: Card not recognised\n");
1573 		return -ENOENT;
1574 	}
1575 	emu->card_capabilities = c;
1576 	if (c->subsystem && !subsystem)
1577 		dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1578 	else if (subsystem)
1579 		dev_dbg(card->dev, "Sound card name = %s, "
1580 			"vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1581 			"Forced to subsystem = 0x%x\n",	c->name,
1582 			pci->vendor, pci->device, emu->serial, c->subsystem);
1583 	else
1584 		dev_dbg(card->dev, "Sound card name = %s, "
1585 			"vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1586 			c->name, pci->vendor, pci->device,
1587 			emu->serial);
1588 
1589 	if (!*card->id && c->id)
1590 		strscpy(card->id, c->id, sizeof(card->id));
1591 
1592 	is_audigy = emu->audigy = c->emu10k2_chip;
1593 
1594 	snd_emu10k1_detect_iommu(emu);
1595 
1596 	/* set addressing mode */
1597 	emu->address_mode = is_audigy ? 0 : 1;
1598 	/* set the DMA transfer mask */
1599 	emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1600 	if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) {
1601 		dev_err(card->dev,
1602 			"architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1603 			emu->dma_mask);
1604 		return -ENXIO;
1605 	}
1606 	if (is_audigy)
1607 		emu->gpr_base = A_FXGPREGBASE;
1608 	else
1609 		emu->gpr_base = FXGPREGBASE;
1610 
1611 	err = pci_request_regions(pci, "EMU10K1");
1612 	if (err < 0)
1613 		return err;
1614 	emu->port = pci_resource_start(pci, 0);
1615 
1616 	emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1617 
1618 	page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 :
1619 					 MAXPAGES0);
1620 	if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size,
1621 						&emu->ptb_pages) < 0)
1622 		return -ENOMEM;
1623 	dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n",
1624 		(unsigned long)emu->ptb_pages.addr,
1625 		(unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes));
1626 
1627 	emu->page_ptr_table = vmalloc(array_size(sizeof(void *),
1628 						 emu->max_cache_pages));
1629 	emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long),
1630 						  emu->max_cache_pages));
1631 	if (!emu->page_ptr_table || !emu->page_addr_table)
1632 		return -ENOMEM;
1633 
1634 	if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE,
1635 						&emu->silent_page) < 0)
1636 		return -ENOMEM;
1637 	dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n",
1638 		(unsigned long)emu->silent_page.addr,
1639 		(unsigned long)(emu->silent_page.addr +
1640 				emu->silent_page.bytes));
1641 
1642 	emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1643 	if (!emu->memhdr)
1644 		return -ENOMEM;
1645 	emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1646 		sizeof(struct snd_util_memblk);
1647 
1648 	pci_set_master(pci);
1649 
1650 	// The masks are not used for Audigy.
1651 	// FIXME: these should come from the card_capabilites table.
1652 	if (extin_mask == 0)
1653 		extin_mask = 0x3fcf;  // EXTIN_*
1654 	if (extout_mask == 0)
1655 		extout_mask = 0x7fff;  // EXTOUT_*
1656 	emu->fx8010.extin_mask = extin_mask;
1657 	emu->fx8010.extout_mask = extout_mask;
1658 	emu->enable_ir = enable_ir;
1659 
1660 	if (emu->card_capabilities->ca_cardbus_chip) {
1661 		err = snd_emu10k1_cardbus_init(emu);
1662 		if (err < 0)
1663 			return err;
1664 	}
1665 	if (emu->card_capabilities->ecard) {
1666 		err = snd_emu10k1_ecard_init(emu);
1667 		if (err < 0)
1668 			return err;
1669 	} else if (emu->card_capabilities->emu_model) {
1670 		err = snd_emu10k1_emu1010_init(emu);
1671 		if (err < 0)
1672 			return err;
1673 	} else {
1674 		/* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1675 			does not support this, it shouldn't do any harm */
1676 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1677 					AC97SLOT_CNTR|AC97SLOT_LFE);
1678 	}
1679 
1680 	/* initialize TRAM setup */
1681 	emu->fx8010.itram_size = (16 * 1024)/2;
1682 	emu->fx8010.etram_pages.area = NULL;
1683 	emu->fx8010.etram_pages.bytes = 0;
1684 
1685 	/* irq handler must be registered after I/O ports are activated */
1686 	if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt,
1687 			     IRQF_SHARED, KBUILD_MODNAME, emu))
1688 		return -EBUSY;
1689 	emu->irq = pci->irq;
1690 	card->sync_irq = emu->irq;
1691 
1692 	/*
1693 	 *  Init to 0x02109204 :
1694 	 *  Clock accuracy    = 0     (1000ppm)
1695 	 *  Sample Rate       = 2     (48kHz)
1696 	 *  Audio Channel     = 1     (Left of 2)
1697 	 *  Source Number     = 0     (Unspecified)
1698 	 *  Generation Status = 1     (Original for Cat Code 12)
1699 	 *  Cat Code          = 12    (Digital Signal Mixer)
1700 	 *  Mode              = 0     (Mode 0)
1701 	 *  Emphasis          = 0     (None)
1702 	 *  CP                = 1     (Copyright unasserted)
1703 	 *  AN                = 0     (Audio data)
1704 	 *  P                 = 0     (Consumer)
1705 	 */
1706 	emu->spdif_bits[0] = emu->spdif_bits[1] =
1707 		emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1708 		SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1709 		SPCS_GENERATIONSTATUS | 0x00001200 |
1710 		0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1711 
1712 	/* Clear silent pages and set up pointers */
1713 	memset(emu->silent_page.area, 0, emu->silent_page.bytes);
1714 	silent_page = emu->silent_page.addr << emu->address_mode;
1715 	pgtbl = (__le32 *)emu->ptb_pages.area;
1716 	for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
1717 		pgtbl[idx] = cpu_to_le32(silent_page | idx);
1718 
1719 	/* set up voice indices */
1720 	for (idx = 0; idx < NUM_G; idx++)
1721 		emu->voices[idx].number = idx;
1722 
1723 	err = snd_emu10k1_init(emu, enable_ir);
1724 	if (err < 0)
1725 		return err;
1726 #ifdef CONFIG_PM_SLEEP
1727 	err = alloc_pm_buffer(emu);
1728 	if (err < 0)
1729 		return err;
1730 #endif
1731 
1732 	/*  Initialize the effect engine */
1733 	err = snd_emu10k1_init_efx(emu);
1734 	if (err < 0)
1735 		return err;
1736 	snd_emu10k1_audio_enable(emu);
1737 
1738 #ifdef CONFIG_SND_PROC_FS
1739 	snd_emu10k1_proc_init(emu);
1740 #endif
1741 	return 0;
1742 }
1743 
1744 #ifdef CONFIG_PM_SLEEP
1745 static const unsigned char saved_regs[] = {
1746 	CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1747 	FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1748 	ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1749 	TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1750 	MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1751 	SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1752 	0xff /* end */
1753 };
1754 static const unsigned char saved_regs_audigy[] = {
1755 	A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC,
1756 	A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1757 	0xff /* end */
1758 };
1759 
1760 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
1761 {
1762 	int size;
1763 
1764 	size = ARRAY_SIZE(saved_regs);
1765 	if (emu->audigy)
1766 		size += ARRAY_SIZE(saved_regs_audigy);
1767 	emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size));
1768 	if (!emu->saved_ptr)
1769 		return -ENOMEM;
1770 	if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1771 		return -ENOMEM;
1772 	if (emu->card_capabilities->ca0151_chip &&
1773 	    snd_p16v_alloc_pm_buffer(emu) < 0)
1774 		return -ENOMEM;
1775 	return 0;
1776 }
1777 
1778 static void free_pm_buffer(struct snd_emu10k1 *emu)
1779 {
1780 	vfree(emu->saved_ptr);
1781 	snd_emu10k1_efx_free_pm_buffer(emu);
1782 	if (emu->card_capabilities->ca0151_chip)
1783 		snd_p16v_free_pm_buffer(emu);
1784 }
1785 
1786 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1787 {
1788 	int i;
1789 	const unsigned char *reg;
1790 	unsigned int *val;
1791 
1792 	val = emu->saved_ptr;
1793 	for (reg = saved_regs; *reg != 0xff; reg++)
1794 		for (i = 0; i < NUM_G; i++, val++)
1795 			*val = snd_emu10k1_ptr_read(emu, *reg, i);
1796 	if (emu->audigy) {
1797 		for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1798 			for (i = 0; i < NUM_G; i++, val++)
1799 				*val = snd_emu10k1_ptr_read(emu, *reg, i);
1800 	}
1801 	if (emu->audigy)
1802 		emu->saved_a_iocfg = inw(emu->port + A_IOCFG);
1803 	emu->saved_hcfg = inl(emu->port + HCFG);
1804 }
1805 
1806 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1807 {
1808 	if (emu->card_capabilities->ca_cardbus_chip)
1809 		snd_emu10k1_cardbus_init(emu);
1810 	if (emu->card_capabilities->ecard)
1811 		snd_emu10k1_ecard_init(emu);
1812 	else if (emu->card_capabilities->emu_model)
1813 		snd_emu10k1_emu1010_init(emu);
1814 	else
1815 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1816 	snd_emu10k1_init(emu, emu->enable_ir);
1817 }
1818 
1819 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1820 {
1821 	int i;
1822 	const unsigned char *reg;
1823 	unsigned int *val;
1824 
1825 	snd_emu10k1_audio_enable(emu);
1826 
1827 	/* resore for spdif */
1828 	if (emu->audigy)
1829 		outw(emu->saved_a_iocfg, emu->port + A_IOCFG);
1830 	outl(emu->saved_hcfg, emu->port + HCFG);
1831 
1832 	val = emu->saved_ptr;
1833 	for (reg = saved_regs; *reg != 0xff; reg++)
1834 		for (i = 0; i < NUM_G; i++, val++)
1835 			snd_emu10k1_ptr_write(emu, *reg, i, *val);
1836 	if (emu->audigy) {
1837 		for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1838 			for (i = 0; i < NUM_G; i++, val++)
1839 				snd_emu10k1_ptr_write(emu, *reg, i, *val);
1840 	}
1841 }
1842 #endif
1843