1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 4 * Creative Labs, Inc. 5 * Routines for control of EMU10K1 chips 6 * 7 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> 8 * Added support for Audigy 2 Value. 9 * Added EMU 1010 support. 10 * General bug fixes and enhancements. 11 * 12 * BUGS: 13 * -- 14 * 15 * TODO: 16 * -- 17 */ 18 19 #include <linux/sched.h> 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/iommu.h> 25 #include <linux/pci.h> 26 #include <linux/slab.h> 27 #include <linux/vmalloc.h> 28 #include <linux/mutex.h> 29 30 31 #include <sound/core.h> 32 #include <sound/emu10k1.h> 33 #include <linux/firmware.h> 34 #include "p16v.h" 35 #include "tina2.h" 36 #include "p17v.h" 37 38 39 #define HANA_FILENAME "emu/hana.fw" 40 #define DOCK_FILENAME "emu/audio_dock.fw" 41 #define EMU1010B_FILENAME "emu/emu1010b.fw" 42 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw" 43 #define EMU0404_FILENAME "emu/emu0404.fw" 44 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" 45 46 MODULE_FIRMWARE(HANA_FILENAME); 47 MODULE_FIRMWARE(DOCK_FILENAME); 48 MODULE_FIRMWARE(EMU1010B_FILENAME); 49 MODULE_FIRMWARE(MICRO_DOCK_FILENAME); 50 MODULE_FIRMWARE(EMU0404_FILENAME); 51 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); 52 53 54 /************************************************************************* 55 * EMU10K1 init / done 56 *************************************************************************/ 57 58 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch) 59 { 60 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); 61 snd_emu10k1_ptr_write(emu, VTFT, ch, VTFT_FILTERTARGET_MASK); 62 snd_emu10k1_ptr_write(emu, CVCF, ch, CVCF_CURRENTFILTER_MASK); 63 snd_emu10k1_ptr_write(emu, PTRX, ch, 0); 64 snd_emu10k1_ptr_write(emu, CPF, ch, 0); 65 snd_emu10k1_ptr_write(emu, CCR, ch, 0); 66 67 snd_emu10k1_ptr_write(emu, PSST, ch, 0); 68 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10); 69 snd_emu10k1_ptr_write(emu, CCCA, ch, 0); 70 snd_emu10k1_ptr_write(emu, Z1, ch, 0); 71 snd_emu10k1_ptr_write(emu, Z2, ch, 0); 72 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000); 73 74 // The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero 75 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0); 76 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0); 77 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0); 78 snd_emu10k1_ptr_write(emu, IP, ch, 0); 79 snd_emu10k1_ptr_write(emu, IFATN, ch, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK); 80 snd_emu10k1_ptr_write(emu, PEFE, ch, 0); 81 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0); 82 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */ 83 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */ 84 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0); 85 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0); 86 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0); 87 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0); 88 89 /* Audigy extra stuffs */ 90 if (emu->audigy) { 91 snd_emu10k1_ptr_write(emu, A_CSBA, ch, 0); 92 snd_emu10k1_ptr_write(emu, A_CSDC, ch, 0); 93 snd_emu10k1_ptr_write(emu, A_CSFE, ch, 0); 94 snd_emu10k1_ptr_write(emu, A_CSHG, ch, 0); 95 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100); 96 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x07060504); 97 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0); 98 } 99 } 100 101 static const unsigned int spi_dac_init[] = { 102 0x00ff, 103 0x02ff, 104 0x0400, 105 0x0520, 106 0x0600, 107 0x08ff, 108 0x0aff, 109 0x0cff, 110 0x0eff, 111 0x10ff, 112 0x1200, 113 0x1400, 114 0x1480, 115 0x1800, 116 0x1aff, 117 0x1cff, 118 0x1e00, 119 0x0530, 120 0x0602, 121 0x0622, 122 0x1400, 123 }; 124 125 static const unsigned int i2c_adc_init[][2] = { 126 { 0x17, 0x00 }, /* Reset */ 127 { 0x07, 0x00 }, /* Timeout */ 128 { 0x0b, 0x22 }, /* Interface control */ 129 { 0x0c, 0x22 }, /* Master mode control */ 130 { 0x0d, 0x08 }, /* Powerdown control */ 131 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ 132 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ 133 { 0x10, 0x7b }, /* ALC Control 1 */ 134 { 0x11, 0x00 }, /* ALC Control 2 */ 135 { 0x12, 0x32 }, /* ALC Control 3 */ 136 { 0x13, 0x00 }, /* Noise gate control */ 137 { 0x14, 0xa6 }, /* Limiter control */ 138 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */ 139 }; 140 141 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir) 142 { 143 unsigned int silent_page; 144 int ch; 145 u32 tmp; 146 147 /* disable audio and lock cache */ 148 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | 149 HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 150 151 /* reset recording buffers */ 152 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE); 153 snd_emu10k1_ptr_write(emu, MICBA, 0, 0); 154 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE); 155 snd_emu10k1_ptr_write(emu, FXBA, 0, 0); 156 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); 157 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); 158 159 /* disable channel interrupt */ 160 outl(0, emu->port + INTE); 161 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); 162 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); 163 164 /* disable stop on loop end */ 165 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); 166 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); 167 168 if (emu->audigy) { 169 /* set SPDIF bypass mode */ 170 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); 171 /* enable rear left + rear right AC97 slots */ 172 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | 173 AC97SLOT_REAR_LEFT); 174 } 175 176 /* init envelope engine */ 177 for (ch = 0; ch < NUM_G; ch++) 178 snd_emu10k1_voice_init(emu, ch); 179 180 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]); 181 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]); 182 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]); 183 184 if (emu->card_capabilities->emu_model) { 185 } else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 186 /* Hacks for Alice3 to work independent of haP16V driver */ 187 /* Setup SRCMulti_I2S SamplingRate */ 188 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 189 190 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 191 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); 192 /* Setup SRCMulti Input Audio Enable */ 193 /* Use 0xFFFFFFFF to enable P16V sounds. */ 194 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); 195 196 /* Enabled Phased (8-channel) P16V playback */ 197 outl(0x0201, emu->port + HCFG2); 198 /* Set playback routing. */ 199 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); 200 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ 201 /* Hacks for Alice3 to work independent of haP16V driver */ 202 dev_info(emu->card->dev, "Audigy2 value: Special config.\n"); 203 /* Setup SRCMulti_I2S SamplingRate */ 204 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 205 206 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 207 snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14); 208 209 /* Setup SRCMulti Input Audio Enable */ 210 snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000); 211 212 /* Setup SPDIF Out Audio Enable */ 213 /* The Audigy 2 Value has a separate SPDIF out, 214 * so no need for a mixer switch 215 */ 216 snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000); 217 218 tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ 219 outw(tmp, emu->port + A_IOCFG); 220 } 221 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ 222 int size, n; 223 224 size = ARRAY_SIZE(spi_dac_init); 225 for (n = 0; n < size; n++) 226 snd_emu10k1_spi_write(emu, spi_dac_init[n]); 227 228 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); 229 /* Enable GPIOs 230 * GPIO0: Unknown 231 * GPIO1: Speakers-enabled. 232 * GPIO2: Unknown 233 * GPIO3: Unknown 234 * GPIO4: IEC958 Output on. 235 * GPIO5: Unknown 236 * GPIO6: Unknown 237 * GPIO7: Unknown 238 */ 239 outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ 240 } 241 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ 242 int size, n; 243 244 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); 245 tmp = inw(emu->port + A_IOCFG); 246 outw(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ 247 tmp = inw(emu->port + A_IOCFG); 248 size = ARRAY_SIZE(i2c_adc_init); 249 for (n = 0; n < size; n++) 250 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); 251 for (n = 0; n < 4; n++) { 252 emu->i2c_capture_volume[n][0] = 0xcf; 253 emu->i2c_capture_volume[n][1] = 0xcf; 254 } 255 } 256 257 258 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); 259 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ 260 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */ 261 262 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0); 263 for (ch = 0; ch < NUM_G; ch++) { 264 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); 265 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); 266 } 267 268 if (emu->card_capabilities->emu_model) { 269 outl(HCFG_AUTOMUTE_ASYNC | 270 HCFG_EMU32_SLAVE | 271 HCFG_AUDIOENABLE, emu->port + HCFG); 272 /* 273 * Hokay, setup HCFG 274 * Mute Disable Audio = 0 275 * Lock Tank Memory = 1 276 * Lock Sound Memory = 0 277 * Auto Mute = 1 278 */ 279 } else if (emu->audigy) { 280 if (emu->revision == 4) /* audigy2 */ 281 outl(HCFG_AUDIOENABLE | 282 HCFG_AC3ENABLE_CDSPDIF | 283 HCFG_AC3ENABLE_GPSPDIF | 284 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 285 else 286 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 287 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, 288 * e.g. card_capabilities->joystick */ 289 } else if (emu->model == 0x20 || 290 emu->model == 0xc400 || 291 (emu->model == 0x21 && emu->revision < 6)) 292 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); 293 else 294 /* With on-chip joystick */ 295 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 296 297 if (enable_ir) { /* enable IR for SB Live */ 298 if (emu->card_capabilities->emu_model) { 299 ; /* Disable all access to A_IOCFG for the emu1010 */ 300 } else if (emu->card_capabilities->i2c_adc) { 301 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 302 } else if (emu->audigy) { 303 u16 reg = inw(emu->port + A_IOCFG); 304 outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 305 udelay(500); 306 outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 307 udelay(100); 308 outw(reg, emu->port + A_IOCFG); 309 } else { 310 unsigned int reg = inl(emu->port + HCFG); 311 outl(reg | HCFG_GPOUT2, emu->port + HCFG); 312 udelay(500); 313 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); 314 udelay(100); 315 outl(reg, emu->port + HCFG); 316 } 317 } 318 319 if (emu->card_capabilities->emu_model) { 320 ; /* Disable all access to A_IOCFG for the emu1010 */ 321 } else if (emu->card_capabilities->i2c_adc) { 322 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 323 } else if (emu->audigy) { /* enable analog output */ 324 u16 reg = inw(emu->port + A_IOCFG); 325 outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); 326 } 327 328 if (emu->address_mode == 0) { 329 /* use 16M in 4G */ 330 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG); 331 } 332 333 return 0; 334 } 335 336 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) 337 { 338 /* 339 * Enable the audio bit 340 */ 341 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); 342 343 /* Enable analog/digital outs on audigy */ 344 if (emu->card_capabilities->emu_model) { 345 ; /* Disable all access to A_IOCFG for the emu1010 */ 346 } else if (emu->card_capabilities->i2c_adc) { 347 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 348 } else if (emu->audigy) { 349 outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); 350 351 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 352 /* Unmute Analog now. Set GPO6 to 1 for Apollo. 353 * This has to be done after init ALice3 I2SOut beyond 48KHz. 354 * So, sequence is important. */ 355 outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); 356 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ 357 /* Unmute Analog now. */ 358 outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); 359 } else { 360 /* Disable routing from AC97 line out to Front speakers */ 361 outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); 362 } 363 } 364 365 #if 0 366 { 367 unsigned int tmp; 368 /* FIXME: the following routine disables LiveDrive-II !! */ 369 /* TOSLink detection */ 370 emu->tos_link = 0; 371 tmp = inl(emu->port + HCFG); 372 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 373 outl(tmp|0x800, emu->port + HCFG); 374 udelay(50); 375 if (tmp != (inl(emu->port + HCFG) & ~0x800)) { 376 emu->tos_link = 1; 377 outl(tmp, emu->port + HCFG); 378 } 379 } 380 } 381 #endif 382 383 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); 384 } 385 386 int snd_emu10k1_done(struct snd_emu10k1 *emu) 387 { 388 int ch; 389 390 outl(0, emu->port + INTE); 391 392 /* 393 * Shutdown the chip 394 */ 395 for (ch = 0; ch < NUM_G; ch++) 396 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); 397 for (ch = 0; ch < NUM_G; ch++) { 398 snd_emu10k1_ptr_write(emu, VTFT, ch, 0); 399 snd_emu10k1_ptr_write(emu, CVCF, ch, 0); 400 snd_emu10k1_ptr_write(emu, PTRX, ch, 0); 401 snd_emu10k1_ptr_write(emu, CPF, ch, 0); 402 } 403 404 /* reset recording buffers */ 405 snd_emu10k1_ptr_write(emu, MICBS, 0, 0); 406 snd_emu10k1_ptr_write(emu, MICBA, 0, 0); 407 snd_emu10k1_ptr_write(emu, FXBS, 0, 0); 408 snd_emu10k1_ptr_write(emu, FXBA, 0, 0); 409 snd_emu10k1_ptr_write(emu, FXWC, 0, 0); 410 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); 411 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); 412 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K); 413 snd_emu10k1_ptr_write(emu, TCB, 0, 0); 414 if (emu->audigy) 415 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); 416 else 417 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); 418 419 /* disable channel interrupt */ 420 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); 421 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); 422 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); 423 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); 424 425 /* disable audio and lock cache */ 426 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 427 snd_emu10k1_ptr_write(emu, PTB, 0, 0); 428 429 return 0; 430 } 431 432 /************************************************************************* 433 * ECARD functional implementation 434 *************************************************************************/ 435 436 /* In A1 Silicon, these bits are in the HC register */ 437 #define HOOKN_BIT (1L << 12) 438 #define HANDN_BIT (1L << 11) 439 #define PULSEN_BIT (1L << 10) 440 441 #define EC_GDI1 (1 << 13) 442 #define EC_GDI0 (1 << 14) 443 444 #define EC_NUM_CONTROL_BITS 20 445 446 #define EC_AC3_DATA_SELN 0x0001L 447 #define EC_EE_DATA_SEL 0x0002L 448 #define EC_EE_CNTRL_SELN 0x0004L 449 #define EC_EECLK 0x0008L 450 #define EC_EECS 0x0010L 451 #define EC_EESDO 0x0020L 452 #define EC_TRIM_CSN 0x0040L 453 #define EC_TRIM_SCLK 0x0080L 454 #define EC_TRIM_SDATA 0x0100L 455 #define EC_TRIM_MUTEN 0x0200L 456 #define EC_ADCCAL 0x0400L 457 #define EC_ADCRSTN 0x0800L 458 #define EC_DACCAL 0x1000L 459 #define EC_DACMUTEN 0x2000L 460 #define EC_LEDN 0x4000L 461 462 #define EC_SPDIF0_SEL_SHIFT 15 463 #define EC_SPDIF1_SEL_SHIFT 17 464 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) 465 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) 466 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) 467 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) 468 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should 469 * be incremented any time the EEPROM's 470 * format is changed. */ 471 472 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ 473 474 /* Addresses for special values stored in to EEPROM */ 475 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ 476 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ 477 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ 478 479 #define EC_LAST_PROMFILE_ADDR 0x2f 480 481 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The 482 * can be up to 30 characters in length 483 * and is stored as a NULL-terminated 484 * ASCII string. Any unused bytes must be 485 * filled with zeros */ 486 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ 487 488 489 /* Most of this stuff is pretty self-evident. According to the hardware 490 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC 491 * offset problem. Weird. 492 */ 493 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ 494 EC_TRIM_CSN) 495 496 497 #define EC_DEFAULT_ADC_GAIN 0xC4C4 498 #define EC_DEFAULT_SPDIF0_SEL 0x0 499 #define EC_DEFAULT_SPDIF1_SEL 0x4 500 501 /************************************************************************** 502 * @func Clock bits into the Ecard's control latch. The Ecard uses a 503 * control latch will is loaded bit-serially by toggling the Modem control 504 * lines from function 2 on the E8010. This function hides these details 505 * and presents the illusion that we are actually writing to a distinct 506 * register. 507 */ 508 509 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value) 510 { 511 unsigned short count; 512 unsigned int data; 513 unsigned long hc_port; 514 unsigned int hc_value; 515 516 hc_port = emu->port + HCFG; 517 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); 518 outl(hc_value, hc_port); 519 520 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { 521 522 /* Set up the value */ 523 data = ((value & 0x1) ? PULSEN_BIT : 0); 524 value >>= 1; 525 526 outl(hc_value | data, hc_port); 527 528 /* Clock the shift register */ 529 outl(hc_value | data | HANDN_BIT, hc_port); 530 outl(hc_value | data, hc_port); 531 } 532 533 /* Latch the bits */ 534 outl(hc_value | HOOKN_BIT, hc_port); 535 outl(hc_value, hc_port); 536 } 537 538 /************************************************************************** 539 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The 540 * trim value consists of a 16bit value which is composed of two 541 * 8 bit gain/trim values, one for the left channel and one for the 542 * right channel. The following table maps from the Gain/Attenuation 543 * value in decibels into the corresponding bit pattern for a single 544 * channel. 545 */ 546 547 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu, 548 unsigned short gain) 549 { 550 unsigned int bit; 551 552 /* Enable writing to the TRIM registers */ 553 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 554 555 /* Do it again to insure that we meet hold time requirements */ 556 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 557 558 for (bit = (1 << 15); bit; bit >>= 1) { 559 unsigned int value; 560 561 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); 562 563 if (gain & bit) 564 value |= EC_TRIM_SDATA; 565 566 /* Clock the bit */ 567 snd_emu10k1_ecard_write(emu, value); 568 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); 569 snd_emu10k1_ecard_write(emu, value); 570 } 571 572 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 573 } 574 575 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu) 576 { 577 unsigned int hc_value; 578 579 /* Set up the initial settings */ 580 emu->ecard_ctrl = EC_RAW_RUN_MODE | 581 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | 582 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); 583 584 /* Step 0: Set the codec type in the hardware control register 585 * and enable audio output */ 586 hc_value = inl(emu->port + HCFG); 587 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); 588 inl(emu->port + HCFG); 589 590 /* Step 1: Turn off the led and deassert TRIM_CS */ 591 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 592 593 /* Step 2: Calibrate the ADC and DAC */ 594 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); 595 596 /* Step 3: Wait for awhile; XXX We can't get away with this 597 * under a real operating system; we'll need to block and wait that 598 * way. */ 599 snd_emu10k1_wait(emu, 48000); 600 601 /* Step 4: Switch off the DAC and ADC calibration. Note 602 * That ADC_CAL is actually an inverted signal, so we assert 603 * it here to stop calibration. */ 604 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 605 606 /* Step 4: Switch into run mode */ 607 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 608 609 /* Step 5: Set the analog input gain */ 610 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); 611 612 return 0; 613 } 614 615 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu) 616 { 617 unsigned long special_port; 618 __always_unused unsigned int value; 619 620 /* Special initialisation routine 621 * before the rest of the IO-Ports become active. 622 */ 623 special_port = emu->port + 0x38; 624 value = inl(special_port); 625 outl(0x00d00000, special_port); 626 value = inl(special_port); 627 outl(0x00d00001, special_port); 628 value = inl(special_port); 629 outl(0x00d0005f, special_port); 630 value = inl(special_port); 631 outl(0x00d0007f, special_port); 632 value = inl(special_port); 633 outl(0x0090007f, special_port); 634 value = inl(special_port); 635 636 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ 637 /* Delay to give time for ADC chip to switch on. It needs 113ms */ 638 msleep(200); 639 return 0; 640 } 641 642 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu, 643 const struct firmware *fw_entry) 644 { 645 int n, i; 646 u16 reg; 647 u8 value; 648 __always_unused u16 write_post; 649 unsigned long flags; 650 651 if (!fw_entry) 652 return -EIO; 653 654 /* The FPGA is a Xilinx Spartan IIE XC2S50E */ 655 /* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */ 656 /* GPIO7 -> FPGA PGMN 657 * GPIO6 -> FPGA CCLK 658 * GPIO5 -> FPGA DIN 659 * FPGA CONFIG OFF -> FPGA PGMN 660 */ 661 spin_lock_irqsave(&emu->emu_lock, flags); 662 outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */ 663 write_post = inw(emu->port + A_GPIO); 664 udelay(100); 665 outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */ 666 write_post = inw(emu->port + A_GPIO); 667 udelay(100); /* Allow FPGA memory to clean */ 668 for (n = 0; n < fw_entry->size; n++) { 669 value = fw_entry->data[n]; 670 for (i = 0; i < 8; i++) { 671 reg = 0x80; 672 if (value & 0x1) 673 reg = reg | 0x20; 674 value = value >> 1; 675 outw(reg, emu->port + A_GPIO); 676 write_post = inw(emu->port + A_GPIO); 677 outw(reg | 0x40, emu->port + A_GPIO); 678 write_post = inw(emu->port + A_GPIO); 679 } 680 } 681 /* After programming, set GPIO bit 4 high again. */ 682 outw(0x10, emu->port + A_GPIO); 683 write_post = inw(emu->port + A_GPIO); 684 spin_unlock_irqrestore(&emu->emu_lock, flags); 685 686 return 0; 687 } 688 689 /* firmware file names, per model, init-fw and dock-fw (optional) */ 690 static const char * const firmware_names[5][2] = { 691 [EMU_MODEL_EMU1010] = { 692 HANA_FILENAME, DOCK_FILENAME 693 }, 694 [EMU_MODEL_EMU1010B] = { 695 EMU1010B_FILENAME, MICRO_DOCK_FILENAME 696 }, 697 [EMU_MODEL_EMU1616] = { 698 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME 699 }, 700 [EMU_MODEL_EMU0404] = { 701 EMU0404_FILENAME, NULL 702 }, 703 }; 704 705 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock, 706 const struct firmware **fw) 707 { 708 const char *filename; 709 int err; 710 711 if (!*fw) { 712 filename = firmware_names[emu->card_capabilities->emu_model][dock]; 713 if (!filename) 714 return 0; 715 err = request_firmware(fw, filename, &emu->pci->dev); 716 if (err) 717 return err; 718 } 719 720 return snd_emu1010_load_firmware_entry(emu, *fw); 721 } 722 723 static void emu1010_firmware_work(struct work_struct *work) 724 { 725 struct snd_emu10k1 *emu; 726 u32 tmp, tmp2, reg; 727 int err; 728 729 emu = container_of(work, struct snd_emu10k1, 730 emu1010.firmware_work.work); 731 if (emu->card->shutdown) 732 return; 733 #ifdef CONFIG_PM_SLEEP 734 if (emu->suspend) 735 return; 736 #endif 737 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */ 738 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */ 739 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) { 740 /* Audio Dock attached */ 741 /* Return to Audio Dock programming mode */ 742 dev_info(emu->card->dev, 743 "emu1010: Loading Audio Dock Firmware\n"); 744 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 745 EMU_HANA_FPGA_CONFIG_AUDIODOCK); 746 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw); 747 if (err < 0) 748 goto next; 749 750 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0); 751 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); 752 dev_info(emu->card->dev, 753 "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", tmp); 754 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 755 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp); 756 dev_info(emu->card->dev, 757 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp); 758 if ((tmp & 0x1f) != 0x15) { 759 /* FPGA failed to be programmed */ 760 dev_info(emu->card->dev, 761 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", 762 tmp); 763 goto next; 764 } 765 dev_info(emu->card->dev, 766 "emu1010: Audio Dock Firmware loaded\n"); 767 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp); 768 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2); 769 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2); 770 /* Sync clocking between 1010 and Dock */ 771 /* Allow DLL to settle */ 772 msleep(10); 773 /* Unmute all. Default is muted after a firmware load */ 774 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 775 } else if (!reg && emu->emu1010.last_reg) { 776 /* Audio Dock removed */ 777 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n"); 778 /* The hardware auto-mutes all, so we unmute again */ 779 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 780 } 781 782 next: 783 emu->emu1010.last_reg = reg; 784 if (!emu->card->shutdown) 785 schedule_delayed_work(&emu->emu1010.firmware_work, 786 msecs_to_jiffies(1000)); 787 } 788 789 /* 790 * Current status of the driver: 791 * ---------------------------- 792 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) 793 * * PCM device nb. 2: 794 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops 795 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops 796 */ 797 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu) 798 { 799 u32 tmp, tmp2, reg; 800 int err; 801 802 dev_info(emu->card->dev, "emu1010: Special config.\n"); 803 804 /* Mute, and disable audio and lock cache, just in case. 805 * Proper init follows in snd_emu10k1_init(). */ 806 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG); 807 808 /* Disable 48Volt power to Audio Dock */ 809 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 810 811 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ 812 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 813 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg); 814 if ((reg & 0x3f) == 0x15) { 815 /* FPGA netlist already present so clear it */ 816 /* Return to programming mode */ 817 818 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA); 819 } 820 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 821 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg); 822 if ((reg & 0x3f) == 0x15) { 823 /* FPGA failed to return to programming mode */ 824 dev_info(emu->card->dev, 825 "emu1010: FPGA failed to return to programming mode\n"); 826 return -ENODEV; 827 } 828 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg); 829 830 err = snd_emu1010_load_firmware(emu, 0, &emu->firmware); 831 if (err < 0) { 832 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n"); 833 return err; 834 } 835 836 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 837 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 838 if ((reg & 0x3f) != 0x15) { 839 /* FPGA failed to be programmed */ 840 dev_info(emu->card->dev, 841 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", 842 reg); 843 return -ENODEV; 844 } 845 846 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n"); 847 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp); 848 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2); 849 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2); 850 /* Enable 48Volt power to Audio Dock */ 851 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON); 852 853 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 854 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg); 855 if (emu->card_capabilities->no_adat) { 856 emu->emu1010.optical_in = 0; /* IN_SPDIF */ 857 emu->emu1010.optical_out = 0; /* OUT_SPDIF */ 858 } else { 859 /* Optical -> ADAT I/O */ 860 emu->emu1010.optical_in = 1; /* IN_ADAT */ 861 emu->emu1010.optical_out = 1; /* OUT_ADAT */ 862 } 863 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) | 864 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF); 865 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 866 /* Set no attenuation on Audio Dock pads. */ 867 emu->emu1010.adc_pads = 0x00; 868 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads); 869 /* Unmute Audio dock DACs, Headphone source DAC-4. */ 870 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4); 871 /* DAC PADs. */ 872 emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 | 873 EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4; 874 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads); 875 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ 876 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID); 877 /* MIDI routing */ 878 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2); 879 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2); 880 /* IRQ Enable: All on */ 881 /* snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x0f); */ 882 /* IRQ Enable: All off */ 883 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00); 884 885 emu->emu1010.internal_clock = 1; /* 48000 */ 886 /* Default WCLK set to 48kHz. */ 887 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K); 888 /* Word Clock source, Internal 48kHz x1 */ 889 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 890 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 891 /* Audio Dock LEDs. */ 892 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, EMU_HANA_DOCK_LEDS_2_LOCK | EMU_HANA_DOCK_LEDS_2_48K); 893 894 // The routes are all set to EMU_SRC_SILENCE due to the reset, 895 // so it is safe to simply enable the outputs. 896 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 897 898 return 0; 899 } 900 /* 901 * Create the EMU10K1 instance 902 */ 903 904 #ifdef CONFIG_PM_SLEEP 905 static int alloc_pm_buffer(struct snd_emu10k1 *emu); 906 static void free_pm_buffer(struct snd_emu10k1 *emu); 907 #endif 908 909 static void snd_emu10k1_free(struct snd_card *card) 910 { 911 struct snd_emu10k1 *emu = card->private_data; 912 913 if (emu->port) { /* avoid access to already used hardware */ 914 snd_emu10k1_fx8010_tram_setup(emu, 0); 915 snd_emu10k1_done(emu); 916 snd_emu10k1_free_efx(emu); 917 } 918 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) { 919 /* Disable 48Volt power to Audio Dock */ 920 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 921 } 922 cancel_delayed_work_sync(&emu->emu1010.firmware_work); 923 release_firmware(emu->firmware); 924 release_firmware(emu->dock_fw); 925 snd_util_memhdr_free(emu->memhdr); 926 if (emu->silent_page.area) 927 snd_dma_free_pages(&emu->silent_page); 928 if (emu->ptb_pages.area) 929 snd_dma_free_pages(&emu->ptb_pages); 930 vfree(emu->page_ptr_table); 931 vfree(emu->page_addr_table); 932 #ifdef CONFIG_PM_SLEEP 933 free_pm_buffer(emu); 934 #endif 935 } 936 937 static const struct snd_emu_chip_details emu_chip_details[] = { 938 /* Audigy 5/Rx SB1550 */ 939 /* Tested by michael@gernoth.net 28 Mar 2015 */ 940 /* DSP: CA10300-IAT LF 941 * DAC: Cirrus Logic CS4382-KQZ 942 * ADC: Philips 1361T 943 * AC97: Sigmatel STAC9750 944 * CA0151: None 945 */ 946 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102, 947 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]", 948 .id = "Audigy2", 949 .emu10k2_chip = 1, 950 .ca0108_chip = 1, 951 .spk71 = 1, 952 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 953 .ac97_chip = 1}, 954 /* Audigy4 (Not PRO) SB0610 */ 955 /* Tested by James@superbug.co.uk 4th April 2006 */ 956 /* A_IOCFG bits 957 * Output 958 * 0: ? 959 * 1: ? 960 * 2: ? 961 * 3: 0 - Digital Out, 1 - Line in 962 * 4: ? 963 * 5: ? 964 * 6: ? 965 * 7: ? 966 * Input 967 * 8: ? 968 * 9: ? 969 * A: Green jack sense (Front) 970 * B: ? 971 * C: Black jack sense (Rear/Side Right) 972 * D: Yellow jack sense (Center/LFE/Side Left) 973 * E: ? 974 * F: ? 975 * 976 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) 977 * 0 - Digital Out 978 * 1 - Line in 979 */ 980 /* Mic input not tested. 981 * Analog CD input not tested 982 * Digital Out not tested. 983 * Line in working. 984 * Audio output 5.1 working. Side outputs not working. 985 */ 986 /* DSP: CA10300-IAT LF 987 * DAC: Cirrus Logic CS4382-KQZ 988 * ADC: Philips 1361T 989 * AC97: Sigmatel STAC9750 990 * CA0151: None 991 */ 992 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, 993 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]", 994 .id = "Audigy2", 995 .emu10k2_chip = 1, 996 .ca0108_chip = 1, 997 .spk71 = 1, 998 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 999 .ac97_chip = 1} , 1000 /* Audigy 2 Value AC3 out does not work yet. 1001 * Need to find out how to turn off interpolators. 1002 */ 1003 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1004 /* DSP: CA0108-IAT 1005 * DAC: CS4382-KQ 1006 * ADC: Philips 1361T 1007 * AC97: STAC9750 1008 * CA0151: None 1009 */ 1010 /* 1011 * A_IOCFG Input (GPIO) 1012 * 0x400 = Front analog jack plugged in. (Green socket) 1013 * 0x1000 = Rear analog jack plugged in. (Black socket) 1014 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket) 1015 * A_IOCFG Output (GPIO) 1016 * 0x60 = Sound out of front Left. 1017 * Win sets it to 0xXX61 1018 */ 1019 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, 1020 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]", 1021 .id = "Audigy2", 1022 .emu10k2_chip = 1, 1023 .ca0108_chip = 1, 1024 .spk71 = 1, 1025 .ac97_chip = 1} , 1026 /* Audigy 2 ZS Notebook Cardbus card.*/ 1027 /* Tested by James@superbug.co.uk 6th November 2006 */ 1028 /* Audio output 7.1/Headphones working. 1029 * Digital output working. (AC3 not checked, only PCM) 1030 * Audio Mic/Line inputs working. 1031 * Digital input not tested. 1032 */ 1033 /* DSP: Tina2 1034 * DAC: Wolfson WM8768/WM8568 1035 * ADC: Wolfson WM8775 1036 * AC97: None 1037 * CA0151: None 1038 */ 1039 /* Tested by James@superbug.co.uk 4th April 2006 */ 1040 /* A_IOCFG bits 1041 * Output 1042 * 0: Not Used 1043 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. 1044 * 2: Analog input 0 = line in, 1 = mic in 1045 * 3: Not Used 1046 * 4: Digital output 0 = off, 1 = on. 1047 * 5: Not Used 1048 * 6: Not Used 1049 * 7: Not Used 1050 * Input 1051 * All bits 1 (0x3fxx) means nothing plugged in. 1052 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. 1053 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. 1054 * C-D: 2 = Front/Rear/etc, 3 = nothing. 1055 * E-F: Always 0 1056 * 1057 */ 1058 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, 1059 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]", 1060 .id = "Audigy2", 1061 .emu10k2_chip = 1, 1062 .ca0108_chip = 1, 1063 .ca_cardbus_chip = 1, 1064 .spi_dac = 1, 1065 .i2c_adc = 1, 1066 .spk71 = 1} , 1067 /* This is MAEM8950 "Mana" */ 1068 /* Attach MicroDock[M] to make it an E-MU 1616[m]. */ 1069 /* Does NOT support sync daughter card (obviously). */ 1070 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1071 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, 1072 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]", 1073 .id = "EMU1010", 1074 .emu10k2_chip = 1, 1075 .ca0108_chip = 1, 1076 .ca_cardbus_chip = 1, 1077 .spk71 = 1 , 1078 .emu_model = EMU_MODEL_EMU1616}, 1079 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1080 /* This is MAEM8960 "Hana3", 0202 is MAEM8980 */ 1081 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1082 * MicroDock[M] to make it an E-MU 1616[m]. */ 1083 /* Does NOT support sync daughter card. */ 1084 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, 1085 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]", 1086 .id = "EMU1010", 1087 .emu10k2_chip = 1, 1088 .ca0108_chip = 1, 1089 .spk71 = 1, 1090 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */ 1091 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */ 1092 /* This is MAEM8986, 0202 is MAEM8980 */ 1093 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1094 * MicroDockM to make it an E-MU 1616m. The non-m 1095 * version was never sold with this card, but should 1096 * still work. */ 1097 /* Does NOT support sync daughter card. */ 1098 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102, 1099 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]", 1100 .id = "EMU1010", 1101 .emu10k2_chip = 1, 1102 .ca0108_chip = 1, 1103 .spk71 = 1, 1104 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */ 1105 /* Tested by James@superbug.co.uk 8th July 2005. */ 1106 /* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */ 1107 /* Attach 0202 daughter card to make it an E-MU 1212m, OR an 1108 * AudioDock[M] to make it an E-MU 1820[m]. */ 1109 /* Supports sync daughter card. */ 1110 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, 1111 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]", 1112 .id = "EMU1010", 1113 .emu10k2_chip = 1, 1114 .ca0102_chip = 1, 1115 .spk71 = 1, 1116 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */ 1117 /* This is MAEM8852 "HanaLiteLite" */ 1118 /* Supports sync daughter card. */ 1119 /* Tested by oswald.buddenhagen@gmx.de Mar 2023. */ 1120 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102, 1121 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]", 1122 .id = "EMU0404", 1123 .emu10k2_chip = 1, 1124 .ca0108_chip = 1, 1125 .spk20 = 1, 1126 .no_adat = 1, 1127 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */ 1128 /* This is MAEM8850 "HanaLite" */ 1129 /* Supports sync daughter card. */ 1130 /* Tested by James@superbug.co.uk 20-3-2007. */ 1131 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102, 1132 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]", 1133 .id = "EMU0404", 1134 .emu10k2_chip = 1, 1135 .ca0102_chip = 1, 1136 .spk20 = 1, 1137 .no_adat = 1, 1138 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */ 1139 /* EMU0404 PCIe */ 1140 /* Does NOT support sync daughter card. */ 1141 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102, 1142 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]", 1143 .id = "EMU0404", 1144 .emu10k2_chip = 1, 1145 .ca0108_chip = 1, 1146 .spk20 = 1, 1147 .no_adat = 1, 1148 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */ 1149 {.vendor = 0x1102, .device = 0x0008, 1150 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]", 1151 .id = "Audigy2", 1152 .emu10k2_chip = 1, 1153 .ca0108_chip = 1, 1154 .ac97_chip = 1} , 1155 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1156 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, 1157 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]", 1158 .id = "Audigy2", 1159 .emu10k2_chip = 1, 1160 .ca0102_chip = 1, 1161 .ca0151_chip = 1, 1162 .spk71 = 1, 1163 .spdif_bug = 1, 1164 .ac97_chip = 1} , 1165 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ 1166 /* The 0x20061102 does have SB0350 written on it 1167 * Just like 0x20021102 1168 */ 1169 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, 1170 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]", 1171 .id = "Audigy2", 1172 .emu10k2_chip = 1, 1173 .ca0102_chip = 1, 1174 .ca0151_chip = 1, 1175 .spk71 = 1, 1176 .spdif_bug = 1, 1177 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1178 .ac97_chip = 1} , 1179 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by 1180 Creative's Windows driver */ 1181 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102, 1182 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]", 1183 .id = "Audigy2", 1184 .emu10k2_chip = 1, 1185 .ca0102_chip = 1, 1186 .ca0151_chip = 1, 1187 .spk71 = 1, 1188 .spdif_bug = 1, 1189 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1190 .ac97_chip = 1} , 1191 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, 1192 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]", 1193 .id = "Audigy2", 1194 .emu10k2_chip = 1, 1195 .ca0102_chip = 1, 1196 .ca0151_chip = 1, 1197 .spk71 = 1, 1198 .spdif_bug = 1, 1199 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1200 .ac97_chip = 1} , 1201 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, 1202 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]", 1203 .id = "Audigy2", 1204 .emu10k2_chip = 1, 1205 .ca0102_chip = 1, 1206 .ca0151_chip = 1, 1207 .spk71 = 1, 1208 .spdif_bug = 1, 1209 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1210 .ac97_chip = 1} , 1211 /* Audigy 2 */ 1212 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1213 /* DSP: CA0102-IAT 1214 * DAC: CS4382-KQ 1215 * ADC: Philips 1361T 1216 * AC97: STAC9721 1217 * CA0151: Yes 1218 */ 1219 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, 1220 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]", 1221 .id = "Audigy2", 1222 .emu10k2_chip = 1, 1223 .ca0102_chip = 1, 1224 .ca0151_chip = 1, 1225 .spk71 = 1, 1226 .spdif_bug = 1, 1227 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1228 .ac97_chip = 1} , 1229 /* Audigy 2 Platinum EX */ 1230 /* Win driver sets A_IOCFG output to 0x1c00 */ 1231 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, 1232 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]", 1233 .id = "Audigy2", 1234 .emu10k2_chip = 1, 1235 .ca0102_chip = 1, 1236 .ca0151_chip = 1, 1237 .spk71 = 1, 1238 .spdif_bug = 1} , 1239 /* Dell OEM/Creative Labs Audigy 2 ZS */ 1240 /* See ALSA bug#1365 */ 1241 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, 1242 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]", 1243 .id = "Audigy2", 1244 .emu10k2_chip = 1, 1245 .ca0102_chip = 1, 1246 .ca0151_chip = 1, 1247 .spk71 = 1, 1248 .spdif_bug = 1, 1249 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1250 .ac97_chip = 1} , 1251 /* Audigy 2 Platinum */ 1252 /* Win driver sets A_IOCFG output to 0xa00 */ 1253 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, 1254 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]", 1255 .id = "Audigy2", 1256 .emu10k2_chip = 1, 1257 .ca0102_chip = 1, 1258 .ca0151_chip = 1, 1259 .spk71 = 1, 1260 .spdif_bug = 1, 1261 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1262 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ 1263 .ac97_chip = 1} , 1264 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, 1265 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]", 1266 .id = "Audigy2", 1267 .emu10k2_chip = 1, 1268 .ca0102_chip = 1, 1269 .ca0151_chip = 1, 1270 .spdif_bug = 1, 1271 .ac97_chip = 1} , 1272 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, 1273 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]", 1274 .id = "Audigy", 1275 .emu10k2_chip = 1, 1276 .ca0102_chip = 1, 1277 .ac97_chip = 1} , 1278 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, 1279 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]", 1280 .id = "Audigy", 1281 .emu10k2_chip = 1, 1282 .ca0102_chip = 1, 1283 .spdif_bug = 1, 1284 .ac97_chip = 1} , 1285 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, 1286 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]", 1287 .id = "Audigy", 1288 .emu10k2_chip = 1, 1289 .ca0102_chip = 1, 1290 .ac97_chip = 1} , 1291 {.vendor = 0x1102, .device = 0x0004, 1292 .driver = "Audigy", .name = "Audigy 1 [Unknown]", 1293 .id = "Audigy", 1294 .emu10k2_chip = 1, 1295 .ca0102_chip = 1, 1296 .ac97_chip = 1} , 1297 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, 1298 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1299 .id = "Live", 1300 .emu10k1_chip = 1, 1301 .ac97_chip = 1, 1302 .sblive51 = 1} , 1303 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102, 1304 .driver = "EMU10K1", .name = "SB Live! [SB0105]", 1305 .id = "Live", 1306 .emu10k1_chip = 1, 1307 .ac97_chip = 1, 1308 .sblive51 = 1} , 1309 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102, 1310 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]", 1311 .id = "Live", 1312 .emu10k1_chip = 1, 1313 .ac97_chip = 1, 1314 .sblive51 = 1} , 1315 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, 1316 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]", 1317 .id = "Live", 1318 .emu10k1_chip = 1, 1319 .ac97_chip = 1, 1320 .sblive51 = 1} , 1321 /* Tested by ALSA bug#1680 26th December 2005 */ 1322 /* note: It really has SB0220 written on the card, */ 1323 /* but it's SB0228 according to kx.inf */ 1324 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, 1325 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]", 1326 .id = "Live", 1327 .emu10k1_chip = 1, 1328 .ac97_chip = 1, 1329 .sblive51 = 1} , 1330 /* Tested by Thomas Zehetbauer 27th Aug 2005 */ 1331 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, 1332 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1333 .id = "Live", 1334 .emu10k1_chip = 1, 1335 .ac97_chip = 1, 1336 .sblive51 = 1} , 1337 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, 1338 .driver = "EMU10K1", .name = "SB Live! 5.1", 1339 .id = "Live", 1340 .emu10k1_chip = 1, 1341 .ac97_chip = 1, 1342 .sblive51 = 1} , 1343 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ 1344 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, 1345 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]", 1346 .id = "Live", 1347 .emu10k1_chip = 1, 1348 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum 1349 * share the same IDs! 1350 */ 1351 .sblive51 = 1} , 1352 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, 1353 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]", 1354 .id = "Live", 1355 .emu10k1_chip = 1, 1356 .ac97_chip = 1, 1357 .sblive51 = 1} , 1358 /* SB Live! Platinum */ 1359 /* Win driver sets A_IOCFG output to 0 */ 1360 /* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */ 1361 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, 1362 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]", 1363 .id = "Live", 1364 .emu10k1_chip = 1, 1365 .ac97_chip = 1} , 1366 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, 1367 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]", 1368 .id = "Live", 1369 .emu10k1_chip = 1, 1370 .ac97_chip = 1, 1371 .sblive51 = 1} , 1372 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, 1373 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]", 1374 .id = "Live", 1375 .emu10k1_chip = 1, 1376 .ac97_chip = 1, 1377 .sblive51 = 1} , 1378 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, 1379 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]", 1380 .id = "Live", 1381 .emu10k1_chip = 1, 1382 .ac97_chip = 1, 1383 .sblive51 = 1} , 1384 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1385 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, 1386 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]", 1387 .id = "Live", 1388 .emu10k1_chip = 1, 1389 .ac97_chip = 1, 1390 .sblive51 = 1} , 1391 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, 1392 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]", 1393 .id = "Live", 1394 .emu10k1_chip = 1, 1395 .ac97_chip = 1, 1396 .sblive51 = 1} , 1397 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, 1398 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", 1399 .id = "Live", 1400 .emu10k1_chip = 1, 1401 .ac97_chip = 1, 1402 .sblive51 = 1} , 1403 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, 1404 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]", 1405 .id = "Live", 1406 .emu10k1_chip = 1, 1407 .ac97_chip = 1, 1408 .sblive51 = 1} , 1409 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, 1410 .driver = "EMU10K1", .name = "E-MU APS [PC545]", 1411 .id = "APS", 1412 .emu10k1_chip = 1, 1413 .ecard = 1} , 1414 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, 1415 .driver = "EMU10K1", .name = "SB Live! [CT4620]", 1416 .id = "Live", 1417 .emu10k1_chip = 1, 1418 .ac97_chip = 1, 1419 .sblive51 = 1} , 1420 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, 1421 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]", 1422 .id = "Live", 1423 .emu10k1_chip = 1, 1424 .ac97_chip = 1, 1425 .sblive51 = 1} , 1426 {.vendor = 0x1102, .device = 0x0002, 1427 .driver = "EMU10K1", .name = "SB Live! [Unknown]", 1428 .id = "Live", 1429 .emu10k1_chip = 1, 1430 .ac97_chip = 1, 1431 .sblive51 = 1} , 1432 { } /* terminator */ 1433 }; 1434 1435 /* 1436 * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too) 1437 * has a problem that from time to time it likes to do few DMA reads a bit 1438 * beyond its normal allocation and gets very confused if these reads get 1439 * blocked by a IOMMU. 1440 * 1441 * This behaviour has been observed for the first (reserved) page 1442 * (for which it happens multiple times at every playback), often for various 1443 * synth pages and sometimes for PCM playback buffers and the page table 1444 * memory itself. 1445 * 1446 * As a workaround let's widen these DMA allocations by an extra page if we 1447 * detect that the device is behind a non-passthrough IOMMU. 1448 */ 1449 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu) 1450 { 1451 struct iommu_domain *domain; 1452 1453 emu->iommu_workaround = false; 1454 1455 domain = iommu_get_domain_for_dev(emu->card->dev); 1456 if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY) 1457 return; 1458 1459 dev_notice(emu->card->dev, 1460 "non-passthrough IOMMU detected, widening DMA allocations"); 1461 emu->iommu_workaround = true; 1462 } 1463 1464 int snd_emu10k1_create(struct snd_card *card, 1465 struct pci_dev *pci, 1466 unsigned short extin_mask, 1467 unsigned short extout_mask, 1468 long max_cache_bytes, 1469 int enable_ir, 1470 uint subsystem) 1471 { 1472 struct snd_emu10k1 *emu = card->private_data; 1473 int idx, err; 1474 int is_audigy; 1475 size_t page_table_size; 1476 __le32 *pgtbl; 1477 unsigned int silent_page; 1478 const struct snd_emu_chip_details *c; 1479 1480 /* enable PCI device */ 1481 err = pcim_enable_device(pci); 1482 if (err < 0) 1483 return err; 1484 1485 card->private_free = snd_emu10k1_free; 1486 emu->card = card; 1487 spin_lock_init(&emu->reg_lock); 1488 spin_lock_init(&emu->emu_lock); 1489 spin_lock_init(&emu->spi_lock); 1490 spin_lock_init(&emu->i2c_lock); 1491 spin_lock_init(&emu->voice_lock); 1492 spin_lock_init(&emu->synth_lock); 1493 spin_lock_init(&emu->memblk_lock); 1494 mutex_init(&emu->fx8010.lock); 1495 INIT_LIST_HEAD(&emu->mapped_link_head); 1496 INIT_LIST_HEAD(&emu->mapped_order_link_head); 1497 emu->pci = pci; 1498 emu->irq = -1; 1499 emu->synth = NULL; 1500 emu->get_synth_voice = NULL; 1501 INIT_DELAYED_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work); 1502 /* read revision & serial */ 1503 emu->revision = pci->revision; 1504 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); 1505 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); 1506 dev_dbg(card->dev, 1507 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", 1508 pci->vendor, pci->device, emu->serial, emu->model); 1509 1510 for (c = emu_chip_details; c->vendor; c++) { 1511 if (c->vendor == pci->vendor && c->device == pci->device) { 1512 if (subsystem) { 1513 if (c->subsystem && (c->subsystem == subsystem)) 1514 break; 1515 else 1516 continue; 1517 } else { 1518 if (c->subsystem && (c->subsystem != emu->serial)) 1519 continue; 1520 if (c->revision && c->revision != emu->revision) 1521 continue; 1522 } 1523 break; 1524 } 1525 } 1526 if (c->vendor == 0) { 1527 dev_err(card->dev, "emu10k1: Card not recognised\n"); 1528 return -ENOENT; 1529 } 1530 emu->card_capabilities = c; 1531 if (c->subsystem && !subsystem) 1532 dev_dbg(card->dev, "Sound card name = %s\n", c->name); 1533 else if (subsystem) 1534 dev_dbg(card->dev, "Sound card name = %s, " 1535 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. " 1536 "Forced to subsystem = 0x%x\n", c->name, 1537 pci->vendor, pci->device, emu->serial, c->subsystem); 1538 else 1539 dev_dbg(card->dev, "Sound card name = %s, " 1540 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n", 1541 c->name, pci->vendor, pci->device, 1542 emu->serial); 1543 1544 if (!*card->id && c->id) 1545 strscpy(card->id, c->id, sizeof(card->id)); 1546 1547 is_audigy = emu->audigy = c->emu10k2_chip; 1548 1549 snd_emu10k1_detect_iommu(emu); 1550 1551 /* set addressing mode */ 1552 emu->address_mode = is_audigy ? 0 : 1; 1553 /* set the DMA transfer mask */ 1554 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK; 1555 if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) { 1556 dev_err(card->dev, 1557 "architecture does not support PCI busmaster DMA with mask 0x%lx\n", 1558 emu->dma_mask); 1559 return -ENXIO; 1560 } 1561 if (is_audigy) 1562 emu->gpr_base = A_FXGPREGBASE; 1563 else 1564 emu->gpr_base = FXGPREGBASE; 1565 1566 err = pci_request_regions(pci, "EMU10K1"); 1567 if (err < 0) 1568 return err; 1569 emu->port = pci_resource_start(pci, 0); 1570 1571 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; 1572 1573 page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 : 1574 MAXPAGES0); 1575 if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size, 1576 &emu->ptb_pages) < 0) 1577 return -ENOMEM; 1578 dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n", 1579 (unsigned long)emu->ptb_pages.addr, 1580 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes)); 1581 1582 emu->page_ptr_table = vmalloc(array_size(sizeof(void *), 1583 emu->max_cache_pages)); 1584 emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long), 1585 emu->max_cache_pages)); 1586 if (!emu->page_ptr_table || !emu->page_addr_table) 1587 return -ENOMEM; 1588 1589 if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE, 1590 &emu->silent_page) < 0) 1591 return -ENOMEM; 1592 dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n", 1593 (unsigned long)emu->silent_page.addr, 1594 (unsigned long)(emu->silent_page.addr + 1595 emu->silent_page.bytes)); 1596 1597 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); 1598 if (!emu->memhdr) 1599 return -ENOMEM; 1600 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - 1601 sizeof(struct snd_util_memblk); 1602 1603 pci_set_master(pci); 1604 1605 // The masks are not used for Audigy. 1606 // FIXME: these should come from the card_capabilites table. 1607 if (extin_mask == 0) 1608 extin_mask = 0x3fcf; // EXTIN_* 1609 if (extout_mask == 0) 1610 extout_mask = 0x7fff; // EXTOUT_* 1611 emu->fx8010.extin_mask = extin_mask; 1612 emu->fx8010.extout_mask = extout_mask; 1613 emu->enable_ir = enable_ir; 1614 1615 if (emu->card_capabilities->ca_cardbus_chip) { 1616 err = snd_emu10k1_cardbus_init(emu); 1617 if (err < 0) 1618 return err; 1619 } 1620 if (emu->card_capabilities->ecard) { 1621 err = snd_emu10k1_ecard_init(emu); 1622 if (err < 0) 1623 return err; 1624 } else if (emu->card_capabilities->emu_model) { 1625 err = snd_emu10k1_emu1010_init(emu); 1626 if (err < 0) 1627 return err; 1628 } else { 1629 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version 1630 does not support this, it shouldn't do any harm */ 1631 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, 1632 AC97SLOT_CNTR|AC97SLOT_LFE); 1633 } 1634 1635 /* initialize TRAM setup */ 1636 emu->fx8010.itram_size = (16 * 1024)/2; 1637 emu->fx8010.etram_pages.area = NULL; 1638 emu->fx8010.etram_pages.bytes = 0; 1639 1640 /* irq handler must be registered after I/O ports are activated */ 1641 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt, 1642 IRQF_SHARED, KBUILD_MODNAME, emu)) 1643 return -EBUSY; 1644 emu->irq = pci->irq; 1645 card->sync_irq = emu->irq; 1646 1647 /* 1648 * Init to 0x02109204 : 1649 * Clock accuracy = 0 (1000ppm) 1650 * Sample Rate = 2 (48kHz) 1651 * Audio Channel = 1 (Left of 2) 1652 * Source Number = 0 (Unspecified) 1653 * Generation Status = 1 (Original for Cat Code 12) 1654 * Cat Code = 12 (Digital Signal Mixer) 1655 * Mode = 0 (Mode 0) 1656 * Emphasis = 0 (None) 1657 * CP = 1 (Copyright unasserted) 1658 * AN = 0 (Audio data) 1659 * P = 0 (Consumer) 1660 */ 1661 emu->spdif_bits[0] = emu->spdif_bits[1] = 1662 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1663 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1664 SPCS_GENERATIONSTATUS | 0x00001200 | 1665 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1666 1667 /* Clear silent pages and set up pointers */ 1668 memset(emu->silent_page.area, 0, emu->silent_page.bytes); 1669 silent_page = emu->silent_page.addr << emu->address_mode; 1670 pgtbl = (__le32 *)emu->ptb_pages.area; 1671 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++) 1672 pgtbl[idx] = cpu_to_le32(silent_page | idx); 1673 1674 /* set up voice indices */ 1675 for (idx = 0; idx < NUM_G; idx++) 1676 emu->voices[idx].number = idx; 1677 1678 err = snd_emu10k1_init(emu, enable_ir); 1679 if (err < 0) 1680 return err; 1681 #ifdef CONFIG_PM_SLEEP 1682 err = alloc_pm_buffer(emu); 1683 if (err < 0) 1684 return err; 1685 #endif 1686 1687 /* Initialize the effect engine */ 1688 err = snd_emu10k1_init_efx(emu); 1689 if (err < 0) 1690 return err; 1691 snd_emu10k1_audio_enable(emu); 1692 1693 #ifdef CONFIG_SND_PROC_FS 1694 snd_emu10k1_proc_init(emu); 1695 #endif 1696 return 0; 1697 } 1698 1699 #ifdef CONFIG_PM_SLEEP 1700 static const unsigned char saved_regs[] = { 1701 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, 1702 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, 1703 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, 1704 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, 1705 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, 1706 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, 1707 0xff /* end */ 1708 }; 1709 static const unsigned char saved_regs_audigy[] = { 1710 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC, 1711 A_FXRT2, A_SENDAMOUNTS, A_FXRT1, 1712 0xff /* end */ 1713 }; 1714 1715 static int alloc_pm_buffer(struct snd_emu10k1 *emu) 1716 { 1717 int size; 1718 1719 size = ARRAY_SIZE(saved_regs); 1720 if (emu->audigy) 1721 size += ARRAY_SIZE(saved_regs_audigy); 1722 emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size)); 1723 if (!emu->saved_ptr) 1724 return -ENOMEM; 1725 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) 1726 return -ENOMEM; 1727 if (emu->card_capabilities->ca0151_chip && 1728 snd_p16v_alloc_pm_buffer(emu) < 0) 1729 return -ENOMEM; 1730 return 0; 1731 } 1732 1733 static void free_pm_buffer(struct snd_emu10k1 *emu) 1734 { 1735 vfree(emu->saved_ptr); 1736 snd_emu10k1_efx_free_pm_buffer(emu); 1737 if (emu->card_capabilities->ca0151_chip) 1738 snd_p16v_free_pm_buffer(emu); 1739 } 1740 1741 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) 1742 { 1743 int i; 1744 const unsigned char *reg; 1745 unsigned int *val; 1746 1747 val = emu->saved_ptr; 1748 for (reg = saved_regs; *reg != 0xff; reg++) 1749 for (i = 0; i < NUM_G; i++, val++) 1750 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1751 if (emu->audigy) { 1752 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1753 for (i = 0; i < NUM_G; i++, val++) 1754 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1755 } 1756 if (emu->audigy) 1757 emu->saved_a_iocfg = inw(emu->port + A_IOCFG); 1758 emu->saved_hcfg = inl(emu->port + HCFG); 1759 } 1760 1761 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) 1762 { 1763 if (emu->card_capabilities->ca_cardbus_chip) 1764 snd_emu10k1_cardbus_init(emu); 1765 if (emu->card_capabilities->ecard) 1766 snd_emu10k1_ecard_init(emu); 1767 else if (emu->card_capabilities->emu_model) 1768 snd_emu10k1_emu1010_init(emu); 1769 else 1770 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); 1771 snd_emu10k1_init(emu, emu->enable_ir); 1772 } 1773 1774 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) 1775 { 1776 int i; 1777 const unsigned char *reg; 1778 unsigned int *val; 1779 1780 snd_emu10k1_audio_enable(emu); 1781 1782 /* resore for spdif */ 1783 if (emu->audigy) 1784 outw(emu->saved_a_iocfg, emu->port + A_IOCFG); 1785 outl(emu->saved_hcfg, emu->port + HCFG); 1786 1787 val = emu->saved_ptr; 1788 for (reg = saved_regs; *reg != 0xff; reg++) 1789 for (i = 0; i < NUM_G; i++, val++) 1790 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1791 if (emu->audigy) { 1792 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1793 for (i = 0; i < NUM_G; i++, val++) 1794 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1795 } 1796 } 1797 #endif 1798