xref: /linux/sound/pci/emu10k1/emu10k1_main.c (revision 398321d7531963b95841865eb371fe65c44c6921)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4  *                   James Courtier-Dutton <James@superbug.co.uk>
5  *                   Oswald Buddenhagen <oswald.buddenhagen@gmx.de>
6  *                   Creative Labs, Inc.
7  *
8  *  Routines for control of EMU10K1 chips
9  */
10 
11 #include <linux/sched.h>
12 #include <linux/delay.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/interrupt.h>
16 #include <linux/iommu.h>
17 #include <linux/pci.h>
18 #include <linux/slab.h>
19 #include <linux/vmalloc.h>
20 #include <linux/mutex.h>
21 
22 
23 #include <sound/core.h>
24 #include <sound/emu10k1.h>
25 #include <linux/firmware.h>
26 #include "p16v.h"
27 #include "tina2.h"
28 #include "p17v.h"
29 
30 
31 #define HANA_FILENAME "emu/hana.fw"
32 #define DOCK_FILENAME "emu/audio_dock.fw"
33 #define EMU1010B_FILENAME "emu/emu1010b.fw"
34 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
35 #define EMU0404_FILENAME "emu/emu0404.fw"
36 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
37 
38 MODULE_FIRMWARE(HANA_FILENAME);
39 MODULE_FIRMWARE(DOCK_FILENAME);
40 MODULE_FIRMWARE(EMU1010B_FILENAME);
41 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
42 MODULE_FIRMWARE(EMU0404_FILENAME);
43 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
44 
45 
46 /*************************************************************************
47  * EMU10K1 init / done
48  *************************************************************************/
49 
50 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
51 {
52 	snd_emu10k1_ptr_write_multiple(emu, ch,
53 		DCYSUSV, 0,
54 		VTFT, VTFT_FILTERTARGET_MASK,
55 		CVCF, CVCF_CURRENTFILTER_MASK,
56 		PTRX, 0,
57 		CPF, 0,
58 		CCR, 0,
59 
60 		PSST, 0,
61 		DSL, 0x10,
62 		CCCA, 0,
63 		Z1, 0,
64 		Z2, 0,
65 		FXRT, 0x32100000,
66 
67 		// The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero
68 		DCYSUSM, 0,
69 		ATKHLDV, 0,
70 		ATKHLDM, 0,
71 		IP, 0,
72 		IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK,
73 		PEFE, 0,
74 		FMMOD, 0,
75 		TREMFRQ, 24,	/* 1 Hz */
76 		FM2FRQ2, 24,	/* 1 Hz */
77 		LFOVAL2, 0,
78 		LFOVAL1, 0,
79 		ENVVOL, 0,
80 		ENVVAL, 0,
81 
82 		REGLIST_END);
83 
84 	/* Audigy extra stuffs */
85 	if (emu->audigy) {
86 		snd_emu10k1_ptr_write_multiple(emu, ch,
87 			A_CSBA, 0,
88 			A_CSDC, 0,
89 			A_CSFE, 0,
90 			A_CSHG, 0,
91 			A_FXRT1, 0x03020100,
92 			A_FXRT2, 0x07060504,
93 			A_SENDAMOUNTS, 0,
94 			REGLIST_END);
95 	}
96 }
97 
98 static const unsigned int spi_dac_init[] = {
99 		0x00ff,
100 		0x02ff,
101 		0x0400,
102 		0x0520,
103 		0x0600,
104 		0x08ff,
105 		0x0aff,
106 		0x0cff,
107 		0x0eff,
108 		0x10ff,
109 		0x1200,
110 		0x1400,
111 		0x1480,
112 		0x1800,
113 		0x1aff,
114 		0x1cff,
115 		0x1e00,
116 		0x0530,
117 		0x0602,
118 		0x0622,
119 		0x1400,
120 };
121 
122 static const unsigned int i2c_adc_init[][2] = {
123 	{ 0x17, 0x00 }, /* Reset */
124 	{ 0x07, 0x00 }, /* Timeout */
125 	{ 0x0b, 0x22 },  /* Interface control */
126 	{ 0x0c, 0x22 },  /* Master mode control */
127 	{ 0x0d, 0x08 },  /* Powerdown control */
128 	{ 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
129 	{ 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
130 	{ 0x10, 0x7b },  /* ALC Control 1 */
131 	{ 0x11, 0x00 },  /* ALC Control 2 */
132 	{ 0x12, 0x32 },  /* ALC Control 3 */
133 	{ 0x13, 0x00 },  /* Noise gate control */
134 	{ 0x14, 0xa6 },  /* Limiter control */
135 	{ 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for A2ZS Notebook */
136 };
137 
138 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir)
139 {
140 	unsigned int silent_page;
141 	int ch;
142 	u32 tmp;
143 
144 	/* disable audio and lock cache */
145 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
146 		HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
147 
148 	outl(0, emu->port + INTE);
149 
150 	snd_emu10k1_ptr_write_multiple(emu, 0,
151 		/* reset recording buffers */
152 		MICBS, ADCBS_BUFSIZE_NONE,
153 		MICBA, 0,
154 		FXBS, ADCBS_BUFSIZE_NONE,
155 		FXBA, 0,
156 		ADCBS, ADCBS_BUFSIZE_NONE,
157 		ADCBA, 0,
158 
159 		/* disable channel interrupt */
160 		CLIEL, 0,
161 		CLIEH, 0,
162 
163 		/* disable stop on loop end */
164 		SOLEL, 0,
165 		SOLEH, 0,
166 
167 		REGLIST_END);
168 
169 	if (emu->audigy) {
170 		/* set SPDIF bypass mode */
171 		snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
172 		/* enable rear left + rear right AC97 slots */
173 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
174 				      AC97SLOT_REAR_LEFT);
175 	}
176 
177 	/* init envelope engine */
178 	for (ch = 0; ch < NUM_G; ch++)
179 		snd_emu10k1_voice_init(emu, ch);
180 
181 	snd_emu10k1_ptr_write_multiple(emu, 0,
182 		SPCS0, emu->spdif_bits[0],
183 		SPCS1, emu->spdif_bits[1],
184 		SPCS2, emu->spdif_bits[2],
185 		REGLIST_END);
186 
187 	if (emu->card_capabilities->emu_model) {
188 	} else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
189 		/* Hacks for Alice3 to work independent of haP16V driver */
190 		/* Setup SRCMulti_I2S SamplingRate */
191 		snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
192 
193 		/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
194 		snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
195 		/* Setup SRCMulti Input Audio Enable */
196 		/* Use 0xFFFFFFFF to enable P16V sounds. */
197 		snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
198 
199 		/* Enabled Phased (8-channel) P16V playback */
200 		outl(0x0201, emu->port + HCFG2);
201 		/* Set playback routing. */
202 		snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
203 	} else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
204 		/* Hacks for Alice3 to work independent of haP16V driver */
205 		dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
206 		/* Setup SRCMulti_I2S SamplingRate */
207 		snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000);
208 
209 		/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
210 		snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14);
211 
212 		/* Setup SRCMulti Input Audio Enable */
213 		snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000);
214 
215 		/* Setup SPDIF Out Audio Enable */
216 		/* The Audigy 2 Value has a separate SPDIF out,
217 		 * so no need for a mixer switch
218 		 */
219 		snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000);
220 
221 		tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
222 		outw(tmp, emu->port + A_IOCFG);
223 	}
224 	if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
225 		int size, n;
226 
227 		size = ARRAY_SIZE(spi_dac_init);
228 		for (n = 0; n < size; n++)
229 			snd_emu10k1_spi_write(emu, spi_dac_init[n]);
230 
231 		snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
232 		/* Enable GPIOs
233 		 * GPIO0: Unknown
234 		 * GPIO1: Speakers-enabled.
235 		 * GPIO2: Unknown
236 		 * GPIO3: Unknown
237 		 * GPIO4: IEC958 Output on.
238 		 * GPIO5: Unknown
239 		 * GPIO6: Unknown
240 		 * GPIO7: Unknown
241 		 */
242 		outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
243 	}
244 	if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
245 		int size, n;
246 
247 		snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
248 		tmp = inw(emu->port + A_IOCFG);
249 		outw(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
250 		tmp = inw(emu->port + A_IOCFG);
251 		size = ARRAY_SIZE(i2c_adc_init);
252 		for (n = 0; n < size; n++)
253 			snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
254 		for (n = 0; n < 4; n++) {
255 			emu->i2c_capture_volume[n][0] = 0xcf;
256 			emu->i2c_capture_volume[n][1] = 0xcf;
257 		}
258 	}
259 
260 
261 	snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
262 	snd_emu10k1_ptr_write(emu, TCB, 0, 0);	/* taken from original driver */
263 	snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K);	/* taken from original driver */
264 
265 	silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0);
266 	for (ch = 0; ch < NUM_G; ch++) {
267 		snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
268 		snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
269 	}
270 
271 	if (emu->card_capabilities->emu_model) {
272 		outl(HCFG_AUTOMUTE_ASYNC |
273 			HCFG_EMU32_SLAVE |
274 			HCFG_AUDIOENABLE, emu->port + HCFG);
275 	/*
276 	 *  Hokay, setup HCFG
277 	 *   Mute Disable Audio = 0
278 	 *   Lock Tank Memory = 1
279 	 *   Lock Sound Memory = 0
280 	 *   Auto Mute = 1
281 	 */
282 	} else if (emu->audigy) {
283 		if (emu->revision == 4) /* audigy2 */
284 			outl(HCFG_AUDIOENABLE |
285 			     HCFG_AC3ENABLE_CDSPDIF |
286 			     HCFG_AC3ENABLE_GPSPDIF |
287 			     HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
288 		else
289 			outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
290 	/* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
291 	 * e.g. card_capabilities->joystick */
292 	} else if (emu->model == 0x20 ||
293 	    emu->model == 0xc400 ||
294 	    (emu->model == 0x21 && emu->revision < 6))
295 		outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
296 	else
297 		/* With on-chip joystick */
298 		outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
299 
300 	if (enable_ir) {	/* enable IR for SB Live */
301 		if (emu->card_capabilities->emu_model) {
302 			;  /* Disable all access to A_IOCFG for the emu1010 */
303 		} else if (emu->card_capabilities->i2c_adc) {
304 			;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
305 		} else if (emu->audigy) {
306 			u16 reg = inw(emu->port + A_IOCFG);
307 			outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
308 			udelay(500);
309 			outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
310 			udelay(100);
311 			outw(reg, emu->port + A_IOCFG);
312 		} else {
313 			unsigned int reg = inl(emu->port + HCFG);
314 			outl(reg | HCFG_GPOUT2, emu->port + HCFG);
315 			udelay(500);
316 			outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
317 			udelay(100);
318 			outl(reg, emu->port + HCFG);
319 		}
320 	}
321 
322 	if (emu->card_capabilities->emu_model) {
323 		;  /* Disable all access to A_IOCFG for the emu1010 */
324 	} else if (emu->card_capabilities->i2c_adc) {
325 		;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
326 	} else if (emu->audigy) {	/* enable analog output */
327 		u16 reg = inw(emu->port + A_IOCFG);
328 		outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
329 	}
330 
331 	if (emu->address_mode == 0) {
332 		/* use 16M in 4G */
333 		outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG);
334 	}
335 
336 	return 0;
337 }
338 
339 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
340 {
341 	/*
342 	 *  Enable the audio bit
343 	 */
344 	outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
345 
346 	/* Enable analog/digital outs on audigy */
347 	if (emu->card_capabilities->emu_model) {
348 		;  /* Disable all access to A_IOCFG for the emu1010 */
349 	} else if (emu->card_capabilities->i2c_adc) {
350 		;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
351 	} else if (emu->audigy) {
352 		outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
353 
354 		if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
355 			/* Unmute Analog now.  Set GPO6 to 1 for Apollo.
356 			 * This has to be done after init ALice3 I2SOut beyond 48KHz.
357 			 * So, sequence is important. */
358 			outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
359 		} else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
360 			/* Unmute Analog now. */
361 			outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
362 		} else {
363 			/* Disable routing from AC97 line out to Front speakers */
364 			outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
365 		}
366 	}
367 
368 #if 0
369 	{
370 	unsigned int tmp;
371 	/* FIXME: the following routine disables LiveDrive-II !! */
372 	/* TOSLink detection */
373 	emu->tos_link = 0;
374 	tmp = inl(emu->port + HCFG);
375 	if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
376 		outl(tmp|0x800, emu->port + HCFG);
377 		udelay(50);
378 		if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
379 			emu->tos_link = 1;
380 			outl(tmp, emu->port + HCFG);
381 		}
382 	}
383 	}
384 #endif
385 
386 	if (emu->card_capabilities->emu_model)
387 		snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE | INTE_A_GPIOENABLE);
388 	else
389 		snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
390 }
391 
392 int snd_emu10k1_done(struct snd_emu10k1 *emu)
393 {
394 	int ch;
395 
396 	outl(0, emu->port + INTE);
397 
398 	/*
399 	 *  Shutdown the voices
400 	 */
401 	for (ch = 0; ch < NUM_G; ch++) {
402 		snd_emu10k1_ptr_write_multiple(emu, ch,
403 			DCYSUSV, 0,
404 			VTFT, 0,
405 			CVCF, 0,
406 			PTRX, 0,
407 			CPF, 0,
408 			REGLIST_END);
409 	}
410 
411 	// stop the DSP
412 	if (emu->audigy)
413 		snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
414 	else
415 		snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
416 
417 	snd_emu10k1_ptr_write_multiple(emu, 0,
418 		/* reset recording buffers */
419 		MICBS, 0,
420 		MICBA, 0,
421 		FXBS, 0,
422 		FXBA, 0,
423 		FXWC, 0,
424 		ADCBS, ADCBS_BUFSIZE_NONE,
425 		ADCBA, 0,
426 		TCBS, TCBS_BUFFSIZE_16K,
427 		TCB, 0,
428 
429 		/* disable channel interrupt */
430 		CLIEL, 0,
431 		CLIEH, 0,
432 		SOLEL, 0,
433 		SOLEH, 0,
434 
435 		PTB, 0,
436 
437 		REGLIST_END);
438 
439 	/* disable audio and lock cache */
440 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
441 
442 	return 0;
443 }
444 
445 /*************************************************************************
446  * ECARD functional implementation
447  *************************************************************************/
448 
449 /* In A1 Silicon, these bits are in the HC register */
450 #define HOOKN_BIT		(1L << 12)
451 #define HANDN_BIT		(1L << 11)
452 #define PULSEN_BIT		(1L << 10)
453 
454 #define EC_GDI1			(1 << 13)
455 #define EC_GDI0			(1 << 14)
456 
457 #define EC_NUM_CONTROL_BITS	20
458 
459 #define EC_AC3_DATA_SELN	0x0001L
460 #define EC_EE_DATA_SEL		0x0002L
461 #define EC_EE_CNTRL_SELN	0x0004L
462 #define EC_EECLK		0x0008L
463 #define EC_EECS			0x0010L
464 #define EC_EESDO		0x0020L
465 #define EC_TRIM_CSN		0x0040L
466 #define EC_TRIM_SCLK		0x0080L
467 #define EC_TRIM_SDATA		0x0100L
468 #define EC_TRIM_MUTEN		0x0200L
469 #define EC_ADCCAL		0x0400L
470 #define EC_ADCRSTN		0x0800L
471 #define EC_DACCAL		0x1000L
472 #define EC_DACMUTEN		0x2000L
473 #define EC_LEDN			0x4000L
474 
475 #define EC_SPDIF0_SEL_SHIFT	15
476 #define EC_SPDIF1_SEL_SHIFT	17
477 #define EC_SPDIF0_SEL_MASK	(0x3L << EC_SPDIF0_SEL_SHIFT)
478 #define EC_SPDIF1_SEL_MASK	(0x7L << EC_SPDIF1_SEL_SHIFT)
479 #define EC_SPDIF0_SELECT(_x)	(((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
480 #define EC_SPDIF1_SELECT(_x)	(((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
481 #define EC_CURRENT_PROM_VERSION 0x01	/* Self-explanatory.  This should
482 					 * be incremented any time the EEPROM's
483 					 * format is changed.  */
484 
485 #define EC_EEPROM_SIZE		0x40	/* ECARD EEPROM has 64 16-bit words */
486 
487 /* Addresses for special values stored in to EEPROM */
488 #define EC_PROM_VERSION_ADDR	0x20	/* Address of the current prom version */
489 #define EC_BOARDREV0_ADDR	0x21	/* LSW of board rev */
490 #define EC_BOARDREV1_ADDR	0x22	/* MSW of board rev */
491 
492 #define EC_LAST_PROMFILE_ADDR	0x2f
493 
494 #define EC_SERIALNUM_ADDR	0x30	/* First word of serial number.  The
495 					 * can be up to 30 characters in length
496 					 * and is stored as a NULL-terminated
497 					 * ASCII string.  Any unused bytes must be
498 					 * filled with zeros */
499 #define EC_CHECKSUM_ADDR	0x3f	/* Location at which checksum is stored */
500 
501 
502 /* Most of this stuff is pretty self-evident.  According to the hardware
503  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
504  * offset problem.  Weird.
505  */
506 #define EC_RAW_RUN_MODE		(EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
507 				 EC_TRIM_CSN)
508 
509 
510 #define EC_DEFAULT_ADC_GAIN	0xC4C4
511 #define EC_DEFAULT_SPDIF0_SEL	0x0
512 #define EC_DEFAULT_SPDIF1_SEL	0x4
513 
514 /**************************************************************************
515  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
516  *  control latch will is loaded bit-serially by toggling the Modem control
517  *  lines from function 2 on the E8010.  This function hides these details
518  *  and presents the illusion that we are actually writing to a distinct
519  *  register.
520  */
521 
522 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
523 {
524 	unsigned short count;
525 	unsigned int data;
526 	unsigned long hc_port;
527 	unsigned int hc_value;
528 
529 	hc_port = emu->port + HCFG;
530 	hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
531 	outl(hc_value, hc_port);
532 
533 	for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
534 
535 		/* Set up the value */
536 		data = ((value & 0x1) ? PULSEN_BIT : 0);
537 		value >>= 1;
538 
539 		outl(hc_value | data, hc_port);
540 
541 		/* Clock the shift register */
542 		outl(hc_value | data | HANDN_BIT, hc_port);
543 		outl(hc_value | data, hc_port);
544 	}
545 
546 	/* Latch the bits */
547 	outl(hc_value | HOOKN_BIT, hc_port);
548 	outl(hc_value, hc_port);
549 }
550 
551 /**************************************************************************
552  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
553  * trim value consists of a 16bit value which is composed of two
554  * 8 bit gain/trim values, one for the left channel and one for the
555  * right channel.  The following table maps from the Gain/Attenuation
556  * value in decibels into the corresponding bit pattern for a single
557  * channel.
558  */
559 
560 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
561 					 unsigned short gain)
562 {
563 	unsigned int bit;
564 
565 	/* Enable writing to the TRIM registers */
566 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
567 
568 	/* Do it again to insure that we meet hold time requirements */
569 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
570 
571 	for (bit = (1 << 15); bit; bit >>= 1) {
572 		unsigned int value;
573 
574 		value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
575 
576 		if (gain & bit)
577 			value |= EC_TRIM_SDATA;
578 
579 		/* Clock the bit */
580 		snd_emu10k1_ecard_write(emu, value);
581 		snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
582 		snd_emu10k1_ecard_write(emu, value);
583 	}
584 
585 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
586 }
587 
588 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
589 {
590 	unsigned int hc_value;
591 
592 	/* Set up the initial settings */
593 	emu->ecard_ctrl = EC_RAW_RUN_MODE |
594 			  EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
595 			  EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
596 
597 	/* Step 0: Set the codec type in the hardware control register
598 	 * and enable audio output */
599 	hc_value = inl(emu->port + HCFG);
600 	outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
601 	inl(emu->port + HCFG);
602 
603 	/* Step 1: Turn off the led and deassert TRIM_CS */
604 	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
605 
606 	/* Step 2: Calibrate the ADC and DAC */
607 	snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
608 
609 	/* Step 3: Wait for awhile;   XXX We can't get away with this
610 	 * under a real operating system; we'll need to block and wait that
611 	 * way. */
612 	snd_emu10k1_wait(emu, 48000);
613 
614 	/* Step 4: Switch off the DAC and ADC calibration.  Note
615 	 * That ADC_CAL is actually an inverted signal, so we assert
616 	 * it here to stop calibration.  */
617 	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
618 
619 	/* Step 4: Switch into run mode */
620 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
621 
622 	/* Step 5: Set the analog input gain */
623 	snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
624 
625 	return 0;
626 }
627 
628 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
629 {
630 	unsigned long special_port;
631 	__always_unused unsigned int value;
632 
633 	/* Special initialisation routine
634 	 * before the rest of the IO-Ports become active.
635 	 */
636 	special_port = emu->port + 0x38;
637 	value = inl(special_port);
638 	outl(0x00d00000, special_port);
639 	value = inl(special_port);
640 	outl(0x00d00001, special_port);
641 	value = inl(special_port);
642 	outl(0x00d0005f, special_port);
643 	value = inl(special_port);
644 	outl(0x00d0007f, special_port);
645 	value = inl(special_port);
646 	outl(0x0090007f, special_port);
647 	value = inl(special_port);
648 
649 	snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
650 	/* Delay to give time for ADC chip to switch on. It needs 113ms */
651 	msleep(200);
652 	return 0;
653 }
654 
655 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu,
656 				     const struct firmware *fw_entry)
657 {
658 	int n, i;
659 	u16 reg;
660 	u8 value;
661 	__always_unused u16 write_post;
662 
663 	if (!fw_entry)
664 		return -EIO;
665 
666 	/* The FPGA is a Xilinx Spartan IIE XC2S50E */
667 	/* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */
668 	/* GPIO7 -> FPGA PGMN
669 	 * GPIO6 -> FPGA CCLK
670 	 * GPIO5 -> FPGA DIN
671 	 * FPGA CONFIG OFF -> FPGA PGMN
672 	 */
673 	spin_lock_irq(&emu->emu_lock);
674 	outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */
675 	write_post = inw(emu->port + A_GPIO);
676 	udelay(100);
677 	outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */
678 	write_post = inw(emu->port + A_GPIO);
679 	udelay(100); /* Allow FPGA memory to clean */
680 	for (n = 0; n < fw_entry->size; n++) {
681 		value = fw_entry->data[n];
682 		for (i = 0; i < 8; i++) {
683 			reg = 0x80;
684 			if (value & 0x1)
685 				reg = reg | 0x20;
686 			value = value >> 1;
687 			outw(reg, emu->port + A_GPIO);
688 			write_post = inw(emu->port + A_GPIO);
689 			outw(reg | 0x40, emu->port + A_GPIO);
690 			write_post = inw(emu->port + A_GPIO);
691 		}
692 	}
693 	/* After programming, set GPIO bit 4 high again. */
694 	outw(0x10, emu->port + A_GPIO);
695 	write_post = inw(emu->port + A_GPIO);
696 	spin_unlock_irq(&emu->emu_lock);
697 
698 	return 0;
699 }
700 
701 /* firmware file names, per model, init-fw and dock-fw (optional) */
702 static const char * const firmware_names[5][2] = {
703 	[EMU_MODEL_EMU1010] = {
704 		HANA_FILENAME, DOCK_FILENAME
705 	},
706 	[EMU_MODEL_EMU1010B] = {
707 		EMU1010B_FILENAME, MICRO_DOCK_FILENAME
708 	},
709 	[EMU_MODEL_EMU1616] = {
710 		EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME
711 	},
712 	[EMU_MODEL_EMU0404] = {
713 		EMU0404_FILENAME, NULL
714 	},
715 };
716 
717 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock,
718 				     const struct firmware **fw)
719 {
720 	const char *filename;
721 	int err;
722 
723 	if (!*fw) {
724 		filename = firmware_names[emu->card_capabilities->emu_model][dock];
725 		if (!filename)
726 			return 0;
727 		err = request_firmware(fw, filename, &emu->pci->dev);
728 		if (err)
729 			return err;
730 	}
731 
732 	return snd_emu1010_load_firmware_entry(emu, *fw);
733 }
734 
735 static void emu1010_firmware_work(struct work_struct *work)
736 {
737 	struct snd_emu10k1 *emu;
738 	u32 tmp, tmp2, reg;
739 	int err;
740 
741 	emu = container_of(work, struct snd_emu10k1,
742 			   emu1010.firmware_work);
743 	if (emu->card->shutdown)
744 		return;
745 #ifdef CONFIG_PM_SLEEP
746 	if (emu->suspend)
747 		return;
748 #endif
749 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
750 	if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
751 		/* Audio Dock attached */
752 		/* Return to Audio Dock programming mode */
753 		dev_info(emu->card->dev,
754 			 "emu1010: Loading Audio Dock Firmware\n");
755 		snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG,
756 				       EMU_HANA_FPGA_CONFIG_AUDIODOCK);
757 		err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw);
758 		if (err < 0)
759 			return;
760 		snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
761 		snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp);
762 		dev_info(emu->card->dev,
763 			 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp);
764 		if ((tmp & 0x1f) != 0x15) {
765 			/* FPGA failed to be programmed */
766 			dev_info(emu->card->dev,
767 				 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
768 				 tmp);
769 			return;
770 		}
771 		dev_info(emu->card->dev,
772 			 "emu1010: Audio Dock Firmware loaded\n");
773 		snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
774 		snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
775 		dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2);
776 		/* Sync clocking between 1010 and Dock */
777 		/* Allow DLL to settle */
778 		msleep(10);
779 		/* Unmute all. Default is muted after a firmware load */
780 		snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
781 	} else if (!(reg & EMU_HANA_OPTION_DOCK_ONLINE)) {
782 		/* Audio Dock removed */
783 		dev_info(emu->card->dev, "emu1010: Audio Dock detached\n");
784 		/* The hardware auto-mutes all, so we unmute again */
785 		snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
786 	}
787 }
788 
789 static void emu1010_clock_work(struct work_struct *work)
790 {
791 	struct snd_emu10k1 *emu;
792 	struct snd_ctl_elem_id id;
793 
794 	emu = container_of(work, struct snd_emu10k1,
795 			   emu1010.clock_work);
796 	if (emu->card->shutdown)
797 		return;
798 #ifdef CONFIG_PM_SLEEP
799 	if (emu->suspend)
800 		return;
801 #endif
802 
803 	spin_lock_irq(&emu->reg_lock);
804 	// This is the only thing that can actually happen.
805 	emu->emu1010.clock_source = emu->emu1010.clock_fallback;
806 	emu->emu1010.wclock = 1 - emu->emu1010.clock_source;
807 	snd_emu1010_update_clock(emu);
808 	spin_unlock_irq(&emu->reg_lock);
809 	snd_ctl_build_ioff(&id, emu->ctl_clock_source, 0);
810 	snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE, &id);
811 }
812 
813 static void emu1010_interrupt(struct snd_emu10k1 *emu)
814 {
815 	u32 sts;
816 
817 	snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &sts);
818 
819 	// The distinction of the IRQ status bits is unreliable,
820 	// so we dispatch later based on option card status.
821 	if (sts & (EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST))
822 		schedule_work(&emu->emu1010.firmware_work);
823 
824 	if (sts & EMU_HANA_IRQ_WCLK_CHANGED)
825 		schedule_work(&emu->emu1010.clock_work);
826 }
827 
828 /*
829  * Current status of the driver:
830  * ----------------------------
831  * 	* only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
832  * 	* PCM device nb. 2:
833  *		16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
834  * 		16 x 32-bit capture - snd_emu10k1_capture_efx_ops
835  */
836 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
837 {
838 	u32 tmp, tmp2, reg;
839 	int err;
840 
841 	dev_info(emu->card->dev, "emu1010: Special config.\n");
842 
843 	/* Mute, and disable audio and lock cache, just in case.
844 	 * Proper init follows in snd_emu10k1_init(). */
845 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
846 
847 	/* Disable 48Volt power to Audio Dock */
848 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
849 
850 	/* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
851 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
852 	dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
853 	if ((reg & 0x3f) == 0x15) {
854 		/* FPGA netlist already present so clear it */
855 		/* Return to programming mode */
856 
857 		snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA);
858 	}
859 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
860 	dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
861 	if ((reg & 0x3f) == 0x15) {
862 		/* FPGA failed to return to programming mode */
863 		dev_info(emu->card->dev,
864 			 "emu1010: FPGA failed to return to programming mode\n");
865 		return -ENODEV;
866 	}
867 	dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
868 
869 	err = snd_emu1010_load_firmware(emu, 0, &emu->firmware);
870 	if (err < 0) {
871 		dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
872 		return err;
873 	}
874 
875 	/* ID, should read & 0x7f = 0x55 when FPGA programmed. */
876 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
877 	if ((reg & 0x3f) != 0x15) {
878 		/* FPGA failed to be programmed */
879 		dev_info(emu->card->dev,
880 			 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
881 			 reg);
882 		return -ENODEV;
883 	}
884 
885 	dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
886 	snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
887 	snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
888 	dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
889 	/* Enable 48Volt power to Audio Dock */
890 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
891 
892 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
893 	dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
894 	if (reg & EMU_HANA_OPTION_DOCK_OFFLINE)
895 		schedule_work(&emu->emu1010.firmware_work);
896 	if (emu->card_capabilities->no_adat) {
897 		emu->emu1010.optical_in = 0; /* IN_SPDIF */
898 		emu->emu1010.optical_out = 0; /* OUT_SPDIF */
899 	} else {
900 		/* Optical -> ADAT I/O  */
901 		emu->emu1010.optical_in = 1; /* IN_ADAT */
902 		emu->emu1010.optical_out = 1; /* OUT_ADAT */
903 	}
904 	tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) |
905 		(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF);
906 	snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
907 	/* Set no attenuation on Audio Dock pads. */
908 	emu->emu1010.adc_pads = 0x00;
909 	snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads);
910 	/* Unmute Audio dock DACs, Headphone source DAC-4. */
911 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4);
912 	/* DAC PADs. */
913 	emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 |
914 				EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4;
915 	snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads);
916 	/* SPDIF Format. Set Consumer mode, 24bit, copy enable */
917 	snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID);
918 	/* MIDI routing */
919 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2);
920 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2);
921 
922 	emu->gpio_interrupt = emu1010_interrupt;
923 	// Note: The Audigy INTE is set later
924 	snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE,
925 			       EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST | EMU_HANA_IRQ_WCLK_CHANGED);
926 	snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);  // Clear pending IRQs
927 
928 	emu->emu1010.clock_source = 1;  /* 48000 */
929 	emu->emu1010.clock_fallback = 1;  /* 48000 */
930 	/* Default WCLK set to 48kHz. */
931 	snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K);
932 	/* Word Clock source, Internal 48kHz x1 */
933 	emu->emu1010.wclock = EMU_HANA_WCLOCK_INT_48K;
934 	snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
935 	/* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
936 	snd_emu1010_update_clock(emu);
937 
938 	// The routes are all set to EMU_SRC_SILENCE due to the reset,
939 	// so it is safe to simply enable the outputs.
940 	snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
941 
942 	return 0;
943 }
944 /*
945  *  Create the EMU10K1 instance
946  */
947 
948 #ifdef CONFIG_PM_SLEEP
949 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
950 static void free_pm_buffer(struct snd_emu10k1 *emu);
951 #endif
952 
953 static void snd_emu10k1_free(struct snd_card *card)
954 {
955 	struct snd_emu10k1 *emu = card->private_data;
956 
957 	if (emu->port) {	/* avoid access to already used hardware */
958 		snd_emu10k1_fx8010_tram_setup(emu, 0);
959 		snd_emu10k1_done(emu);
960 		snd_emu10k1_free_efx(emu);
961 	}
962 	if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
963 		/* Disable 48Volt power to Audio Dock */
964 		snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
965 	}
966 	cancel_work_sync(&emu->emu1010.firmware_work);
967 	cancel_work_sync(&emu->emu1010.clock_work);
968 	release_firmware(emu->firmware);
969 	release_firmware(emu->dock_fw);
970 	snd_util_memhdr_free(emu->memhdr);
971 	if (emu->silent_page.area)
972 		snd_dma_free_pages(&emu->silent_page);
973 	if (emu->ptb_pages.area)
974 		snd_dma_free_pages(&emu->ptb_pages);
975 	vfree(emu->page_ptr_table);
976 	vfree(emu->page_addr_table);
977 #ifdef CONFIG_PM_SLEEP
978 	free_pm_buffer(emu);
979 #endif
980 }
981 
982 static const struct snd_emu_chip_details emu_chip_details[] = {
983 	/* Audigy 5/Rx SB1550 */
984 	/* Tested by michael@gernoth.net 28 Mar 2015 */
985 	/* DSP: CA10300-IAT LF
986 	 * DAC: Cirrus Logic CS4382-KQZ
987 	 * ADC: Philips 1361T
988 	 * AC97: Sigmatel STAC9750
989 	 * CA0151: None
990 	 */
991 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102,
992 	 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]",
993 	 .id = "Audigy2",
994 	 .emu10k2_chip = 1,
995 	 .ca0108_chip = 1,
996 	 .spk71 = 1,
997 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
998 	 .ac97_chip = 1},
999 	/* Audigy4 (Not PRO) SB0610 */
1000 	/* Tested by James@superbug.co.uk 4th April 2006 */
1001 	/* A_IOCFG bits
1002 	 * Output
1003 	 * 0: ?
1004 	 * 1: ?
1005 	 * 2: ?
1006 	 * 3: 0 - Digital Out, 1 - Line in
1007 	 * 4: ?
1008 	 * 5: ?
1009 	 * 6: ?
1010 	 * 7: ?
1011 	 * Input
1012 	 * 8: ?
1013 	 * 9: ?
1014 	 * A: Green jack sense (Front)
1015 	 * B: ?
1016 	 * C: Black jack sense (Rear/Side Right)
1017 	 * D: Yellow jack sense (Center/LFE/Side Left)
1018 	 * E: ?
1019 	 * F: ?
1020 	 *
1021 	 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1022 	 * 0 - Digital Out
1023 	 * 1 - Line in
1024 	 */
1025 	/* Mic input not tested.
1026 	 * Analog CD input not tested
1027 	 * Digital Out not tested.
1028 	 * Line in working.
1029 	 * Audio output 5.1 working. Side outputs not working.
1030 	 */
1031 	/* DSP: CA10300-IAT LF
1032 	 * DAC: Cirrus Logic CS4382-KQZ
1033 	 * ADC: Philips 1361T
1034 	 * AC97: Sigmatel STAC9750
1035 	 * CA0151: None
1036 	 */
1037 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1038 	 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1039 	 .id = "Audigy2",
1040 	 .emu10k2_chip = 1,
1041 	 .ca0108_chip = 1,
1042 	 .spk71 = 1,
1043 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1044 	 .ac97_chip = 1} ,
1045 	/* Audigy 2 Value AC3 out does not work yet.
1046 	 * Need to find out how to turn off interpolators.
1047 	 */
1048 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1049 	/* DSP: CA0108-IAT
1050 	 * DAC: CS4382-KQ
1051 	 * ADC: Philips 1361T
1052 	 * AC97: STAC9750
1053 	 * CA0151: None
1054 	 */
1055 	/*
1056 	 * A_IOCFG Input (GPIO)
1057 	 * 0x400  = Front analog jack plugged in. (Green socket)
1058 	 * 0x1000 = Rear analog jack plugged in. (Black socket)
1059 	 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket)
1060 	 * A_IOCFG Output (GPIO)
1061 	 * 0x60 = Sound out of front Left.
1062 	 * Win sets it to 0xXX61
1063 	 */
1064 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1065 	 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1066 	 .id = "Audigy2",
1067 	 .emu10k2_chip = 1,
1068 	 .ca0108_chip = 1,
1069 	 .spk71 = 1,
1070 	 .ac97_chip = 1} ,
1071 	/* Audigy 2 ZS Notebook Cardbus card.*/
1072 	/* Tested by James@superbug.co.uk 6th November 2006 */
1073 	/* Audio output 7.1/Headphones working.
1074 	 * Digital output working. (AC3 not checked, only PCM)
1075 	 * Audio Mic/Line inputs working.
1076 	 * Digital input not tested.
1077 	 */
1078 	/* DSP: Tina2
1079 	 * DAC: Wolfson WM8768/WM8568
1080 	 * ADC: Wolfson WM8775
1081 	 * AC97: None
1082 	 * CA0151: None
1083 	 */
1084 	/* Tested by James@superbug.co.uk 4th April 2006 */
1085 	/* A_IOCFG bits
1086 	 * Output
1087 	 * 0: Not Used
1088 	 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1089 	 * 2: Analog input 0 = line in, 1 = mic in
1090 	 * 3: Not Used
1091 	 * 4: Digital output 0 = off, 1 = on.
1092 	 * 5: Not Used
1093 	 * 6: Not Used
1094 	 * 7: Not Used
1095 	 * Input
1096 	 *      All bits 1 (0x3fxx) means nothing plugged in.
1097 	 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1098 	 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1099 	 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1100 	 * E-F: Always 0
1101 	 *
1102 	 */
1103 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1104 	 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1105 	 .id = "Audigy2",
1106 	 .emu10k2_chip = 1,
1107 	 .ca0108_chip = 1,
1108 	 .ca_cardbus_chip = 1,
1109 	 .spi_dac = 1,
1110 	 .i2c_adc = 1,
1111 	 .spk71 = 1} ,
1112 	/* This is MAEM8950 "Mana" */
1113 	/* Attach MicroDock[M] to make it an E-MU 1616[m]. */
1114 	/* Does NOT support sync daughter card (obviously). */
1115 	/* Tested by James@superbug.co.uk 4th Nov 2007. */
1116 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1117 	 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]",
1118 	 .id = "EMU1010",
1119 	 .emu10k2_chip = 1,
1120 	 .ca0108_chip = 1,
1121 	 .ca_cardbus_chip = 1,
1122 	 .spk71 = 1 ,
1123 	 .emu_model = EMU_MODEL_EMU1616},
1124 	/* Tested by James@superbug.co.uk 4th Nov 2007. */
1125 	/* This is MAEM8960 "Hana3", 0202 is MAEM8980 */
1126 	/* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1127 	 * MicroDock[M] to make it an E-MU 1616[m]. */
1128 	/* Does NOT support sync daughter card. */
1129 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1130 	 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]",
1131 	 .id = "EMU1010",
1132 	 .emu10k2_chip = 1,
1133 	 .ca0108_chip = 1,
1134 	 .spk71 = 1,
1135 	 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1136 	/* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1137 	/* This is MAEM8986, 0202 is MAEM8980 */
1138 	/* Attach 0202 daughter card to make it an E-MU 1212m, OR a
1139 	 * MicroDockM to make it an E-MU 1616m. The non-m
1140 	 * version was never sold with this card, but should
1141 	 * still work. */
1142 	/* Does NOT support sync daughter card. */
1143 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1144 	 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]",
1145 	 .id = "EMU1010",
1146 	 .emu10k2_chip = 1,
1147 	 .ca0108_chip = 1,
1148 	 .spk71 = 1,
1149 	 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1150 	/* Tested by James@superbug.co.uk 8th July 2005. */
1151 	/* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */
1152 	/* Attach 0202 daughter card to make it an E-MU 1212m, OR an
1153 	 * AudioDock[M] to make it an E-MU 1820[m]. */
1154 	/* Supports sync daughter card. */
1155 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1156 	 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]",
1157 	 .id = "EMU1010",
1158 	 .emu10k2_chip = 1,
1159 	 .ca0102_chip = 1,
1160 	 .spk71 = 1,
1161 	 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1162 	/* This is MAEM8852 "HanaLiteLite" */
1163 	/* Supports sync daughter card. */
1164 	/* Tested by oswald.buddenhagen@gmx.de Mar 2023. */
1165 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1166 	 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]",
1167 	 .id = "EMU0404",
1168 	 .emu10k2_chip = 1,
1169 	 .ca0108_chip = 1,
1170 	 .spk20 = 1,
1171 	 .no_adat = 1,
1172 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1173 	/* This is MAEM8850 "HanaLite" */
1174 	/* Supports sync daughter card. */
1175 	/* Tested by James@superbug.co.uk 20-3-2007. */
1176 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1177 	 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]",
1178 	 .id = "EMU0404",
1179 	 .emu10k2_chip = 1,
1180 	 .ca0102_chip = 1,
1181 	 .spk20 = 1,
1182 	 .no_adat = 1,
1183 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1184 	/* EMU0404 PCIe */
1185 	/* Does NOT support sync daughter card. */
1186 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1187 	 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]",
1188 	 .id = "EMU0404",
1189 	 .emu10k2_chip = 1,
1190 	 .ca0108_chip = 1,
1191 	 .spk20 = 1,
1192 	 .no_adat = 1,
1193 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1194 	{.vendor = 0x1102, .device = 0x0008,
1195 	 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1196 	 .id = "Audigy2",
1197 	 .emu10k2_chip = 1,
1198 	 .ca0108_chip = 1,
1199 	 .ac97_chip = 1} ,
1200 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1201 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1202 	 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1203 	 .id = "Audigy2",
1204 	 .emu10k2_chip = 1,
1205 	 .ca0102_chip = 1,
1206 	 .ca0151_chip = 1,
1207 	 .spk71 = 1,
1208 	 .spdif_bug = 1,
1209 	 .ac97_chip = 1} ,
1210 	/* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1211 	/* The 0x20061102 does have SB0350 written on it
1212 	 * Just like 0x20021102
1213 	 */
1214 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1215 	 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1216 	 .id = "Audigy2",
1217 	 .emu10k2_chip = 1,
1218 	 .ca0102_chip = 1,
1219 	 .ca0151_chip = 1,
1220 	 .spk71 = 1,
1221 	 .spdif_bug = 1,
1222 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1223 	 .ac97_chip = 1} ,
1224 	/* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1225 	   Creative's Windows driver */
1226 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1227 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1228 	 .id = "Audigy2",
1229 	 .emu10k2_chip = 1,
1230 	 .ca0102_chip = 1,
1231 	 .ca0151_chip = 1,
1232 	 .spk71 = 1,
1233 	 .spdif_bug = 1,
1234 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1235 	 .ac97_chip = 1} ,
1236 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1237 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1238 	 .id = "Audigy2",
1239 	 .emu10k2_chip = 1,
1240 	 .ca0102_chip = 1,
1241 	 .ca0151_chip = 1,
1242 	 .spk71 = 1,
1243 	 .spdif_bug = 1,
1244 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1245 	 .ac97_chip = 1} ,
1246 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1247 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1248 	 .id = "Audigy2",
1249 	 .emu10k2_chip = 1,
1250 	 .ca0102_chip = 1,
1251 	 .ca0151_chip = 1,
1252 	 .spk71 = 1,
1253 	 .spdif_bug = 1,
1254 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1255 	 .ac97_chip = 1} ,
1256 	/* Audigy 2 */
1257 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1258 	/* DSP: CA0102-IAT
1259 	 * DAC: CS4382-KQ
1260 	 * ADC: Philips 1361T
1261 	 * AC97: STAC9721
1262 	 * CA0151: Yes
1263 	 */
1264 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1265 	 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1266 	 .id = "Audigy2",
1267 	 .emu10k2_chip = 1,
1268 	 .ca0102_chip = 1,
1269 	 .ca0151_chip = 1,
1270 	 .spk71 = 1,
1271 	 .spdif_bug = 1,
1272 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1273 	 .ac97_chip = 1} ,
1274 	/* Audigy 2 Platinum EX */
1275 	/* Win driver sets A_IOCFG output to 0x1c00 */
1276 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1277 	 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]",
1278 	 .id = "Audigy2",
1279 	 .emu10k2_chip = 1,
1280 	 .ca0102_chip = 1,
1281 	 .ca0151_chip = 1,
1282 	 .spk71 = 1,
1283 	 .spdif_bug = 1} ,
1284 	/* Dell OEM/Creative Labs Audigy 2 ZS */
1285 	/* See ALSA bug#1365 */
1286 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1287 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1288 	 .id = "Audigy2",
1289 	 .emu10k2_chip = 1,
1290 	 .ca0102_chip = 1,
1291 	 .ca0151_chip = 1,
1292 	 .spk71 = 1,
1293 	 .spdif_bug = 1,
1294 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1295 	 .ac97_chip = 1} ,
1296 	/* Audigy 2 Platinum */
1297 	/* Win driver sets A_IOCFG output to 0xa00 */
1298 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1299 	 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1300 	 .id = "Audigy2",
1301 	 .emu10k2_chip = 1,
1302 	 .ca0102_chip = 1,
1303 	 .ca0151_chip = 1,
1304 	 .spk71 = 1,
1305 	 .spdif_bug = 1,
1306 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1307 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1308 	 .ac97_chip = 1} ,
1309 	{.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1310 	 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1311 	 .id = "Audigy2",
1312 	 .emu10k2_chip = 1,
1313 	 .ca0102_chip = 1,
1314 	 .ca0151_chip = 1,
1315 	 .spdif_bug = 1,
1316 	 .ac97_chip = 1} ,
1317 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1318 	 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1319 	 .id = "Audigy",
1320 	 .emu10k2_chip = 1,
1321 	 .ca0102_chip = 1,
1322 	 .ac97_chip = 1} ,
1323 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1324 	 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1325 	 .id = "Audigy",
1326 	 .emu10k2_chip = 1,
1327 	 .ca0102_chip = 1,
1328 	 .spdif_bug = 1,
1329 	 .ac97_chip = 1} ,
1330 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1331 	 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1332 	 .id = "Audigy",
1333 	 .emu10k2_chip = 1,
1334 	 .ca0102_chip = 1,
1335 	 .ac97_chip = 1} ,
1336 	{.vendor = 0x1102, .device = 0x0004,
1337 	 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1338 	 .id = "Audigy",
1339 	 .emu10k2_chip = 1,
1340 	 .ca0102_chip = 1,
1341 	 .ac97_chip = 1} ,
1342 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1343 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1344 	 .id = "Live",
1345 	 .emu10k1_chip = 1,
1346 	 .ac97_chip = 1,
1347 	 .sblive51 = 1} ,
1348 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1349 	 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1350 	 .id = "Live",
1351 	 .emu10k1_chip = 1,
1352 	 .ac97_chip = 1,
1353 	 .sblive51 = 1} ,
1354 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1355 	 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1356 	 .id = "Live",
1357 	 .emu10k1_chip = 1,
1358 	 .ac97_chip = 1,
1359 	 .sblive51 = 1} ,
1360 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1361 	 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1362 	 .id = "Live",
1363 	 .emu10k1_chip = 1,
1364 	 .ac97_chip = 1,
1365 	 .sblive51 = 1} ,
1366 	/* Tested by ALSA bug#1680 26th December 2005 */
1367 	/* note: It really has SB0220 written on the card, */
1368 	/* but it's SB0228 according to kx.inf */
1369 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1370 	 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1371 	 .id = "Live",
1372 	 .emu10k1_chip = 1,
1373 	 .ac97_chip = 1,
1374 	 .sblive51 = 1} ,
1375 	/* Tested by Thomas Zehetbauer 27th Aug 2005 */
1376 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1377 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1378 	 .id = "Live",
1379 	 .emu10k1_chip = 1,
1380 	 .ac97_chip = 1,
1381 	 .sblive51 = 1} ,
1382 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1383 	 .driver = "EMU10K1", .name = "SB Live! 5.1",
1384 	 .id = "Live",
1385 	 .emu10k1_chip = 1,
1386 	 .ac97_chip = 1,
1387 	 .sblive51 = 1} ,
1388 	/* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1389 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1390 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1391 	 .id = "Live",
1392 	 .emu10k1_chip = 1,
1393 	 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1394 			  * share the same IDs!
1395 			  */
1396 	 .sblive51 = 1} ,
1397 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1398 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1399 	 .id = "Live",
1400 	 .emu10k1_chip = 1,
1401 	 .ac97_chip = 1,
1402 	 .sblive51 = 1} ,
1403 	/* SB Live! Platinum */
1404 	/* Win driver sets A_IOCFG output to 0 */
1405 	/* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */
1406 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1407 	 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1408 	 .id = "Live",
1409 	 .emu10k1_chip = 1,
1410 	 .ac97_chip = 1} ,
1411 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1412 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1413 	 .id = "Live",
1414 	 .emu10k1_chip = 1,
1415 	 .ac97_chip = 1,
1416 	 .sblive51 = 1} ,
1417 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1418 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1419 	 .id = "Live",
1420 	 .emu10k1_chip = 1,
1421 	 .ac97_chip = 1,
1422 	 .sblive51 = 1} ,
1423 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1424 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1425 	 .id = "Live",
1426 	 .emu10k1_chip = 1,
1427 	 .ac97_chip = 1,
1428 	 .sblive51 = 1} ,
1429 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1430 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1431 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1432 	 .id = "Live",
1433 	 .emu10k1_chip = 1,
1434 	 .ac97_chip = 1,
1435 	 .sblive51 = 1} ,
1436 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1437 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1438 	 .id = "Live",
1439 	 .emu10k1_chip = 1,
1440 	 .ac97_chip = 1,
1441 	 .sblive51 = 1} ,
1442 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1443 	 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1444 	 .id = "Live",
1445 	 .emu10k1_chip = 1,
1446 	 .ac97_chip = 1,
1447 	 .sblive51 = 1} ,
1448 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1449 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1450 	 .id = "Live",
1451 	 .emu10k1_chip = 1,
1452 	 .ac97_chip = 1,
1453 	 .sblive51 = 1} ,
1454 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1455 	 .driver = "EMU10K1", .name = "E-MU APS [PC545]",
1456 	 .id = "APS",
1457 	 .emu10k1_chip = 1,
1458 	 .ecard = 1} ,
1459 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1460 	 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1461 	 .id = "Live",
1462 	 .emu10k1_chip = 1,
1463 	 .ac97_chip = 1,
1464 	 .sblive51 = 1} ,
1465 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1466 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1467 	 .id = "Live",
1468 	 .emu10k1_chip = 1,
1469 	 .ac97_chip = 1,
1470 	 .sblive51 = 1} ,
1471 	{.vendor = 0x1102, .device = 0x0002,
1472 	 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1473 	 .id = "Live",
1474 	 .emu10k1_chip = 1,
1475 	 .ac97_chip = 1,
1476 	 .sblive51 = 1} ,
1477 	{ } /* terminator */
1478 };
1479 
1480 /*
1481  * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too)
1482  * has a problem that from time to time it likes to do few DMA reads a bit
1483  * beyond its normal allocation and gets very confused if these reads get
1484  * blocked by a IOMMU.
1485  *
1486  * This behaviour has been observed for the first (reserved) page
1487  * (for which it happens multiple times at every playback), often for various
1488  * synth pages and sometimes for PCM playback buffers and the page table
1489  * memory itself.
1490  *
1491  * As a workaround let's widen these DMA allocations by an extra page if we
1492  * detect that the device is behind a non-passthrough IOMMU.
1493  */
1494 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu)
1495 {
1496 	struct iommu_domain *domain;
1497 
1498 	emu->iommu_workaround = false;
1499 
1500 	domain = iommu_get_domain_for_dev(emu->card->dev);
1501 	if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY)
1502 		return;
1503 
1504 	dev_notice(emu->card->dev,
1505 		   "non-passthrough IOMMU detected, widening DMA allocations");
1506 	emu->iommu_workaround = true;
1507 }
1508 
1509 int snd_emu10k1_create(struct snd_card *card,
1510 		       struct pci_dev *pci,
1511 		       unsigned short extin_mask,
1512 		       unsigned short extout_mask,
1513 		       long max_cache_bytes,
1514 		       int enable_ir,
1515 		       uint subsystem)
1516 {
1517 	struct snd_emu10k1 *emu = card->private_data;
1518 	int idx, err;
1519 	int is_audigy;
1520 	size_t page_table_size;
1521 	__le32 *pgtbl;
1522 	unsigned int silent_page;
1523 	const struct snd_emu_chip_details *c;
1524 
1525 	/* enable PCI device */
1526 	err = pcim_enable_device(pci);
1527 	if (err < 0)
1528 		return err;
1529 
1530 	card->private_free = snd_emu10k1_free;
1531 	emu->card = card;
1532 	spin_lock_init(&emu->reg_lock);
1533 	spin_lock_init(&emu->emu_lock);
1534 	spin_lock_init(&emu->spi_lock);
1535 	spin_lock_init(&emu->i2c_lock);
1536 	spin_lock_init(&emu->voice_lock);
1537 	spin_lock_init(&emu->synth_lock);
1538 	spin_lock_init(&emu->memblk_lock);
1539 	mutex_init(&emu->fx8010.lock);
1540 	INIT_LIST_HEAD(&emu->mapped_link_head);
1541 	INIT_LIST_HEAD(&emu->mapped_order_link_head);
1542 	emu->pci = pci;
1543 	emu->irq = -1;
1544 	emu->synth = NULL;
1545 	emu->get_synth_voice = NULL;
1546 	INIT_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work);
1547 	INIT_WORK(&emu->emu1010.clock_work, emu1010_clock_work);
1548 	/* read revision & serial */
1549 	emu->revision = pci->revision;
1550 	pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1551 	pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1552 	dev_dbg(card->dev,
1553 		"vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1554 		pci->vendor, pci->device, emu->serial, emu->model);
1555 
1556 	for (c = emu_chip_details; c->vendor; c++) {
1557 		if (c->vendor == pci->vendor && c->device == pci->device) {
1558 			if (subsystem) {
1559 				if (c->subsystem && (c->subsystem == subsystem))
1560 					break;
1561 				else
1562 					continue;
1563 			} else {
1564 				if (c->subsystem && (c->subsystem != emu->serial))
1565 					continue;
1566 				if (c->revision && c->revision != emu->revision)
1567 					continue;
1568 			}
1569 			break;
1570 		}
1571 	}
1572 	if (c->vendor == 0) {
1573 		dev_err(card->dev, "emu10k1: Card not recognised\n");
1574 		return -ENOENT;
1575 	}
1576 	emu->card_capabilities = c;
1577 	if (c->subsystem && !subsystem)
1578 		dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1579 	else if (subsystem)
1580 		dev_dbg(card->dev, "Sound card name = %s, "
1581 			"vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1582 			"Forced to subsystem = 0x%x\n",	c->name,
1583 			pci->vendor, pci->device, emu->serial, c->subsystem);
1584 	else
1585 		dev_dbg(card->dev, "Sound card name = %s, "
1586 			"vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1587 			c->name, pci->vendor, pci->device,
1588 			emu->serial);
1589 
1590 	if (!*card->id && c->id)
1591 		strscpy(card->id, c->id, sizeof(card->id));
1592 
1593 	is_audigy = emu->audigy = c->emu10k2_chip;
1594 
1595 	snd_emu10k1_detect_iommu(emu);
1596 
1597 	/* set addressing mode */
1598 	emu->address_mode = is_audigy ? 0 : 1;
1599 	/* set the DMA transfer mask */
1600 	emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK;
1601 	if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) {
1602 		dev_err(card->dev,
1603 			"architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1604 			emu->dma_mask);
1605 		return -ENXIO;
1606 	}
1607 	if (is_audigy)
1608 		emu->gpr_base = A_FXGPREGBASE;
1609 	else
1610 		emu->gpr_base = FXGPREGBASE;
1611 
1612 	err = pci_request_regions(pci, "EMU10K1");
1613 	if (err < 0)
1614 		return err;
1615 	emu->port = pci_resource_start(pci, 0);
1616 
1617 	emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1618 
1619 	page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 :
1620 					 MAXPAGES0);
1621 	if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size,
1622 						&emu->ptb_pages) < 0)
1623 		return -ENOMEM;
1624 	dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n",
1625 		(unsigned long)emu->ptb_pages.addr,
1626 		(unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes));
1627 
1628 	emu->page_ptr_table = vmalloc(array_size(sizeof(void *),
1629 						 emu->max_cache_pages));
1630 	emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long),
1631 						  emu->max_cache_pages));
1632 	if (!emu->page_ptr_table || !emu->page_addr_table)
1633 		return -ENOMEM;
1634 
1635 	if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE,
1636 						&emu->silent_page) < 0)
1637 		return -ENOMEM;
1638 	dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n",
1639 		(unsigned long)emu->silent_page.addr,
1640 		(unsigned long)(emu->silent_page.addr +
1641 				emu->silent_page.bytes));
1642 
1643 	emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1644 	if (!emu->memhdr)
1645 		return -ENOMEM;
1646 	emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1647 		sizeof(struct snd_util_memblk);
1648 
1649 	pci_set_master(pci);
1650 
1651 	// The masks are not used for Audigy.
1652 	// FIXME: these should come from the card_capabilites table.
1653 	if (extin_mask == 0)
1654 		extin_mask = 0x3fcf;  // EXTIN_*
1655 	if (extout_mask == 0)
1656 		extout_mask = 0x7fff;  // EXTOUT_*
1657 	emu->fx8010.extin_mask = extin_mask;
1658 	emu->fx8010.extout_mask = extout_mask;
1659 	emu->enable_ir = enable_ir;
1660 
1661 	if (emu->card_capabilities->ca_cardbus_chip) {
1662 		err = snd_emu10k1_cardbus_init(emu);
1663 		if (err < 0)
1664 			return err;
1665 	}
1666 	if (emu->card_capabilities->ecard) {
1667 		err = snd_emu10k1_ecard_init(emu);
1668 		if (err < 0)
1669 			return err;
1670 	} else if (emu->card_capabilities->emu_model) {
1671 		err = snd_emu10k1_emu1010_init(emu);
1672 		if (err < 0)
1673 			return err;
1674 	} else {
1675 		/* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1676 			does not support this, it shouldn't do any harm */
1677 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1678 					AC97SLOT_CNTR|AC97SLOT_LFE);
1679 	}
1680 
1681 	/* initialize TRAM setup */
1682 	emu->fx8010.itram_size = (16 * 1024)/2;
1683 	emu->fx8010.etram_pages.area = NULL;
1684 	emu->fx8010.etram_pages.bytes = 0;
1685 
1686 	/* irq handler must be registered after I/O ports are activated */
1687 	if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt,
1688 			     IRQF_SHARED, KBUILD_MODNAME, emu))
1689 		return -EBUSY;
1690 	emu->irq = pci->irq;
1691 	card->sync_irq = emu->irq;
1692 
1693 	/*
1694 	 *  Init to 0x02109204 :
1695 	 *  Clock accuracy    = 0     (1000ppm)
1696 	 *  Sample Rate       = 2     (48kHz)
1697 	 *  Audio Channel     = 1     (Left of 2)
1698 	 *  Source Number     = 0     (Unspecified)
1699 	 *  Generation Status = 1     (Original for Cat Code 12)
1700 	 *  Cat Code          = 12    (Digital Signal Mixer)
1701 	 *  Mode              = 0     (Mode 0)
1702 	 *  Emphasis          = 0     (None)
1703 	 *  CP                = 1     (Copyright unasserted)
1704 	 *  AN                = 0     (Audio data)
1705 	 *  P                 = 0     (Consumer)
1706 	 */
1707 	emu->spdif_bits[0] = emu->spdif_bits[1] =
1708 		emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1709 		SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1710 		SPCS_GENERATIONSTATUS | 0x00001200 |
1711 		0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1712 
1713 	/* Clear silent pages and set up pointers */
1714 	memset(emu->silent_page.area, 0, emu->silent_page.bytes);
1715 	silent_page = emu->silent_page.addr << emu->address_mode;
1716 	pgtbl = (__le32 *)emu->ptb_pages.area;
1717 	for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++)
1718 		pgtbl[idx] = cpu_to_le32(silent_page | idx);
1719 
1720 	/* set up voice indices */
1721 	for (idx = 0; idx < NUM_G; idx++)
1722 		emu->voices[idx].number = idx;
1723 
1724 	err = snd_emu10k1_init(emu, enable_ir);
1725 	if (err < 0)
1726 		return err;
1727 #ifdef CONFIG_PM_SLEEP
1728 	err = alloc_pm_buffer(emu);
1729 	if (err < 0)
1730 		return err;
1731 #endif
1732 
1733 	/*  Initialize the effect engine */
1734 	err = snd_emu10k1_init_efx(emu);
1735 	if (err < 0)
1736 		return err;
1737 	snd_emu10k1_audio_enable(emu);
1738 
1739 #ifdef CONFIG_SND_PROC_FS
1740 	snd_emu10k1_proc_init(emu);
1741 #endif
1742 	return 0;
1743 }
1744 
1745 #ifdef CONFIG_PM_SLEEP
1746 static const unsigned char saved_regs[] = {
1747 	CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1748 	FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1749 	ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1750 	TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1751 	MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1752 	SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1753 	0xff /* end */
1754 };
1755 static const unsigned char saved_regs_audigy[] = {
1756 	A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC,
1757 	A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1758 	0xff /* end */
1759 };
1760 
1761 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
1762 {
1763 	int size;
1764 
1765 	size = ARRAY_SIZE(saved_regs);
1766 	if (emu->audigy)
1767 		size += ARRAY_SIZE(saved_regs_audigy);
1768 	emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size));
1769 	if (!emu->saved_ptr)
1770 		return -ENOMEM;
1771 	if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1772 		return -ENOMEM;
1773 	if (emu->card_capabilities->ca0151_chip &&
1774 	    snd_p16v_alloc_pm_buffer(emu) < 0)
1775 		return -ENOMEM;
1776 	return 0;
1777 }
1778 
1779 static void free_pm_buffer(struct snd_emu10k1 *emu)
1780 {
1781 	vfree(emu->saved_ptr);
1782 	snd_emu10k1_efx_free_pm_buffer(emu);
1783 	if (emu->card_capabilities->ca0151_chip)
1784 		snd_p16v_free_pm_buffer(emu);
1785 }
1786 
1787 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1788 {
1789 	int i;
1790 	const unsigned char *reg;
1791 	unsigned int *val;
1792 
1793 	val = emu->saved_ptr;
1794 	for (reg = saved_regs; *reg != 0xff; reg++)
1795 		for (i = 0; i < NUM_G; i++, val++)
1796 			*val = snd_emu10k1_ptr_read(emu, *reg, i);
1797 	if (emu->audigy) {
1798 		for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1799 			for (i = 0; i < NUM_G; i++, val++)
1800 				*val = snd_emu10k1_ptr_read(emu, *reg, i);
1801 	}
1802 	if (emu->audigy)
1803 		emu->saved_a_iocfg = inw(emu->port + A_IOCFG);
1804 	emu->saved_hcfg = inl(emu->port + HCFG);
1805 }
1806 
1807 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
1808 {
1809 	if (emu->card_capabilities->ca_cardbus_chip)
1810 		snd_emu10k1_cardbus_init(emu);
1811 	if (emu->card_capabilities->ecard)
1812 		snd_emu10k1_ecard_init(emu);
1813 	else if (emu->card_capabilities->emu_model)
1814 		snd_emu10k1_emu1010_init(emu);
1815 	else
1816 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1817 	snd_emu10k1_init(emu, emu->enable_ir);
1818 }
1819 
1820 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
1821 {
1822 	int i;
1823 	const unsigned char *reg;
1824 	unsigned int *val;
1825 
1826 	snd_emu10k1_audio_enable(emu);
1827 
1828 	/* resore for spdif */
1829 	if (emu->audigy)
1830 		outw(emu->saved_a_iocfg, emu->port + A_IOCFG);
1831 	outl(emu->saved_hcfg, emu->port + HCFG);
1832 
1833 	val = emu->saved_ptr;
1834 	for (reg = saved_regs; *reg != 0xff; reg++)
1835 		for (i = 0; i < NUM_G; i++, val++)
1836 			snd_emu10k1_ptr_write(emu, *reg, i, *val);
1837 	if (emu->audigy) {
1838 		for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1839 			for (i = 0; i < NUM_G; i++, val++)
1840 				snd_emu10k1_ptr_write(emu, *reg, i, *val);
1841 	}
1842 }
1843 #endif
1844