1 /* 2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 3 * Creative Labs, Inc. 4 * Routines for control of EMU10K1 chips 5 * 6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> 7 * Added support for Audigy 2 Value. 8 * Added EMU 1010 support. 9 * General bug fixes and enhancements. 10 * 11 * 12 * BUGS: 13 * -- 14 * 15 * TODO: 16 * -- 17 * 18 * This program is free software; you can redistribute it and/or modify 19 * it under the terms of the GNU General Public License as published by 20 * the Free Software Foundation; either version 2 of the License, or 21 * (at your option) any later version. 22 * 23 * This program is distributed in the hope that it will be useful, 24 * but WITHOUT ANY WARRANTY; without even the implied warranty of 25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 26 * GNU General Public License for more details. 27 * 28 * You should have received a copy of the GNU General Public License 29 * along with this program; if not, write to the Free Software 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 31 * 32 */ 33 34 #include <sound/driver.h> 35 #include <linux/delay.h> 36 #include <linux/init.h> 37 #include <linux/interrupt.h> 38 #include <linux/pci.h> 39 #include <linux/slab.h> 40 #include <linux/vmalloc.h> 41 #include <linux/mutex.h> 42 43 44 #include <sound/core.h> 45 #include <sound/emu10k1.h> 46 #include <linux/firmware.h> 47 #include "p16v.h" 48 #include "tina2.h" 49 #include "p17v.h" 50 51 52 #define HANA_FILENAME "emu/hana.fw" 53 #define DOCK_FILENAME "emu/audio_dock.fw" 54 #define EMU1010B_FILENAME "emu/emu1010b.fw" 55 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw" 56 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" 57 58 MODULE_FIRMWARE(HANA_FILENAME); 59 MODULE_FIRMWARE(DOCK_FILENAME); 60 MODULE_FIRMWARE(EMU1010B_FILENAME); 61 MODULE_FIRMWARE(MICRO_DOCK_FILENAME); 62 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); 63 64 65 /************************************************************************* 66 * EMU10K1 init / done 67 *************************************************************************/ 68 69 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch) 70 { 71 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); 72 snd_emu10k1_ptr_write(emu, IP, ch, 0); 73 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff); 74 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff); 75 snd_emu10k1_ptr_write(emu, PTRX, ch, 0); 76 snd_emu10k1_ptr_write(emu, CPF, ch, 0); 77 snd_emu10k1_ptr_write(emu, CCR, ch, 0); 78 79 snd_emu10k1_ptr_write(emu, PSST, ch, 0); 80 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10); 81 snd_emu10k1_ptr_write(emu, CCCA, ch, 0); 82 snd_emu10k1_ptr_write(emu, Z1, ch, 0); 83 snd_emu10k1_ptr_write(emu, Z2, ch, 0); 84 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000); 85 86 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0); 87 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0); 88 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff); 89 snd_emu10k1_ptr_write(emu, PEFE, ch, 0); 90 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0); 91 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */ 92 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */ 93 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0); 94 95 /*** these are last so OFF prevents writing ***/ 96 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0); 97 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0); 98 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0); 99 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0); 100 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0); 101 102 /* Audigy extra stuffs */ 103 if (emu->audigy) { 104 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */ 105 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */ 106 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */ 107 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */ 108 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100); 109 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f); 110 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0); 111 } 112 } 113 114 static unsigned int spi_dac_init[] = { 115 0x00ff, 116 0x02ff, 117 0x0400, 118 0x0520, 119 0x0600, 120 0x08ff, 121 0x0aff, 122 0x0cff, 123 0x0eff, 124 0x10ff, 125 0x1200, 126 0x1400, 127 0x1480, 128 0x1800, 129 0x1aff, 130 0x1cff, 131 0x1e00, 132 0x0530, 133 0x0602, 134 0x0622, 135 0x1400, 136 }; 137 138 static unsigned int i2c_adc_init[][2] = { 139 { 0x17, 0x00 }, /* Reset */ 140 { 0x07, 0x00 }, /* Timeout */ 141 { 0x0b, 0x22 }, /* Interface control */ 142 { 0x0c, 0x22 }, /* Master mode control */ 143 { 0x0d, 0x08 }, /* Powerdown control */ 144 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ 145 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ 146 { 0x10, 0x7b }, /* ALC Control 1 */ 147 { 0x11, 0x00 }, /* ALC Control 2 */ 148 { 0x12, 0x32 }, /* ALC Control 3 */ 149 { 0x13, 0x00 }, /* Noise gate control */ 150 { 0x14, 0xa6 }, /* Limiter control */ 151 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */ 152 }; 153 154 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume) 155 { 156 unsigned int silent_page; 157 int ch; 158 u32 tmp; 159 160 /* disable audio and lock cache */ 161 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, 162 emu->port + HCFG); 163 164 /* reset recording buffers */ 165 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE); 166 snd_emu10k1_ptr_write(emu, MICBA, 0, 0); 167 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE); 168 snd_emu10k1_ptr_write(emu, FXBA, 0, 0); 169 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); 170 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); 171 172 /* disable channel interrupt */ 173 outl(0, emu->port + INTE); 174 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); 175 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); 176 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); 177 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); 178 179 if (emu->audigy){ 180 /* set SPDIF bypass mode */ 181 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); 182 /* enable rear left + rear right AC97 slots */ 183 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | 184 AC97SLOT_REAR_LEFT); 185 } 186 187 /* init envelope engine */ 188 for (ch = 0; ch < NUM_G; ch++) 189 snd_emu10k1_voice_init(emu, ch); 190 191 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]); 192 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]); 193 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]); 194 195 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 196 /* Hacks for Alice3 to work independent of haP16V driver */ 197 //Setup SRCMulti_I2S SamplingRate 198 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0); 199 tmp &= 0xfffff1ff; 200 tmp |= (0x2<<9); 201 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp); 202 203 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 204 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); 205 /* Setup SRCMulti Input Audio Enable */ 206 /* Use 0xFFFFFFFF to enable P16V sounds. */ 207 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); 208 209 /* Enabled Phased (8-channel) P16V playback */ 210 outl(0x0201, emu->port + HCFG2); 211 /* Set playback routing. */ 212 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); 213 } 214 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ 215 /* Hacks for Alice3 to work independent of haP16V driver */ 216 snd_printk(KERN_INFO "Audigy2 value: Special config.\n"); 217 //Setup SRCMulti_I2S SamplingRate 218 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0); 219 tmp &= 0xfffff1ff; 220 tmp |= (0x2<<9); 221 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp); 222 223 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 224 outl(0x600000, emu->port + 0x20); 225 outl(0x14, emu->port + 0x24); 226 227 /* Setup SRCMulti Input Audio Enable */ 228 outl(0x7b0000, emu->port + 0x20); 229 outl(0xFF000000, emu->port + 0x24); 230 231 /* Setup SPDIF Out Audio Enable */ 232 /* The Audigy 2 Value has a separate SPDIF out, 233 * so no need for a mixer switch 234 */ 235 outl(0x7a0000, emu->port + 0x20); 236 outl(0xFF000000, emu->port + 0x24); 237 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ 238 outl(tmp, emu->port + A_IOCFG); 239 } 240 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ 241 int size, n; 242 243 size = ARRAY_SIZE(spi_dac_init); 244 for (n = 0; n < size; n++) 245 snd_emu10k1_spi_write(emu, spi_dac_init[n]); 246 247 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); 248 /* Enable GPIOs 249 * GPIO0: Unknown 250 * GPIO1: Speakers-enabled. 251 * GPIO2: Unknown 252 * GPIO3: Unknown 253 * GPIO4: IEC958 Output on. 254 * GPIO5: Unknown 255 * GPIO6: Unknown 256 * GPIO7: Unknown 257 */ 258 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ 259 260 } 261 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ 262 int size, n; 263 264 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); 265 tmp = inl(emu->port + A_IOCFG); 266 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ 267 tmp = inl(emu->port + A_IOCFG); 268 size = ARRAY_SIZE(i2c_adc_init); 269 for (n = 0; n < size; n++) 270 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); 271 for (n=0; n < 4; n++) { 272 emu->i2c_capture_volume[n][0]= 0xcf; 273 emu->i2c_capture_volume[n][1]= 0xcf; 274 } 275 276 } 277 278 279 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); 280 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ 281 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */ 282 283 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK; 284 for (ch = 0; ch < NUM_G; ch++) { 285 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); 286 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); 287 } 288 289 if (emu->card_capabilities->emu1010) { 290 outl(HCFG_AUTOMUTE_ASYNC | 291 HCFG_EMU32_SLAVE | 292 HCFG_AUDIOENABLE, emu->port + HCFG); 293 /* 294 * Hokay, setup HCFG 295 * Mute Disable Audio = 0 296 * Lock Tank Memory = 1 297 * Lock Sound Memory = 0 298 * Auto Mute = 1 299 */ 300 } else if (emu->audigy) { 301 if (emu->revision == 4) /* audigy2 */ 302 outl(HCFG_AUDIOENABLE | 303 HCFG_AC3ENABLE_CDSPDIF | 304 HCFG_AC3ENABLE_GPSPDIF | 305 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 306 else 307 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 308 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, 309 * e.g. card_capabilities->joystick */ 310 } else if (emu->model == 0x20 || 311 emu->model == 0xc400 || 312 (emu->model == 0x21 && emu->revision < 6)) 313 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); 314 else 315 // With on-chip joystick 316 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 317 318 if (enable_ir) { /* enable IR for SB Live */ 319 if (emu->card_capabilities->emu1010) { 320 ; /* Disable all access to A_IOCFG for the emu1010 */ 321 } else if (emu->card_capabilities->i2c_adc) { 322 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 323 } else if (emu->audigy) { 324 unsigned int reg = inl(emu->port + A_IOCFG); 325 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 326 udelay(500); 327 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 328 udelay(100); 329 outl(reg, emu->port + A_IOCFG); 330 } else { 331 unsigned int reg = inl(emu->port + HCFG); 332 outl(reg | HCFG_GPOUT2, emu->port + HCFG); 333 udelay(500); 334 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); 335 udelay(100); 336 outl(reg, emu->port + HCFG); 337 } 338 } 339 340 if (emu->card_capabilities->emu1010) { 341 ; /* Disable all access to A_IOCFG for the emu1010 */ 342 } else if (emu->card_capabilities->i2c_adc) { 343 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 344 } else if (emu->audigy) { /* enable analog output */ 345 unsigned int reg = inl(emu->port + A_IOCFG); 346 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); 347 } 348 349 return 0; 350 } 351 352 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) 353 { 354 /* 355 * Enable the audio bit 356 */ 357 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); 358 359 /* Enable analog/digital outs on audigy */ 360 if (emu->card_capabilities->emu1010) { 361 ; /* Disable all access to A_IOCFG for the emu1010 */ 362 } else if (emu->card_capabilities->i2c_adc) { 363 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 364 } else if (emu->audigy) { 365 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); 366 367 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 368 /* Unmute Analog now. Set GPO6 to 1 for Apollo. 369 * This has to be done after init ALice3 I2SOut beyond 48KHz. 370 * So, sequence is important. */ 371 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); 372 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ 373 /* Unmute Analog now. */ 374 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); 375 } else { 376 /* Disable routing from AC97 line out to Front speakers */ 377 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); 378 } 379 } 380 381 #if 0 382 { 383 unsigned int tmp; 384 /* FIXME: the following routine disables LiveDrive-II !! */ 385 // TOSLink detection 386 emu->tos_link = 0; 387 tmp = inl(emu->port + HCFG); 388 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 389 outl(tmp|0x800, emu->port + HCFG); 390 udelay(50); 391 if (tmp != (inl(emu->port + HCFG) & ~0x800)) { 392 emu->tos_link = 1; 393 outl(tmp, emu->port + HCFG); 394 } 395 } 396 } 397 #endif 398 399 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); 400 } 401 402 int snd_emu10k1_done(struct snd_emu10k1 * emu) 403 { 404 int ch; 405 406 outl(0, emu->port + INTE); 407 408 /* 409 * Shutdown the chip 410 */ 411 for (ch = 0; ch < NUM_G; ch++) 412 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); 413 for (ch = 0; ch < NUM_G; ch++) { 414 snd_emu10k1_ptr_write(emu, VTFT, ch, 0); 415 snd_emu10k1_ptr_write(emu, CVCF, ch, 0); 416 snd_emu10k1_ptr_write(emu, PTRX, ch, 0); 417 snd_emu10k1_ptr_write(emu, CPF, ch, 0); 418 } 419 420 /* reset recording buffers */ 421 snd_emu10k1_ptr_write(emu, MICBS, 0, 0); 422 snd_emu10k1_ptr_write(emu, MICBA, 0, 0); 423 snd_emu10k1_ptr_write(emu, FXBS, 0, 0); 424 snd_emu10k1_ptr_write(emu, FXBA, 0, 0); 425 snd_emu10k1_ptr_write(emu, FXWC, 0, 0); 426 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); 427 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); 428 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K); 429 snd_emu10k1_ptr_write(emu, TCB, 0, 0); 430 if (emu->audigy) 431 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); 432 else 433 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); 434 435 /* disable channel interrupt */ 436 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); 437 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); 438 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); 439 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); 440 441 /* disable audio and lock cache */ 442 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 443 snd_emu10k1_ptr_write(emu, PTB, 0, 0); 444 445 return 0; 446 } 447 448 /************************************************************************* 449 * ECARD functional implementation 450 *************************************************************************/ 451 452 /* In A1 Silicon, these bits are in the HC register */ 453 #define HOOKN_BIT (1L << 12) 454 #define HANDN_BIT (1L << 11) 455 #define PULSEN_BIT (1L << 10) 456 457 #define EC_GDI1 (1 << 13) 458 #define EC_GDI0 (1 << 14) 459 460 #define EC_NUM_CONTROL_BITS 20 461 462 #define EC_AC3_DATA_SELN 0x0001L 463 #define EC_EE_DATA_SEL 0x0002L 464 #define EC_EE_CNTRL_SELN 0x0004L 465 #define EC_EECLK 0x0008L 466 #define EC_EECS 0x0010L 467 #define EC_EESDO 0x0020L 468 #define EC_TRIM_CSN 0x0040L 469 #define EC_TRIM_SCLK 0x0080L 470 #define EC_TRIM_SDATA 0x0100L 471 #define EC_TRIM_MUTEN 0x0200L 472 #define EC_ADCCAL 0x0400L 473 #define EC_ADCRSTN 0x0800L 474 #define EC_DACCAL 0x1000L 475 #define EC_DACMUTEN 0x2000L 476 #define EC_LEDN 0x4000L 477 478 #define EC_SPDIF0_SEL_SHIFT 15 479 #define EC_SPDIF1_SEL_SHIFT 17 480 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) 481 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) 482 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) 483 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) 484 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should 485 * be incremented any time the EEPROM's 486 * format is changed. */ 487 488 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ 489 490 /* Addresses for special values stored in to EEPROM */ 491 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ 492 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ 493 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ 494 495 #define EC_LAST_PROMFILE_ADDR 0x2f 496 497 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The 498 * can be up to 30 characters in length 499 * and is stored as a NULL-terminated 500 * ASCII string. Any unused bytes must be 501 * filled with zeros */ 502 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ 503 504 505 /* Most of this stuff is pretty self-evident. According to the hardware 506 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC 507 * offset problem. Weird. 508 */ 509 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ 510 EC_TRIM_CSN) 511 512 513 #define EC_DEFAULT_ADC_GAIN 0xC4C4 514 #define EC_DEFAULT_SPDIF0_SEL 0x0 515 #define EC_DEFAULT_SPDIF1_SEL 0x4 516 517 /************************************************************************** 518 * @func Clock bits into the Ecard's control latch. The Ecard uses a 519 * control latch will is loaded bit-serially by toggling the Modem control 520 * lines from function 2 on the E8010. This function hides these details 521 * and presents the illusion that we are actually writing to a distinct 522 * register. 523 */ 524 525 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value) 526 { 527 unsigned short count; 528 unsigned int data; 529 unsigned long hc_port; 530 unsigned int hc_value; 531 532 hc_port = emu->port + HCFG; 533 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); 534 outl(hc_value, hc_port); 535 536 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { 537 538 /* Set up the value */ 539 data = ((value & 0x1) ? PULSEN_BIT : 0); 540 value >>= 1; 541 542 outl(hc_value | data, hc_port); 543 544 /* Clock the shift register */ 545 outl(hc_value | data | HANDN_BIT, hc_port); 546 outl(hc_value | data, hc_port); 547 } 548 549 /* Latch the bits */ 550 outl(hc_value | HOOKN_BIT, hc_port); 551 outl(hc_value, hc_port); 552 } 553 554 /************************************************************************** 555 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The 556 * trim value consists of a 16bit value which is composed of two 557 * 8 bit gain/trim values, one for the left channel and one for the 558 * right channel. The following table maps from the Gain/Attenuation 559 * value in decibels into the corresponding bit pattern for a single 560 * channel. 561 */ 562 563 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu, 564 unsigned short gain) 565 { 566 unsigned int bit; 567 568 /* Enable writing to the TRIM registers */ 569 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 570 571 /* Do it again to insure that we meet hold time requirements */ 572 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 573 574 for (bit = (1 << 15); bit; bit >>= 1) { 575 unsigned int value; 576 577 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); 578 579 if (gain & bit) 580 value |= EC_TRIM_SDATA; 581 582 /* Clock the bit */ 583 snd_emu10k1_ecard_write(emu, value); 584 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); 585 snd_emu10k1_ecard_write(emu, value); 586 } 587 588 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 589 } 590 591 static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu) 592 { 593 unsigned int hc_value; 594 595 /* Set up the initial settings */ 596 emu->ecard_ctrl = EC_RAW_RUN_MODE | 597 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | 598 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); 599 600 /* Step 0: Set the codec type in the hardware control register 601 * and enable audio output */ 602 hc_value = inl(emu->port + HCFG); 603 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); 604 inl(emu->port + HCFG); 605 606 /* Step 1: Turn off the led and deassert TRIM_CS */ 607 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 608 609 /* Step 2: Calibrate the ADC and DAC */ 610 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); 611 612 /* Step 3: Wait for awhile; XXX We can't get away with this 613 * under a real operating system; we'll need to block and wait that 614 * way. */ 615 snd_emu10k1_wait(emu, 48000); 616 617 /* Step 4: Switch off the DAC and ADC calibration. Note 618 * That ADC_CAL is actually an inverted signal, so we assert 619 * it here to stop calibration. */ 620 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 621 622 /* Step 4: Switch into run mode */ 623 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 624 625 /* Step 5: Set the analog input gain */ 626 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); 627 628 return 0; 629 } 630 631 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu) 632 { 633 unsigned long special_port; 634 unsigned int value; 635 636 /* Special initialisation routine 637 * before the rest of the IO-Ports become active. 638 */ 639 special_port = emu->port + 0x38; 640 value = inl(special_port); 641 outl(0x00d00000, special_port); 642 value = inl(special_port); 643 outl(0x00d00001, special_port); 644 value = inl(special_port); 645 outl(0x00d0005f, special_port); 646 value = inl(special_port); 647 outl(0x00d0007f, special_port); 648 value = inl(special_port); 649 outl(0x0090007f, special_port); 650 value = inl(special_port); 651 652 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ 653 return 0; 654 } 655 656 static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename) 657 { 658 int err; 659 int n, i; 660 int reg; 661 int value; 662 const struct firmware *fw_entry; 663 664 if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) { 665 snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err); 666 return err; 667 } 668 snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size); 669 #if 0 670 if (fw_entry->size != 0x133a4) { 671 snd_printk(KERN_ERR "firmware: %s wrong size.\n",filename); 672 return -EINVAL; 673 } 674 #endif 675 676 /* The FPGA is a Xilinx Spartan IIE XC2S50E */ 677 /* GPIO7 -> FPGA PGMN 678 * GPIO6 -> FPGA CCLK 679 * GPIO5 -> FPGA DIN 680 * FPGA CONFIG OFF -> FPGA PGMN 681 */ 682 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */ 683 udelay(1); 684 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */ 685 udelay(100); /* Allow FPGA memory to clean */ 686 for(n = 0; n < fw_entry->size; n++) { 687 value=fw_entry->data[n]; 688 for(i = 0; i < 8; i++) { 689 reg = 0x80; 690 if (value & 0x1) 691 reg = reg | 0x20; 692 value = value >> 1; 693 outl(reg, emu->port + A_IOCFG); 694 outl(reg | 0x40, emu->port + A_IOCFG); 695 } 696 } 697 /* After programming, set GPIO bit 4 high again. */ 698 outl(0x10, emu->port + A_IOCFG); 699 700 701 release_firmware(fw_entry); 702 return 0; 703 } 704 705 /* 706 * EMU-1010 - details found out from this driver, official MS Win drivers, 707 * testing the card: 708 * 709 * Audigy2 (aka Alice2): 710 * --------------------- 711 * * communication over PCI 712 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA 713 * to 2 x 16-bit, using internal DSP instructions 714 * * slave mode, clock supplied by HANA 715 * * linked to HANA using: 716 * 32 x 32-bit serial EMU32 output channels 717 * 16 x EMU32 input channels 718 * (?) x I2S I/O channels (?) 719 * 720 * FPGA (aka HANA): 721 * --------------- 722 * * provides all (?) physical inputs and outputs of the card 723 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.) 724 * * provides clock signal for the card and Alice2 725 * * two crystals - for 44.1kHz and 48kHz multiples 726 * * provides internal routing of signal sources to signal destinations 727 * * inputs/outputs to Alice2 - see above 728 * 729 * Current status of the driver: 730 * ---------------------------- 731 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) 732 * * PCM device nb. 2: 733 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops 734 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops 735 */ 736 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu) 737 { 738 unsigned int i; 739 int tmp,tmp2; 740 int reg; 741 int err; 742 743 snd_printk(KERN_INFO "emu1010: Special config.\n"); 744 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 745 * Lock Sound Memory Cache, Lock Tank Memory Cache, 746 * Mute all codecs. 747 */ 748 outl(0x0005a00c, emu->port + HCFG); 749 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 750 * Lock Tank Memory Cache, 751 * Mute all codecs. 752 */ 753 outl(0x0005a004, emu->port + HCFG); 754 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 755 * Mute all codecs. 756 */ 757 outl(0x0005a000, emu->port + HCFG); 758 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 759 * Mute all codecs. 760 */ 761 outl(0x0005a000, emu->port + HCFG); 762 763 /* Disable 48Volt power to Audio Dock */ 764 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 ); 765 766 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ 767 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® ); 768 snd_printdd("reg1=0x%x\n",reg); 769 if ((reg & 0x3f) == 0x15) { 770 /* FPGA netlist already present so clear it */ 771 /* Return to programming mode */ 772 773 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02 ); 774 } 775 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® ); 776 snd_printdd("reg2=0x%x\n",reg); 777 if ((reg & 0x3f) == 0x15) { 778 /* FPGA failed to return to programming mode */ 779 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n"); 780 return -ENODEV; 781 } 782 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg); 783 if (emu->card_capabilities->emu1010 == 1) { 784 if ((err = snd_emu1010_load_firmware(emu, HANA_FILENAME)) != 0) { 785 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file %s failed\n", HANA_FILENAME); 786 return err; 787 } 788 } else if (emu->card_capabilities->emu1010 == 2) { 789 if ((err = snd_emu1010_load_firmware(emu, EMU1010B_FILENAME)) != 0) { 790 snd_printk(KERN_INFO "emu1010: Loading Firmware file %s failed\n", EMU1010B_FILENAME); 791 return err; 792 } 793 } else if (emu->card_capabilities->emu1010 == 3) { 794 if ((err = snd_emu1010_load_firmware(emu, EMU1010_NOTEBOOK_FILENAME)) != 0) { 795 snd_printk(KERN_INFO "emu1010: Loading Firmware file %s failed\n", EMU1010_NOTEBOOK_FILENAME); 796 return err; 797 } 798 } 799 800 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 801 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® ); 802 if ((reg & 0x3f) != 0x15) { 803 /* FPGA failed to be programmed */ 804 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg); 805 return -ENODEV; 806 } 807 808 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n"); 809 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp ); 810 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 ); 811 snd_printk("Hana ver:%d.%d\n",tmp ,tmp2); 812 /* Enable 48Volt power to Audio Dock */ 813 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON ); 814 815 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® ); 816 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg); 817 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® ); 818 snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg); 819 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp ); 820 /* ADAT input. */ 821 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x01 ); 822 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp ); 823 /* Set no attenuation on Audio Dock pads. */ 824 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 ); 825 emu->emu1010.adc_pads = 0x00; 826 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp ); 827 /* Unmute Audio dock DACs, Headphone source DAC-4. */ 828 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 ); 829 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 ); 830 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp ); 831 /* DAC PADs. */ 832 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f ); 833 emu->emu1010.dac_pads = 0x0f; 834 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp ); 835 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 ); 836 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp ); 837 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ 838 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); 839 /* MIDI routing */ 840 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); 841 /* Unknown. */ 842 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); 843 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */ 844 /* IRQ Enable: All off */ 845 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 ); 846 847 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® ); 848 snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg); 849 /* Default WCLK set to 48kHz. */ 850 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 ); 851 /* Word Clock source, Internal 48kHz x1 */ 852 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K ); 853 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X ); 854 /* Audio Dock LEDs. */ 855 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 ); 856 857 #if 0 858 /* For 96kHz */ 859 snd_emu1010_fpga_link_dst_src_write(emu, 860 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1); 861 snd_emu1010_fpga_link_dst_src_write(emu, 862 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1); 863 snd_emu1010_fpga_link_dst_src_write(emu, 864 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2); 865 snd_emu1010_fpga_link_dst_src_write(emu, 866 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2); 867 #endif 868 #if 0 869 /* For 192kHz */ 870 snd_emu1010_fpga_link_dst_src_write(emu, 871 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1); 872 snd_emu1010_fpga_link_dst_src_write(emu, 873 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1); 874 snd_emu1010_fpga_link_dst_src_write(emu, 875 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2); 876 snd_emu1010_fpga_link_dst_src_write(emu, 877 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2); 878 snd_emu1010_fpga_link_dst_src_write(emu, 879 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3); 880 snd_emu1010_fpga_link_dst_src_write(emu, 881 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3); 882 snd_emu1010_fpga_link_dst_src_write(emu, 883 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4); 884 snd_emu1010_fpga_link_dst_src_write(emu, 885 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4); 886 #endif 887 #if 1 888 /* For 48kHz */ 889 snd_emu1010_fpga_link_dst_src_write(emu, 890 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1); 891 snd_emu1010_fpga_link_dst_src_write(emu, 892 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1); 893 snd_emu1010_fpga_link_dst_src_write(emu, 894 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2); 895 snd_emu1010_fpga_link_dst_src_write(emu, 896 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2); 897 snd_emu1010_fpga_link_dst_src_write(emu, 898 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1); 899 snd_emu1010_fpga_link_dst_src_write(emu, 900 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1); 901 snd_emu1010_fpga_link_dst_src_write(emu, 902 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1); 903 snd_emu1010_fpga_link_dst_src_write(emu, 904 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1); 905 /* Pavel Hofman - setting defaults for 8 more capture channels 906 * Defaults only, users will set their own values anyways, let's 907 * just copy/paste. 908 */ 909 910 snd_emu1010_fpga_link_dst_src_write(emu, 911 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1); 912 snd_emu1010_fpga_link_dst_src_write(emu, 913 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1); 914 snd_emu1010_fpga_link_dst_src_write(emu, 915 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2); 916 snd_emu1010_fpga_link_dst_src_write(emu, 917 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2); 918 snd_emu1010_fpga_link_dst_src_write(emu, 919 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1); 920 snd_emu1010_fpga_link_dst_src_write(emu, 921 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1); 922 snd_emu1010_fpga_link_dst_src_write(emu, 923 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1); 924 snd_emu1010_fpga_link_dst_src_write(emu, 925 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1); 926 #endif 927 #if 0 928 /* Original */ 929 snd_emu1010_fpga_link_dst_src_write(emu, 930 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT); 931 snd_emu1010_fpga_link_dst_src_write(emu, 932 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1); 933 snd_emu1010_fpga_link_dst_src_write(emu, 934 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2); 935 snd_emu1010_fpga_link_dst_src_write(emu, 936 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3); 937 snd_emu1010_fpga_link_dst_src_write(emu, 938 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4); 939 snd_emu1010_fpga_link_dst_src_write(emu, 940 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5); 941 snd_emu1010_fpga_link_dst_src_write(emu, 942 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6); 943 snd_emu1010_fpga_link_dst_src_write(emu, 944 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7); 945 snd_emu1010_fpga_link_dst_src_write(emu, 946 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1); 947 snd_emu1010_fpga_link_dst_src_write(emu, 948 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1); 949 snd_emu1010_fpga_link_dst_src_write(emu, 950 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2); 951 snd_emu1010_fpga_link_dst_src_write(emu, 952 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2); 953 #endif 954 for (i = 0;i < 0x20; i++ ) { 955 /* AudioDock Elink <- Silence */ 956 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE); 957 } 958 for (i = 0;i < 4; i++) { 959 /* Hana SPDIF Out <- Silence */ 960 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE); 961 } 962 for (i = 0;i < 7; i++) { 963 /* Hamoa DAC <- Silence */ 964 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE); 965 } 966 for (i = 0;i < 7; i++) { 967 /* Hana ADAT Out <- Silence */ 968 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE); 969 } 970 snd_emu1010_fpga_link_dst_src_write(emu, 971 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1); 972 snd_emu1010_fpga_link_dst_src_write(emu, 973 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1); 974 snd_emu1010_fpga_link_dst_src_write(emu, 975 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1); 976 snd_emu1010_fpga_link_dst_src_write(emu, 977 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1); 978 snd_emu1010_fpga_link_dst_src_write(emu, 979 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1); 980 snd_emu1010_fpga_link_dst_src_write(emu, 981 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1); 982 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all 983 984 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp ); 985 986 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave, 987 * Lock Sound Memory Cache, Lock Tank Memory Cache, 988 * Mute all codecs. 989 */ 990 outl(0x0000a000, emu->port + HCFG); 991 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave, 992 * Lock Sound Memory Cache, Lock Tank Memory Cache, 993 * Un-Mute all codecs. 994 */ 995 outl(0x0000a001, emu->port + HCFG); 996 997 /* Initial boot complete. Now patches */ 998 999 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp ); 1000 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */ 1001 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */ 1002 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */ 1003 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */ 1004 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp ); 1005 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif (or 0x11 for aes/ebu) */ 1006 1007 /* Delay to allow Audio Dock to settle */ 1008 msleep(100); 1009 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */ 1010 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ® ); /* OPTIONS: Which cards are attached to the EMU */ 1011 /* FIXME: The loading of this should be able to happen any time, 1012 * as the user can plug/unplug it at any time 1013 */ 1014 if (reg & (EMU_HANA_OPTION_DOCK_ONLINE | EMU_HANA_OPTION_DOCK_OFFLINE) ) { 1015 /* Audio Dock attached */ 1016 /* Return to Audio Dock programming mode */ 1017 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n"); 1018 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK ); 1019 if (emu->card_capabilities->emu1010 == 1) { 1020 if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) { 1021 return err; 1022 } 1023 } else if (emu->card_capabilities->emu1010 == 2) { 1024 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) { 1025 return err; 1026 } 1027 } else if (emu->card_capabilities->emu1010 == 3) { 1028 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) { 1029 return err; 1030 } 1031 } 1032 1033 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0 ); 1034 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ® ); 1035 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg); 1036 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 1037 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ® ); 1038 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg); 1039 if ((reg & 0x3f) != 0x15) { 1040 /* FPGA failed to be programmed */ 1041 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg); 1042 return 0; 1043 return -ENODEV; 1044 } 1045 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n"); 1046 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp ); 1047 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 ); 1048 snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2); 1049 } 1050 #if 0 1051 snd_emu1010_fpga_link_dst_src_write(emu, 1052 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */ 1053 snd_emu1010_fpga_link_dst_src_write(emu, 1054 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */ 1055 snd_emu1010_fpga_link_dst_src_write(emu, 1056 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */ 1057 snd_emu1010_fpga_link_dst_src_write(emu, 1058 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */ 1059 #endif 1060 /* Default outputs */ 1061 snd_emu1010_fpga_link_dst_src_write(emu, 1062 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ 1063 emu->emu1010.output_source[0] = 21; 1064 snd_emu1010_fpga_link_dst_src_write(emu, 1065 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1066 emu->emu1010.output_source[1] = 22; 1067 snd_emu1010_fpga_link_dst_src_write(emu, 1068 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2); 1069 emu->emu1010.output_source[2] = 23; 1070 snd_emu1010_fpga_link_dst_src_write(emu, 1071 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); 1072 emu->emu1010.output_source[3] = 24; 1073 snd_emu1010_fpga_link_dst_src_write(emu, 1074 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4); 1075 emu->emu1010.output_source[4] = 25; 1076 snd_emu1010_fpga_link_dst_src_write(emu, 1077 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5); 1078 emu->emu1010.output_source[5] = 26; 1079 snd_emu1010_fpga_link_dst_src_write(emu, 1080 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6); 1081 emu->emu1010.output_source[6] = 27; 1082 snd_emu1010_fpga_link_dst_src_write(emu, 1083 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7); 1084 emu->emu1010.output_source[7] = 28; 1085 snd_emu1010_fpga_link_dst_src_write(emu, 1086 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ 1087 emu->emu1010.output_source[8] = 21; 1088 snd_emu1010_fpga_link_dst_src_write(emu, 1089 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1090 emu->emu1010.output_source[9] = 22; 1091 snd_emu1010_fpga_link_dst_src_write(emu, 1092 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ 1093 emu->emu1010.output_source[10] = 21; 1094 snd_emu1010_fpga_link_dst_src_write(emu, 1095 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1096 emu->emu1010.output_source[11] = 22; 1097 snd_emu1010_fpga_link_dst_src_write(emu, 1098 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ 1099 emu->emu1010.output_source[12] = 21; 1100 snd_emu1010_fpga_link_dst_src_write(emu, 1101 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1102 emu->emu1010.output_source[13] = 22; 1103 snd_emu1010_fpga_link_dst_src_write(emu, 1104 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ 1105 emu->emu1010.output_source[14] = 21; 1106 snd_emu1010_fpga_link_dst_src_write(emu, 1107 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1108 emu->emu1010.output_source[15] = 22; 1109 snd_emu1010_fpga_link_dst_src_write(emu, 1110 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); /* ALICE2 bus 0xa0 */ 1111 emu->emu1010.output_source[16] = 21; 1112 snd_emu1010_fpga_link_dst_src_write(emu, 1113 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1); 1114 emu->emu1010.output_source[17] = 22; 1115 snd_emu1010_fpga_link_dst_src_write(emu, 1116 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2); 1117 emu->emu1010.output_source[18] = 23; 1118 snd_emu1010_fpga_link_dst_src_write(emu, 1119 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3); 1120 emu->emu1010.output_source[19] = 24; 1121 snd_emu1010_fpga_link_dst_src_write(emu, 1122 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4); 1123 emu->emu1010.output_source[20] = 25; 1124 snd_emu1010_fpga_link_dst_src_write(emu, 1125 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5); 1126 emu->emu1010.output_source[21] = 26; 1127 snd_emu1010_fpga_link_dst_src_write(emu, 1128 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6); 1129 emu->emu1010.output_source[22] = 27; 1130 snd_emu1010_fpga_link_dst_src_write(emu, 1131 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7); 1132 emu->emu1010.output_source[23] = 28; 1133 1134 /* TEMP: Select SPDIF in/out */ 1135 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */ 1136 1137 /* TEMP: Select 48kHz SPDIF out */ 1138 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */ 1139 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */ 1140 /* Word Clock source, Internal 48kHz x1 */ 1141 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K ); 1142 //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X ); 1143 emu->emu1010.internal_clock = 1; /* 48000 */ 1144 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */ 1145 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */ 1146 //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */ 1147 //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */ 1148 //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */ 1149 1150 return 0; 1151 } 1152 /* 1153 * Create the EMU10K1 instance 1154 */ 1155 1156 #ifdef CONFIG_PM 1157 static int alloc_pm_buffer(struct snd_emu10k1 *emu); 1158 static void free_pm_buffer(struct snd_emu10k1 *emu); 1159 #endif 1160 1161 static int snd_emu10k1_free(struct snd_emu10k1 *emu) 1162 { 1163 if (emu->port) { /* avoid access to already used hardware */ 1164 snd_emu10k1_fx8010_tram_setup(emu, 0); 1165 snd_emu10k1_done(emu); 1166 /* remove reserved page */ 1167 if (emu->reserved_page) { 1168 snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page); 1169 emu->reserved_page = NULL; 1170 } 1171 snd_emu10k1_free_efx(emu); 1172 } 1173 if (emu->card_capabilities->emu1010) { 1174 /* Disable 48Volt power to Audio Dock */ 1175 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0 ); 1176 } 1177 if (emu->memhdr) 1178 snd_util_memhdr_free(emu->memhdr); 1179 if (emu->silent_page.area) 1180 snd_dma_free_pages(&emu->silent_page); 1181 if (emu->ptb_pages.area) 1182 snd_dma_free_pages(&emu->ptb_pages); 1183 vfree(emu->page_ptr_table); 1184 vfree(emu->page_addr_table); 1185 #ifdef CONFIG_PM 1186 free_pm_buffer(emu); 1187 #endif 1188 if (emu->irq >= 0) 1189 free_irq(emu->irq, emu); 1190 if (emu->port) 1191 pci_release_regions(emu->pci); 1192 if (emu->card_capabilities->ca0151_chip) /* P16V */ 1193 snd_p16v_free(emu); 1194 pci_disable_device(emu->pci); 1195 kfree(emu); 1196 return 0; 1197 } 1198 1199 static int snd_emu10k1_dev_free(struct snd_device *device) 1200 { 1201 struct snd_emu10k1 *emu = device->device_data; 1202 return snd_emu10k1_free(emu); 1203 } 1204 1205 static struct snd_emu_chip_details emu_chip_details[] = { 1206 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/ 1207 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1208 /* DSP: CA0108-IAT 1209 * DAC: CS4382-KQ 1210 * ADC: Philips 1361T 1211 * AC97: STAC9750 1212 * CA0151: None 1213 */ 1214 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, 1215 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]", 1216 .id = "Audigy2", 1217 .emu10k2_chip = 1, 1218 .ca0108_chip = 1, 1219 .spk71 = 1, 1220 .ac97_chip = 1} , 1221 /* Audigy4 (Not PRO) SB0610 */ 1222 /* Tested by James@superbug.co.uk 4th April 2006 */ 1223 /* A_IOCFG bits 1224 * Output 1225 * 0: ? 1226 * 1: ? 1227 * 2: ? 1228 * 3: 0 - Digital Out, 1 - Line in 1229 * 4: ? 1230 * 5: ? 1231 * 6: ? 1232 * 7: ? 1233 * Input 1234 * 8: ? 1235 * 9: ? 1236 * A: Green jack sense (Front) 1237 * B: ? 1238 * C: Black jack sense (Rear/Side Right) 1239 * D: Yellow jack sense (Center/LFE/Side Left) 1240 * E: ? 1241 * F: ? 1242 * 1243 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) 1244 * 0 - Digital Out 1245 * 1 - Line in 1246 */ 1247 /* Mic input not tested. 1248 * Analog CD input not tested 1249 * Digital Out not tested. 1250 * Line in working. 1251 * Audio output 5.1 working. Side outputs not working. 1252 */ 1253 /* DSP: CA10300-IAT LF 1254 * DAC: Cirrus Logic CS4382-KQZ 1255 * ADC: Philips 1361T 1256 * AC97: Sigmatel STAC9750 1257 * CA0151: None 1258 */ 1259 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, 1260 .driver = "Audigy2", .name = "Audigy 4 [SB0610]", 1261 .id = "Audigy2", 1262 .emu10k2_chip = 1, 1263 .ca0108_chip = 1, 1264 .spk71 = 1, 1265 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1266 .ac97_chip = 1} , 1267 /* Audigy 2 ZS Notebook Cardbus card.*/ 1268 /* Tested by James@superbug.co.uk 6th November 2006 */ 1269 /* Audio output 7.1/Headphones working. 1270 * Digital output working. (AC3 not checked, only PCM) 1271 * Audio Mic/Line inputs working. 1272 * Digital input not tested. 1273 */ 1274 /* DSP: Tina2 1275 * DAC: Wolfson WM8768/WM8568 1276 * ADC: Wolfson WM8775 1277 * AC97: None 1278 * CA0151: None 1279 */ 1280 /* Tested by James@superbug.co.uk 4th April 2006 */ 1281 /* A_IOCFG bits 1282 * Output 1283 * 0: Not Used 1284 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. 1285 * 2: Analog input 0 = line in, 1 = mic in 1286 * 3: Not Used 1287 * 4: Digital output 0 = off, 1 = on. 1288 * 5: Not Used 1289 * 6: Not Used 1290 * 7: Not Used 1291 * Input 1292 * All bits 1 (0x3fxx) means nothing plugged in. 1293 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. 1294 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. 1295 * C-D: 2 = Front/Rear/etc, 3 = nothing. 1296 * E-F: Always 0 1297 * 1298 */ 1299 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, 1300 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]", 1301 .id = "Audigy2", 1302 .emu10k2_chip = 1, 1303 .ca0108_chip = 1, 1304 .ca_cardbus_chip = 1, 1305 .spi_dac = 1, 1306 .i2c_adc = 1, 1307 .spk71 = 1} , 1308 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, 1309 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]", 1310 .id = "EMU1010", 1311 .emu10k2_chip = 1, 1312 .ca0108_chip = 1, 1313 .ca_cardbus_chip = 1, 1314 .spk71 = 1 , 1315 .emu1010 = 3} , 1316 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, 1317 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM????]", 1318 .id = "EMU1010", 1319 .emu10k2_chip = 1, 1320 .ca0108_chip = 1, 1321 .spk71 = 1 , 1322 .emu1010 = 2} , 1323 {.vendor = 0x1102, .device = 0x0008, 1324 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]", 1325 .id = "Audigy2", 1326 .emu10k2_chip = 1, 1327 .ca0108_chip = 1, 1328 .ac97_chip = 1} , 1329 /* Tested by James@superbug.co.uk 8th July 2005. No sound available yet. */ 1330 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, 1331 .driver = "Audigy2", .name = "E-mu 1010 [4001]", 1332 .id = "EMU1010", 1333 .emu10k2_chip = 1, 1334 .ca0102_chip = 1, 1335 .spk71 = 1, 1336 .emu1010 = 1} , 1337 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1338 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, 1339 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]", 1340 .id = "Audigy2", 1341 .emu10k2_chip = 1, 1342 .ca0102_chip = 1, 1343 .ca0151_chip = 1, 1344 .spk71 = 1, 1345 .spdif_bug = 1, 1346 .ac97_chip = 1} , 1347 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ 1348 /* The 0x20061102 does have SB0350 written on it 1349 * Just like 0x20021102 1350 */ 1351 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, 1352 .driver = "Audigy2", .name = "Audigy 2 [SB0350b]", 1353 .id = "Audigy2", 1354 .emu10k2_chip = 1, 1355 .ca0102_chip = 1, 1356 .ca0151_chip = 1, 1357 .spk71 = 1, 1358 .spdif_bug = 1, 1359 .ac97_chip = 1} , 1360 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, 1361 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]", 1362 .id = "Audigy2", 1363 .emu10k2_chip = 1, 1364 .ca0102_chip = 1, 1365 .ca0151_chip = 1, 1366 .spk71 = 1, 1367 .spdif_bug = 1, 1368 .ac97_chip = 1} , 1369 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, 1370 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]", 1371 .id = "Audigy2", 1372 .emu10k2_chip = 1, 1373 .ca0102_chip = 1, 1374 .ca0151_chip = 1, 1375 .spk71 = 1, 1376 .spdif_bug = 1, 1377 .ac97_chip = 1} , 1378 /* Audigy 2 */ 1379 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1380 /* DSP: CA0102-IAT 1381 * DAC: CS4382-KQ 1382 * ADC: Philips 1361T 1383 * AC97: STAC9721 1384 * CA0151: Yes 1385 */ 1386 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, 1387 .driver = "Audigy2", .name = "Audigy 2 [SB0240]", 1388 .id = "Audigy2", 1389 .emu10k2_chip = 1, 1390 .ca0102_chip = 1, 1391 .ca0151_chip = 1, 1392 .spk71 = 1, 1393 .spdif_bug = 1, 1394 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1395 .ac97_chip = 1} , 1396 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, 1397 .driver = "Audigy2", .name = "Audigy 2 EX [1005]", 1398 .id = "Audigy2", 1399 .emu10k2_chip = 1, 1400 .ca0102_chip = 1, 1401 .ca0151_chip = 1, 1402 .spk71 = 1, 1403 .spdif_bug = 1} , 1404 /* Dell OEM/Creative Labs Audigy 2 ZS */ 1405 /* See ALSA bug#1365 */ 1406 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, 1407 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]", 1408 .id = "Audigy2", 1409 .emu10k2_chip = 1, 1410 .ca0102_chip = 1, 1411 .ca0151_chip = 1, 1412 .spk71 = 1, 1413 .spdif_bug = 1, 1414 .ac97_chip = 1} , 1415 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, 1416 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]", 1417 .id = "Audigy2", 1418 .emu10k2_chip = 1, 1419 .ca0102_chip = 1, 1420 .ca0151_chip = 1, 1421 .spk71 = 1, 1422 .spdif_bug = 1, 1423 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ 1424 .ac97_chip = 1} , 1425 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, 1426 .driver = "Audigy2", .name = "Audigy 2 [Unknown]", 1427 .id = "Audigy2", 1428 .emu10k2_chip = 1, 1429 .ca0102_chip = 1, 1430 .ca0151_chip = 1, 1431 .spdif_bug = 1, 1432 .ac97_chip = 1} , 1433 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, 1434 .driver = "Audigy", .name = "Audigy 1 [SB0090]", 1435 .id = "Audigy", 1436 .emu10k2_chip = 1, 1437 .ca0102_chip = 1, 1438 .ac97_chip = 1} , 1439 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, 1440 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]", 1441 .id = "Audigy", 1442 .emu10k2_chip = 1, 1443 .ca0102_chip = 1, 1444 .spdif_bug = 1, 1445 .ac97_chip = 1} , 1446 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, 1447 .driver = "Audigy", .name = "Audigy 1 [SB0090]", 1448 .id = "Audigy", 1449 .emu10k2_chip = 1, 1450 .ca0102_chip = 1, 1451 .ac97_chip = 1} , 1452 {.vendor = 0x1102, .device = 0x0004, 1453 .driver = "Audigy", .name = "Audigy 1 [Unknown]", 1454 .id = "Audigy", 1455 .emu10k2_chip = 1, 1456 .ca0102_chip = 1, 1457 .ac97_chip = 1} , 1458 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102, 1459 .driver = "EMU10K1", .name = "SBLive! [SB0105]", 1460 .id = "Live", 1461 .emu10k1_chip = 1, 1462 .ac97_chip = 1, 1463 .sblive51 = 1} , 1464 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102, 1465 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]", 1466 .id = "Live", 1467 .emu10k1_chip = 1, 1468 .ac97_chip = 1, 1469 .sblive51 = 1} , 1470 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, 1471 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]", 1472 .id = "Live", 1473 .emu10k1_chip = 1, 1474 .ac97_chip = 1, 1475 .sblive51 = 1} , 1476 /* Tested by ALSA bug#1680 26th December 2005 */ 1477 /* note: It really has SB0220 written on the card. */ 1478 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, 1479 .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]", 1480 .id = "Live", 1481 .emu10k1_chip = 1, 1482 .ac97_chip = 1, 1483 .sblive51 = 1} , 1484 /* Tested by Thomas Zehetbauer 27th Aug 2005 */ 1485 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, 1486 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]", 1487 .id = "Live", 1488 .emu10k1_chip = 1, 1489 .ac97_chip = 1, 1490 .sblive51 = 1} , 1491 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, 1492 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]", 1493 .id = "Live", 1494 .emu10k1_chip = 1, 1495 .ac97_chip = 1, 1496 .sblive51 = 1} , 1497 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, 1498 .driver = "EMU10K1", .name = "SB Live 5.1", 1499 .id = "Live", 1500 .emu10k1_chip = 1, 1501 .ac97_chip = 1, 1502 .sblive51 = 1} , 1503 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ 1504 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, 1505 .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]", 1506 .id = "Live", 1507 .emu10k1_chip = 1, 1508 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum 1509 * share the same IDs! 1510 */ 1511 .sblive51 = 1} , 1512 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, 1513 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]", 1514 .id = "Live", 1515 .emu10k1_chip = 1, 1516 .ac97_chip = 1, 1517 .sblive51 = 1} , 1518 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, 1519 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]", 1520 .id = "Live", 1521 .emu10k1_chip = 1, 1522 .ac97_chip = 1} , 1523 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, 1524 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]", 1525 .id = "Live", 1526 .emu10k1_chip = 1, 1527 .ac97_chip = 1, 1528 .sblive51 = 1} , 1529 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, 1530 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]", 1531 .id = "Live", 1532 .emu10k1_chip = 1, 1533 .ac97_chip = 1, 1534 .sblive51 = 1} , 1535 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, 1536 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]", 1537 .id = "Live", 1538 .emu10k1_chip = 1, 1539 .ac97_chip = 1, 1540 .sblive51 = 1} , 1541 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1542 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, 1543 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]", 1544 .id = "Live", 1545 .emu10k1_chip = 1, 1546 .ac97_chip = 1, 1547 .sblive51 = 1} , 1548 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, 1549 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]", 1550 .id = "Live", 1551 .emu10k1_chip = 1, 1552 .ac97_chip = 1, 1553 .sblive51 = 1} , 1554 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, 1555 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", 1556 .id = "Live", 1557 .emu10k1_chip = 1, 1558 .ac97_chip = 1, 1559 .sblive51 = 1} , 1560 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, 1561 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]", 1562 .id = "Live", 1563 .emu10k1_chip = 1, 1564 .ac97_chip = 1, 1565 .sblive51 = 1} , 1566 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, 1567 .driver = "EMU10K1", .name = "E-mu APS [4001]", 1568 .id = "APS", 1569 .emu10k1_chip = 1, 1570 .ecard = 1} , 1571 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, 1572 .driver = "EMU10K1", .name = "SBLive! [CT4620]", 1573 .id = "Live", 1574 .emu10k1_chip = 1, 1575 .ac97_chip = 1, 1576 .sblive51 = 1} , 1577 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, 1578 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]", 1579 .id = "Live", 1580 .emu10k1_chip = 1, 1581 .ac97_chip = 1, 1582 .sblive51 = 1} , 1583 {.vendor = 0x1102, .device = 0x0002, 1584 .driver = "EMU10K1", .name = "SB Live [Unknown]", 1585 .id = "Live", 1586 .emu10k1_chip = 1, 1587 .ac97_chip = 1, 1588 .sblive51 = 1} , 1589 { } /* terminator */ 1590 }; 1591 1592 int __devinit snd_emu10k1_create(struct snd_card *card, 1593 struct pci_dev * pci, 1594 unsigned short extin_mask, 1595 unsigned short extout_mask, 1596 long max_cache_bytes, 1597 int enable_ir, 1598 uint subsystem, 1599 struct snd_emu10k1 ** remu) 1600 { 1601 struct snd_emu10k1 *emu; 1602 int idx, err; 1603 int is_audigy; 1604 unsigned int silent_page; 1605 const struct snd_emu_chip_details *c; 1606 static struct snd_device_ops ops = { 1607 .dev_free = snd_emu10k1_dev_free, 1608 }; 1609 1610 *remu = NULL; 1611 1612 /* enable PCI device */ 1613 if ((err = pci_enable_device(pci)) < 0) 1614 return err; 1615 1616 emu = kzalloc(sizeof(*emu), GFP_KERNEL); 1617 if (emu == NULL) { 1618 pci_disable_device(pci); 1619 return -ENOMEM; 1620 } 1621 emu->card = card; 1622 spin_lock_init(&emu->reg_lock); 1623 spin_lock_init(&emu->emu_lock); 1624 spin_lock_init(&emu->voice_lock); 1625 spin_lock_init(&emu->synth_lock); 1626 spin_lock_init(&emu->memblk_lock); 1627 mutex_init(&emu->fx8010.lock); 1628 INIT_LIST_HEAD(&emu->mapped_link_head); 1629 INIT_LIST_HEAD(&emu->mapped_order_link_head); 1630 emu->pci = pci; 1631 emu->irq = -1; 1632 emu->synth = NULL; 1633 emu->get_synth_voice = NULL; 1634 /* read revision & serial */ 1635 emu->revision = pci->revision; 1636 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); 1637 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); 1638 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model); 1639 1640 for (c = emu_chip_details; c->vendor; c++) { 1641 if (c->vendor == pci->vendor && c->device == pci->device) { 1642 if (subsystem) { 1643 if (c->subsystem && (c->subsystem == subsystem) ) { 1644 break; 1645 } else continue; 1646 } else { 1647 if (c->subsystem && (c->subsystem != emu->serial) ) 1648 continue; 1649 if (c->revision && c->revision != emu->revision) 1650 continue; 1651 } 1652 break; 1653 } 1654 } 1655 if (c->vendor == 0) { 1656 snd_printk(KERN_ERR "emu10k1: Card not recognised\n"); 1657 kfree(emu); 1658 pci_disable_device(pci); 1659 return -ENOENT; 1660 } 1661 emu->card_capabilities = c; 1662 if (c->subsystem && !subsystem) 1663 snd_printdd("Sound card name=%s\n", c->name); 1664 else if (subsystem) 1665 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n", 1666 c->name, pci->vendor, pci->device, emu->serial, c->subsystem); 1667 else 1668 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n", 1669 c->name, pci->vendor, pci->device, emu->serial); 1670 1671 if (!*card->id && c->id) { 1672 int i, n = 0; 1673 strlcpy(card->id, c->id, sizeof(card->id)); 1674 for (;;) { 1675 for (i = 0; i < snd_ecards_limit; i++) { 1676 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id)) 1677 break; 1678 } 1679 if (i >= snd_ecards_limit) 1680 break; 1681 n++; 1682 if (n >= SNDRV_CARDS) 1683 break; 1684 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n); 1685 } 1686 } 1687 1688 is_audigy = emu->audigy = c->emu10k2_chip; 1689 1690 /* set the DMA transfer mask */ 1691 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK; 1692 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 || 1693 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) { 1694 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask); 1695 kfree(emu); 1696 pci_disable_device(pci); 1697 return -ENXIO; 1698 } 1699 if (is_audigy) 1700 emu->gpr_base = A_FXGPREGBASE; 1701 else 1702 emu->gpr_base = FXGPREGBASE; 1703 1704 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) { 1705 kfree(emu); 1706 pci_disable_device(pci); 1707 return err; 1708 } 1709 emu->port = pci_resource_start(pci, 0); 1710 1711 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED, 1712 "EMU10K1", emu)) { 1713 err = -EBUSY; 1714 goto error; 1715 } 1716 emu->irq = pci->irq; 1717 1718 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; 1719 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 1720 32 * 1024, &emu->ptb_pages) < 0) { 1721 err = -ENOMEM; 1722 goto error; 1723 } 1724 1725 emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*)); 1726 emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long)); 1727 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) { 1728 err = -ENOMEM; 1729 goto error; 1730 } 1731 1732 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 1733 EMUPAGESIZE, &emu->silent_page) < 0) { 1734 err = -ENOMEM; 1735 goto error; 1736 } 1737 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); 1738 if (emu->memhdr == NULL) { 1739 err = -ENOMEM; 1740 goto error; 1741 } 1742 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - 1743 sizeof(struct snd_util_memblk); 1744 1745 pci_set_master(pci); 1746 1747 emu->fx8010.fxbus_mask = 0x303f; 1748 if (extin_mask == 0) 1749 extin_mask = 0x3fcf; 1750 if (extout_mask == 0) 1751 extout_mask = 0x7fff; 1752 emu->fx8010.extin_mask = extin_mask; 1753 emu->fx8010.extout_mask = extout_mask; 1754 emu->enable_ir = enable_ir; 1755 1756 if (emu->card_capabilities->ca_cardbus_chip) { 1757 if ((err = snd_emu10k1_cardbus_init(emu)) < 0) 1758 goto error; 1759 } 1760 if (emu->card_capabilities->ecard) { 1761 if ((err = snd_emu10k1_ecard_init(emu)) < 0) 1762 goto error; 1763 } else if (emu->card_capabilities->emu1010) { 1764 if ((err = snd_emu10k1_emu1010_init(emu)) < 0) { 1765 snd_emu10k1_free(emu); 1766 return err; 1767 } 1768 } else { 1769 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version 1770 does not support this, it shouldn't do any harm */ 1771 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); 1772 } 1773 1774 /* initialize TRAM setup */ 1775 emu->fx8010.itram_size = (16 * 1024)/2; 1776 emu->fx8010.etram_pages.area = NULL; 1777 emu->fx8010.etram_pages.bytes = 0; 1778 1779 /* 1780 * Init to 0x02109204 : 1781 * Clock accuracy = 0 (1000ppm) 1782 * Sample Rate = 2 (48kHz) 1783 * Audio Channel = 1 (Left of 2) 1784 * Source Number = 0 (Unspecified) 1785 * Generation Status = 1 (Original for Cat Code 12) 1786 * Cat Code = 12 (Digital Signal Mixer) 1787 * Mode = 0 (Mode 0) 1788 * Emphasis = 0 (None) 1789 * CP = 1 (Copyright unasserted) 1790 * AN = 0 (Audio data) 1791 * P = 0 (Consumer) 1792 */ 1793 emu->spdif_bits[0] = emu->spdif_bits[1] = 1794 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1795 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1796 SPCS_GENERATIONSTATUS | 0x00001200 | 1797 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1798 1799 emu->reserved_page = (struct snd_emu10k1_memblk *) 1800 snd_emu10k1_synth_alloc(emu, 4096); 1801 if (emu->reserved_page) 1802 emu->reserved_page->map_locked = 1; 1803 1804 /* Clear silent pages and set up pointers */ 1805 memset(emu->silent_page.area, 0, PAGE_SIZE); 1806 silent_page = emu->silent_page.addr << 1; 1807 for (idx = 0; idx < MAXPAGES; idx++) 1808 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx); 1809 1810 /* set up voice indices */ 1811 for (idx = 0; idx < NUM_G; idx++) { 1812 emu->voices[idx].emu = emu; 1813 emu->voices[idx].number = idx; 1814 } 1815 1816 if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0) 1817 goto error; 1818 #ifdef CONFIG_PM 1819 if ((err = alloc_pm_buffer(emu)) < 0) 1820 goto error; 1821 #endif 1822 1823 /* Initialize the effect engine */ 1824 if ((err = snd_emu10k1_init_efx(emu)) < 0) 1825 goto error; 1826 snd_emu10k1_audio_enable(emu); 1827 1828 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0) 1829 goto error; 1830 1831 #ifdef CONFIG_PROC_FS 1832 snd_emu10k1_proc_init(emu); 1833 #endif 1834 1835 snd_card_set_dev(card, &pci->dev); 1836 *remu = emu; 1837 return 0; 1838 1839 error: 1840 snd_emu10k1_free(emu); 1841 return err; 1842 } 1843 1844 #ifdef CONFIG_PM 1845 static unsigned char saved_regs[] = { 1846 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, 1847 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, 1848 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, 1849 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, 1850 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, 1851 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, 1852 0xff /* end */ 1853 }; 1854 static unsigned char saved_regs_audigy[] = { 1855 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE, 1856 A_FXRT2, A_SENDAMOUNTS, A_FXRT1, 1857 0xff /* end */ 1858 }; 1859 1860 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu) 1861 { 1862 int size; 1863 1864 size = ARRAY_SIZE(saved_regs); 1865 if (emu->audigy) 1866 size += ARRAY_SIZE(saved_regs_audigy); 1867 emu->saved_ptr = vmalloc(4 * NUM_G * size); 1868 if (! emu->saved_ptr) 1869 return -ENOMEM; 1870 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) 1871 return -ENOMEM; 1872 if (emu->card_capabilities->ca0151_chip && 1873 snd_p16v_alloc_pm_buffer(emu) < 0) 1874 return -ENOMEM; 1875 return 0; 1876 } 1877 1878 static void free_pm_buffer(struct snd_emu10k1 *emu) 1879 { 1880 vfree(emu->saved_ptr); 1881 snd_emu10k1_efx_free_pm_buffer(emu); 1882 if (emu->card_capabilities->ca0151_chip) 1883 snd_p16v_free_pm_buffer(emu); 1884 } 1885 1886 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) 1887 { 1888 int i; 1889 unsigned char *reg; 1890 unsigned int *val; 1891 1892 val = emu->saved_ptr; 1893 for (reg = saved_regs; *reg != 0xff; reg++) 1894 for (i = 0; i < NUM_G; i++, val++) 1895 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1896 if (emu->audigy) { 1897 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1898 for (i = 0; i < NUM_G; i++, val++) 1899 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1900 } 1901 if (emu->audigy) 1902 emu->saved_a_iocfg = inl(emu->port + A_IOCFG); 1903 emu->saved_hcfg = inl(emu->port + HCFG); 1904 } 1905 1906 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) 1907 { 1908 if (emu->card_capabilities->ca_cardbus_chip) 1909 snd_emu10k1_cardbus_init(emu); 1910 if (emu->card_capabilities->ecard) 1911 snd_emu10k1_ecard_init(emu); 1912 else if (emu->card_capabilities->emu1010) 1913 snd_emu10k1_emu1010_init(emu); 1914 else 1915 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); 1916 snd_emu10k1_init(emu, emu->enable_ir, 1); 1917 } 1918 1919 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) 1920 { 1921 int i; 1922 unsigned char *reg; 1923 unsigned int *val; 1924 1925 snd_emu10k1_audio_enable(emu); 1926 1927 /* resore for spdif */ 1928 if (emu->audigy) 1929 outl(emu->saved_a_iocfg, emu->port + A_IOCFG); 1930 outl(emu->saved_hcfg, emu->port + HCFG); 1931 1932 val = emu->saved_ptr; 1933 for (reg = saved_regs; *reg != 0xff; reg++) 1934 for (i = 0; i < NUM_G; i++, val++) 1935 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1936 if (emu->audigy) { 1937 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1938 for (i = 0; i < NUM_G; i++, val++) 1939 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1940 } 1941 } 1942 #endif 1943