1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 4 * Creative Labs, Inc. 5 * Routines for control of EMU10K1 chips 6 * 7 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> 8 * Added support for Audigy 2 Value. 9 * Added EMU 1010 support. 10 * General bug fixes and enhancements. 11 * 12 * BUGS: 13 * -- 14 * 15 * TODO: 16 * -- 17 */ 18 19 #include <linux/sched.h> 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/iommu.h> 25 #include <linux/pci.h> 26 #include <linux/slab.h> 27 #include <linux/vmalloc.h> 28 #include <linux/mutex.h> 29 30 31 #include <sound/core.h> 32 #include <sound/emu10k1.h> 33 #include <linux/firmware.h> 34 #include "p16v.h" 35 #include "tina2.h" 36 #include "p17v.h" 37 38 39 #define HANA_FILENAME "emu/hana.fw" 40 #define DOCK_FILENAME "emu/audio_dock.fw" 41 #define EMU1010B_FILENAME "emu/emu1010b.fw" 42 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw" 43 #define EMU0404_FILENAME "emu/emu0404.fw" 44 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" 45 46 MODULE_FIRMWARE(HANA_FILENAME); 47 MODULE_FIRMWARE(DOCK_FILENAME); 48 MODULE_FIRMWARE(EMU1010B_FILENAME); 49 MODULE_FIRMWARE(MICRO_DOCK_FILENAME); 50 MODULE_FIRMWARE(EMU0404_FILENAME); 51 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); 52 53 54 /************************************************************************* 55 * EMU10K1 init / done 56 *************************************************************************/ 57 58 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch) 59 { 60 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); 61 snd_emu10k1_ptr_write(emu, VTFT, ch, VTFT_FILTERTARGET_MASK); 62 snd_emu10k1_ptr_write(emu, CVCF, ch, CVCF_CURRENTFILTER_MASK); 63 snd_emu10k1_ptr_write(emu, PTRX, ch, 0); 64 snd_emu10k1_ptr_write(emu, CPF, ch, 0); 65 snd_emu10k1_ptr_write(emu, CCR, ch, 0); 66 67 snd_emu10k1_ptr_write(emu, PSST, ch, 0); 68 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10); 69 snd_emu10k1_ptr_write(emu, CCCA, ch, 0); 70 snd_emu10k1_ptr_write(emu, Z1, ch, 0); 71 snd_emu10k1_ptr_write(emu, Z2, ch, 0); 72 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000); 73 74 // The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero 75 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0); 76 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0); 77 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0); 78 snd_emu10k1_ptr_write(emu, IP, ch, 0); 79 snd_emu10k1_ptr_write(emu, IFATN, ch, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK); 80 snd_emu10k1_ptr_write(emu, PEFE, ch, 0); 81 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0); 82 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */ 83 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */ 84 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0); 85 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0); 86 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0); 87 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0); 88 89 /* Audigy extra stuffs */ 90 if (emu->audigy) { 91 snd_emu10k1_ptr_write(emu, A_CSBA, ch, 0); 92 snd_emu10k1_ptr_write(emu, A_CSDC, ch, 0); 93 snd_emu10k1_ptr_write(emu, A_CSFE, ch, 0); 94 snd_emu10k1_ptr_write(emu, A_CSHG, ch, 0); 95 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100); 96 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x07060504); 97 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0); 98 } 99 } 100 101 static const unsigned int spi_dac_init[] = { 102 0x00ff, 103 0x02ff, 104 0x0400, 105 0x0520, 106 0x0600, 107 0x08ff, 108 0x0aff, 109 0x0cff, 110 0x0eff, 111 0x10ff, 112 0x1200, 113 0x1400, 114 0x1480, 115 0x1800, 116 0x1aff, 117 0x1cff, 118 0x1e00, 119 0x0530, 120 0x0602, 121 0x0622, 122 0x1400, 123 }; 124 125 static const unsigned int i2c_adc_init[][2] = { 126 { 0x17, 0x00 }, /* Reset */ 127 { 0x07, 0x00 }, /* Timeout */ 128 { 0x0b, 0x22 }, /* Interface control */ 129 { 0x0c, 0x22 }, /* Master mode control */ 130 { 0x0d, 0x08 }, /* Powerdown control */ 131 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ 132 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ 133 { 0x10, 0x7b }, /* ALC Control 1 */ 134 { 0x11, 0x00 }, /* ALC Control 2 */ 135 { 0x12, 0x32 }, /* ALC Control 3 */ 136 { 0x13, 0x00 }, /* Noise gate control */ 137 { 0x14, 0xa6 }, /* Limiter control */ 138 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */ 139 }; 140 141 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir) 142 { 143 unsigned int silent_page; 144 int ch; 145 u32 tmp; 146 147 /* disable audio and lock cache */ 148 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | 149 HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 150 151 /* reset recording buffers */ 152 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE); 153 snd_emu10k1_ptr_write(emu, MICBA, 0, 0); 154 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE); 155 snd_emu10k1_ptr_write(emu, FXBA, 0, 0); 156 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); 157 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); 158 159 /* disable channel interrupt */ 160 outl(0, emu->port + INTE); 161 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); 162 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); 163 164 /* disable stop on loop end */ 165 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); 166 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); 167 168 if (emu->audigy) { 169 /* set SPDIF bypass mode */ 170 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); 171 /* enable rear left + rear right AC97 slots */ 172 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | 173 AC97SLOT_REAR_LEFT); 174 } 175 176 /* init envelope engine */ 177 for (ch = 0; ch < NUM_G; ch++) 178 snd_emu10k1_voice_init(emu, ch); 179 180 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]); 181 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]); 182 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]); 183 184 if (emu->card_capabilities->emu_model) { 185 } else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 186 /* Hacks for Alice3 to work independent of haP16V driver */ 187 /* Setup SRCMulti_I2S SamplingRate */ 188 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 189 190 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 191 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); 192 /* Setup SRCMulti Input Audio Enable */ 193 /* Use 0xFFFFFFFF to enable P16V sounds. */ 194 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); 195 196 /* Enabled Phased (8-channel) P16V playback */ 197 outl(0x0201, emu->port + HCFG2); 198 /* Set playback routing. */ 199 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); 200 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ 201 /* Hacks for Alice3 to work independent of haP16V driver */ 202 dev_info(emu->card->dev, "Audigy2 value: Special config.\n"); 203 /* Setup SRCMulti_I2S SamplingRate */ 204 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 205 206 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 207 snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14); 208 209 /* Setup SRCMulti Input Audio Enable */ 210 snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000); 211 212 /* Setup SPDIF Out Audio Enable */ 213 /* The Audigy 2 Value has a separate SPDIF out, 214 * so no need for a mixer switch 215 */ 216 snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000); 217 218 tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ 219 outw(tmp, emu->port + A_IOCFG); 220 } 221 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ 222 int size, n; 223 224 size = ARRAY_SIZE(spi_dac_init); 225 for (n = 0; n < size; n++) 226 snd_emu10k1_spi_write(emu, spi_dac_init[n]); 227 228 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); 229 /* Enable GPIOs 230 * GPIO0: Unknown 231 * GPIO1: Speakers-enabled. 232 * GPIO2: Unknown 233 * GPIO3: Unknown 234 * GPIO4: IEC958 Output on. 235 * GPIO5: Unknown 236 * GPIO6: Unknown 237 * GPIO7: Unknown 238 */ 239 outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ 240 } 241 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ 242 int size, n; 243 244 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); 245 tmp = inw(emu->port + A_IOCFG); 246 outw(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ 247 tmp = inw(emu->port + A_IOCFG); 248 size = ARRAY_SIZE(i2c_adc_init); 249 for (n = 0; n < size; n++) 250 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); 251 for (n = 0; n < 4; n++) { 252 emu->i2c_capture_volume[n][0] = 0xcf; 253 emu->i2c_capture_volume[n][1] = 0xcf; 254 } 255 } 256 257 258 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); 259 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ 260 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */ 261 262 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0); 263 for (ch = 0; ch < NUM_G; ch++) { 264 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); 265 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); 266 } 267 268 if (emu->card_capabilities->emu_model) { 269 outl(HCFG_AUTOMUTE_ASYNC | 270 HCFG_EMU32_SLAVE | 271 HCFG_AUDIOENABLE, emu->port + HCFG); 272 /* 273 * Hokay, setup HCFG 274 * Mute Disable Audio = 0 275 * Lock Tank Memory = 1 276 * Lock Sound Memory = 0 277 * Auto Mute = 1 278 */ 279 } else if (emu->audigy) { 280 if (emu->revision == 4) /* audigy2 */ 281 outl(HCFG_AUDIOENABLE | 282 HCFG_AC3ENABLE_CDSPDIF | 283 HCFG_AC3ENABLE_GPSPDIF | 284 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 285 else 286 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 287 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, 288 * e.g. card_capabilities->joystick */ 289 } else if (emu->model == 0x20 || 290 emu->model == 0xc400 || 291 (emu->model == 0x21 && emu->revision < 6)) 292 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); 293 else 294 /* With on-chip joystick */ 295 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 296 297 if (enable_ir) { /* enable IR for SB Live */ 298 if (emu->card_capabilities->emu_model) { 299 ; /* Disable all access to A_IOCFG for the emu1010 */ 300 } else if (emu->card_capabilities->i2c_adc) { 301 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 302 } else if (emu->audigy) { 303 u16 reg = inw(emu->port + A_IOCFG); 304 outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 305 udelay(500); 306 outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 307 udelay(100); 308 outw(reg, emu->port + A_IOCFG); 309 } else { 310 unsigned int reg = inl(emu->port + HCFG); 311 outl(reg | HCFG_GPOUT2, emu->port + HCFG); 312 udelay(500); 313 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); 314 udelay(100); 315 outl(reg, emu->port + HCFG); 316 } 317 } 318 319 if (emu->card_capabilities->emu_model) { 320 ; /* Disable all access to A_IOCFG for the emu1010 */ 321 } else if (emu->card_capabilities->i2c_adc) { 322 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 323 } else if (emu->audigy) { /* enable analog output */ 324 u16 reg = inw(emu->port + A_IOCFG); 325 outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); 326 } 327 328 if (emu->address_mode == 0) { 329 /* use 16M in 4G */ 330 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG); 331 } 332 333 return 0; 334 } 335 336 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) 337 { 338 /* 339 * Enable the audio bit 340 */ 341 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); 342 343 /* Enable analog/digital outs on audigy */ 344 if (emu->card_capabilities->emu_model) { 345 ; /* Disable all access to A_IOCFG for the emu1010 */ 346 } else if (emu->card_capabilities->i2c_adc) { 347 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 348 } else if (emu->audigy) { 349 outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); 350 351 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 352 /* Unmute Analog now. Set GPO6 to 1 for Apollo. 353 * This has to be done after init ALice3 I2SOut beyond 48KHz. 354 * So, sequence is important. */ 355 outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); 356 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ 357 /* Unmute Analog now. */ 358 outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); 359 } else { 360 /* Disable routing from AC97 line out to Front speakers */ 361 outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); 362 } 363 } 364 365 #if 0 366 { 367 unsigned int tmp; 368 /* FIXME: the following routine disables LiveDrive-II !! */ 369 /* TOSLink detection */ 370 emu->tos_link = 0; 371 tmp = inl(emu->port + HCFG); 372 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 373 outl(tmp|0x800, emu->port + HCFG); 374 udelay(50); 375 if (tmp != (inl(emu->port + HCFG) & ~0x800)) { 376 emu->tos_link = 1; 377 outl(tmp, emu->port + HCFG); 378 } 379 } 380 } 381 #endif 382 383 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); 384 } 385 386 int snd_emu10k1_done(struct snd_emu10k1 *emu) 387 { 388 int ch; 389 390 outl(0, emu->port + INTE); 391 392 /* 393 * Shutdown the chip 394 */ 395 for (ch = 0; ch < NUM_G; ch++) 396 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); 397 for (ch = 0; ch < NUM_G; ch++) { 398 snd_emu10k1_ptr_write(emu, VTFT, ch, 0); 399 snd_emu10k1_ptr_write(emu, CVCF, ch, 0); 400 snd_emu10k1_ptr_write(emu, PTRX, ch, 0); 401 snd_emu10k1_ptr_write(emu, CPF, ch, 0); 402 } 403 404 /* reset recording buffers */ 405 snd_emu10k1_ptr_write(emu, MICBS, 0, 0); 406 snd_emu10k1_ptr_write(emu, MICBA, 0, 0); 407 snd_emu10k1_ptr_write(emu, FXBS, 0, 0); 408 snd_emu10k1_ptr_write(emu, FXBA, 0, 0); 409 snd_emu10k1_ptr_write(emu, FXWC, 0, 0); 410 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); 411 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); 412 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K); 413 snd_emu10k1_ptr_write(emu, TCB, 0, 0); 414 if (emu->audigy) 415 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); 416 else 417 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); 418 419 /* disable channel interrupt */ 420 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); 421 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); 422 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); 423 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); 424 425 /* disable audio and lock cache */ 426 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 427 snd_emu10k1_ptr_write(emu, PTB, 0, 0); 428 429 return 0; 430 } 431 432 /************************************************************************* 433 * ECARD functional implementation 434 *************************************************************************/ 435 436 /* In A1 Silicon, these bits are in the HC register */ 437 #define HOOKN_BIT (1L << 12) 438 #define HANDN_BIT (1L << 11) 439 #define PULSEN_BIT (1L << 10) 440 441 #define EC_GDI1 (1 << 13) 442 #define EC_GDI0 (1 << 14) 443 444 #define EC_NUM_CONTROL_BITS 20 445 446 #define EC_AC3_DATA_SELN 0x0001L 447 #define EC_EE_DATA_SEL 0x0002L 448 #define EC_EE_CNTRL_SELN 0x0004L 449 #define EC_EECLK 0x0008L 450 #define EC_EECS 0x0010L 451 #define EC_EESDO 0x0020L 452 #define EC_TRIM_CSN 0x0040L 453 #define EC_TRIM_SCLK 0x0080L 454 #define EC_TRIM_SDATA 0x0100L 455 #define EC_TRIM_MUTEN 0x0200L 456 #define EC_ADCCAL 0x0400L 457 #define EC_ADCRSTN 0x0800L 458 #define EC_DACCAL 0x1000L 459 #define EC_DACMUTEN 0x2000L 460 #define EC_LEDN 0x4000L 461 462 #define EC_SPDIF0_SEL_SHIFT 15 463 #define EC_SPDIF1_SEL_SHIFT 17 464 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) 465 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) 466 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) 467 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) 468 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should 469 * be incremented any time the EEPROM's 470 * format is changed. */ 471 472 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ 473 474 /* Addresses for special values stored in to EEPROM */ 475 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ 476 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ 477 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ 478 479 #define EC_LAST_PROMFILE_ADDR 0x2f 480 481 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The 482 * can be up to 30 characters in length 483 * and is stored as a NULL-terminated 484 * ASCII string. Any unused bytes must be 485 * filled with zeros */ 486 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ 487 488 489 /* Most of this stuff is pretty self-evident. According to the hardware 490 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC 491 * offset problem. Weird. 492 */ 493 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ 494 EC_TRIM_CSN) 495 496 497 #define EC_DEFAULT_ADC_GAIN 0xC4C4 498 #define EC_DEFAULT_SPDIF0_SEL 0x0 499 #define EC_DEFAULT_SPDIF1_SEL 0x4 500 501 /************************************************************************** 502 * @func Clock bits into the Ecard's control latch. The Ecard uses a 503 * control latch will is loaded bit-serially by toggling the Modem control 504 * lines from function 2 on the E8010. This function hides these details 505 * and presents the illusion that we are actually writing to a distinct 506 * register. 507 */ 508 509 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value) 510 { 511 unsigned short count; 512 unsigned int data; 513 unsigned long hc_port; 514 unsigned int hc_value; 515 516 hc_port = emu->port + HCFG; 517 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); 518 outl(hc_value, hc_port); 519 520 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { 521 522 /* Set up the value */ 523 data = ((value & 0x1) ? PULSEN_BIT : 0); 524 value >>= 1; 525 526 outl(hc_value | data, hc_port); 527 528 /* Clock the shift register */ 529 outl(hc_value | data | HANDN_BIT, hc_port); 530 outl(hc_value | data, hc_port); 531 } 532 533 /* Latch the bits */ 534 outl(hc_value | HOOKN_BIT, hc_port); 535 outl(hc_value, hc_port); 536 } 537 538 /************************************************************************** 539 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The 540 * trim value consists of a 16bit value which is composed of two 541 * 8 bit gain/trim values, one for the left channel and one for the 542 * right channel. The following table maps from the Gain/Attenuation 543 * value in decibels into the corresponding bit pattern for a single 544 * channel. 545 */ 546 547 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu, 548 unsigned short gain) 549 { 550 unsigned int bit; 551 552 /* Enable writing to the TRIM registers */ 553 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 554 555 /* Do it again to insure that we meet hold time requirements */ 556 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 557 558 for (bit = (1 << 15); bit; bit >>= 1) { 559 unsigned int value; 560 561 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); 562 563 if (gain & bit) 564 value |= EC_TRIM_SDATA; 565 566 /* Clock the bit */ 567 snd_emu10k1_ecard_write(emu, value); 568 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); 569 snd_emu10k1_ecard_write(emu, value); 570 } 571 572 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 573 } 574 575 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu) 576 { 577 unsigned int hc_value; 578 579 /* Set up the initial settings */ 580 emu->ecard_ctrl = EC_RAW_RUN_MODE | 581 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | 582 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); 583 584 /* Step 0: Set the codec type in the hardware control register 585 * and enable audio output */ 586 hc_value = inl(emu->port + HCFG); 587 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); 588 inl(emu->port + HCFG); 589 590 /* Step 1: Turn off the led and deassert TRIM_CS */ 591 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 592 593 /* Step 2: Calibrate the ADC and DAC */ 594 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); 595 596 /* Step 3: Wait for awhile; XXX We can't get away with this 597 * under a real operating system; we'll need to block and wait that 598 * way. */ 599 snd_emu10k1_wait(emu, 48000); 600 601 /* Step 4: Switch off the DAC and ADC calibration. Note 602 * That ADC_CAL is actually an inverted signal, so we assert 603 * it here to stop calibration. */ 604 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 605 606 /* Step 4: Switch into run mode */ 607 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 608 609 /* Step 5: Set the analog input gain */ 610 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); 611 612 return 0; 613 } 614 615 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu) 616 { 617 unsigned long special_port; 618 __always_unused unsigned int value; 619 620 /* Special initialisation routine 621 * before the rest of the IO-Ports become active. 622 */ 623 special_port = emu->port + 0x38; 624 value = inl(special_port); 625 outl(0x00d00000, special_port); 626 value = inl(special_port); 627 outl(0x00d00001, special_port); 628 value = inl(special_port); 629 outl(0x00d0005f, special_port); 630 value = inl(special_port); 631 outl(0x00d0007f, special_port); 632 value = inl(special_port); 633 outl(0x0090007f, special_port); 634 value = inl(special_port); 635 636 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ 637 /* Delay to give time for ADC chip to switch on. It needs 113ms */ 638 msleep(200); 639 return 0; 640 } 641 642 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu, 643 const struct firmware *fw_entry) 644 { 645 int n, i; 646 u16 reg; 647 u8 value; 648 __always_unused u16 write_post; 649 unsigned long flags; 650 651 if (!fw_entry) 652 return -EIO; 653 654 /* The FPGA is a Xilinx Spartan IIE XC2S50E */ 655 /* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */ 656 /* GPIO7 -> FPGA PGMN 657 * GPIO6 -> FPGA CCLK 658 * GPIO5 -> FPGA DIN 659 * FPGA CONFIG OFF -> FPGA PGMN 660 */ 661 spin_lock_irqsave(&emu->emu_lock, flags); 662 outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */ 663 write_post = inw(emu->port + A_GPIO); 664 udelay(100); 665 outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */ 666 write_post = inw(emu->port + A_GPIO); 667 udelay(100); /* Allow FPGA memory to clean */ 668 for (n = 0; n < fw_entry->size; n++) { 669 value = fw_entry->data[n]; 670 for (i = 0; i < 8; i++) { 671 reg = 0x80; 672 if (value & 0x1) 673 reg = reg | 0x20; 674 value = value >> 1; 675 outw(reg, emu->port + A_GPIO); 676 write_post = inw(emu->port + A_GPIO); 677 outw(reg | 0x40, emu->port + A_GPIO); 678 write_post = inw(emu->port + A_GPIO); 679 } 680 } 681 /* After programming, set GPIO bit 4 high again. */ 682 outw(0x10, emu->port + A_GPIO); 683 write_post = inw(emu->port + A_GPIO); 684 spin_unlock_irqrestore(&emu->emu_lock, flags); 685 686 return 0; 687 } 688 689 /* firmware file names, per model, init-fw and dock-fw (optional) */ 690 static const char * const firmware_names[5][2] = { 691 [EMU_MODEL_EMU1010] = { 692 HANA_FILENAME, DOCK_FILENAME 693 }, 694 [EMU_MODEL_EMU1010B] = { 695 EMU1010B_FILENAME, MICRO_DOCK_FILENAME 696 }, 697 [EMU_MODEL_EMU1616] = { 698 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME 699 }, 700 [EMU_MODEL_EMU0404] = { 701 EMU0404_FILENAME, NULL 702 }, 703 }; 704 705 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock, 706 const struct firmware **fw) 707 { 708 const char *filename; 709 int err; 710 711 if (!*fw) { 712 filename = firmware_names[emu->card_capabilities->emu_model][dock]; 713 if (!filename) 714 return 0; 715 err = request_firmware(fw, filename, &emu->pci->dev); 716 if (err) 717 return err; 718 } 719 720 return snd_emu1010_load_firmware_entry(emu, *fw); 721 } 722 723 static void emu1010_firmware_work(struct work_struct *work) 724 { 725 struct snd_emu10k1 *emu; 726 u32 tmp, tmp2, reg; 727 int err; 728 729 emu = container_of(work, struct snd_emu10k1, 730 emu1010.firmware_work.work); 731 if (emu->card->shutdown) 732 return; 733 #ifdef CONFIG_PM_SLEEP 734 if (emu->suspend) 735 return; 736 #endif 737 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */ 738 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */ 739 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) { 740 /* Audio Dock attached */ 741 /* Return to Audio Dock programming mode */ 742 dev_info(emu->card->dev, 743 "emu1010: Loading Audio Dock Firmware\n"); 744 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 745 EMU_HANA_FPGA_CONFIG_AUDIODOCK); 746 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw); 747 if (err < 0) 748 goto next; 749 750 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0); 751 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); 752 dev_info(emu->card->dev, 753 "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", tmp); 754 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 755 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp); 756 dev_info(emu->card->dev, 757 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp); 758 if ((tmp & 0x1f) != 0x15) { 759 /* FPGA failed to be programmed */ 760 dev_info(emu->card->dev, 761 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", 762 tmp); 763 goto next; 764 } 765 dev_info(emu->card->dev, 766 "emu1010: Audio Dock Firmware loaded\n"); 767 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp); 768 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2); 769 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2); 770 /* Sync clocking between 1010 and Dock */ 771 /* Allow DLL to settle */ 772 msleep(10); 773 /* Unmute all. Default is muted after a firmware load */ 774 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 775 } else if (!reg && emu->emu1010.last_reg) { 776 /* Audio Dock removed */ 777 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n"); 778 /* The hardware auto-mutes all, so we unmute again */ 779 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 780 } 781 782 next: 783 emu->emu1010.last_reg = reg; 784 if (!emu->card->shutdown) 785 schedule_delayed_work(&emu->emu1010.firmware_work, 786 msecs_to_jiffies(1000)); 787 } 788 789 /* 790 * Current status of the driver: 791 * ---------------------------- 792 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) 793 * * PCM device nb. 2: 794 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops 795 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops 796 */ 797 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu) 798 { 799 u32 tmp, tmp2, reg; 800 int err; 801 802 dev_info(emu->card->dev, "emu1010: Special config.\n"); 803 804 /* Mute, and disable audio and lock cache, just in case. 805 * Proper init follows in snd_emu10k1_init(). */ 806 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG); 807 808 /* Disable 48Volt power to Audio Dock */ 809 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 810 811 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ 812 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 813 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg); 814 if ((reg & 0x3f) == 0x15) { 815 /* FPGA netlist already present so clear it */ 816 /* Return to programming mode */ 817 818 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA); 819 } 820 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 821 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg); 822 if ((reg & 0x3f) == 0x15) { 823 /* FPGA failed to return to programming mode */ 824 dev_info(emu->card->dev, 825 "emu1010: FPGA failed to return to programming mode\n"); 826 return -ENODEV; 827 } 828 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg); 829 830 err = snd_emu1010_load_firmware(emu, 0, &emu->firmware); 831 if (err < 0) { 832 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n"); 833 return err; 834 } 835 836 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 837 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 838 if ((reg & 0x3f) != 0x15) { 839 /* FPGA failed to be programmed */ 840 dev_info(emu->card->dev, 841 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", 842 reg); 843 return -ENODEV; 844 } 845 846 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n"); 847 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp); 848 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2); 849 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2); 850 /* Enable 48Volt power to Audio Dock */ 851 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON); 852 853 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 854 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg); 855 /* Optical -> ADAT I/O */ 856 emu->emu1010.optical_in = 1; /* IN_ADAT */ 857 emu->emu1010.optical_out = 1; /* OUT_ADAT */ 858 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) | 859 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF); 860 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 861 /* Set no attenuation on Audio Dock pads. */ 862 emu->emu1010.adc_pads = 0x00; 863 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads); 864 /* Unmute Audio dock DACs, Headphone source DAC-4. */ 865 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4); 866 /* DAC PADs. */ 867 emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 | 868 EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4; 869 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads); 870 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ 871 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID); 872 /* MIDI routing */ 873 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2); 874 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2); 875 /* IRQ Enable: All on */ 876 /* snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x0f); */ 877 /* IRQ Enable: All off */ 878 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00); 879 880 emu->emu1010.internal_clock = 1; /* 48000 */ 881 /* Default WCLK set to 48kHz. */ 882 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K); 883 /* Word Clock source, Internal 48kHz x1 */ 884 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 885 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 886 /* Audio Dock LEDs. */ 887 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, EMU_HANA_DOCK_LEDS_2_LOCK | EMU_HANA_DOCK_LEDS_2_48K); 888 889 // The routes are all set to EMU_SRC_SILENCE due to the reset, 890 // so it is safe to simply enable the outputs. 891 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 892 893 return 0; 894 } 895 /* 896 * Create the EMU10K1 instance 897 */ 898 899 #ifdef CONFIG_PM_SLEEP 900 static int alloc_pm_buffer(struct snd_emu10k1 *emu); 901 static void free_pm_buffer(struct snd_emu10k1 *emu); 902 #endif 903 904 static void snd_emu10k1_free(struct snd_card *card) 905 { 906 struct snd_emu10k1 *emu = card->private_data; 907 908 if (emu->port) { /* avoid access to already used hardware */ 909 snd_emu10k1_fx8010_tram_setup(emu, 0); 910 snd_emu10k1_done(emu); 911 snd_emu10k1_free_efx(emu); 912 } 913 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) { 914 /* Disable 48Volt power to Audio Dock */ 915 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 916 } 917 cancel_delayed_work_sync(&emu->emu1010.firmware_work); 918 release_firmware(emu->firmware); 919 release_firmware(emu->dock_fw); 920 snd_util_memhdr_free(emu->memhdr); 921 if (emu->silent_page.area) 922 snd_dma_free_pages(&emu->silent_page); 923 if (emu->ptb_pages.area) 924 snd_dma_free_pages(&emu->ptb_pages); 925 vfree(emu->page_ptr_table); 926 vfree(emu->page_addr_table); 927 #ifdef CONFIG_PM_SLEEP 928 free_pm_buffer(emu); 929 #endif 930 } 931 932 static const struct snd_emu_chip_details emu_chip_details[] = { 933 /* Audigy 5/Rx SB1550 */ 934 /* Tested by michael@gernoth.net 28 Mar 2015 */ 935 /* DSP: CA10300-IAT LF 936 * DAC: Cirrus Logic CS4382-KQZ 937 * ADC: Philips 1361T 938 * AC97: Sigmatel STAC9750 939 * CA0151: None 940 */ 941 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102, 942 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]", 943 .id = "Audigy2", 944 .emu10k2_chip = 1, 945 .ca0108_chip = 1, 946 .spk71 = 1, 947 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 948 .ac97_chip = 1}, 949 /* Audigy4 (Not PRO) SB0610 */ 950 /* Tested by James@superbug.co.uk 4th April 2006 */ 951 /* A_IOCFG bits 952 * Output 953 * 0: ? 954 * 1: ? 955 * 2: ? 956 * 3: 0 - Digital Out, 1 - Line in 957 * 4: ? 958 * 5: ? 959 * 6: ? 960 * 7: ? 961 * Input 962 * 8: ? 963 * 9: ? 964 * A: Green jack sense (Front) 965 * B: ? 966 * C: Black jack sense (Rear/Side Right) 967 * D: Yellow jack sense (Center/LFE/Side Left) 968 * E: ? 969 * F: ? 970 * 971 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) 972 * 0 - Digital Out 973 * 1 - Line in 974 */ 975 /* Mic input not tested. 976 * Analog CD input not tested 977 * Digital Out not tested. 978 * Line in working. 979 * Audio output 5.1 working. Side outputs not working. 980 */ 981 /* DSP: CA10300-IAT LF 982 * DAC: Cirrus Logic CS4382-KQZ 983 * ADC: Philips 1361T 984 * AC97: Sigmatel STAC9750 985 * CA0151: None 986 */ 987 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, 988 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]", 989 .id = "Audigy2", 990 .emu10k2_chip = 1, 991 .ca0108_chip = 1, 992 .spk71 = 1, 993 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 994 .ac97_chip = 1} , 995 /* Audigy 2 Value AC3 out does not work yet. 996 * Need to find out how to turn off interpolators. 997 */ 998 /* Tested by James@superbug.co.uk 3rd July 2005 */ 999 /* DSP: CA0108-IAT 1000 * DAC: CS4382-KQ 1001 * ADC: Philips 1361T 1002 * AC97: STAC9750 1003 * CA0151: None 1004 */ 1005 /* 1006 * A_IOCFG Input (GPIO) 1007 * 0x400 = Front analog jack plugged in. (Green socket) 1008 * 0x1000 = Rear analog jack plugged in. (Black socket) 1009 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket) 1010 * A_IOCFG Output (GPIO) 1011 * 0x60 = Sound out of front Left. 1012 * Win sets it to 0xXX61 1013 */ 1014 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, 1015 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]", 1016 .id = "Audigy2", 1017 .emu10k2_chip = 1, 1018 .ca0108_chip = 1, 1019 .spk71 = 1, 1020 .ac97_chip = 1} , 1021 /* Audigy 2 ZS Notebook Cardbus card.*/ 1022 /* Tested by James@superbug.co.uk 6th November 2006 */ 1023 /* Audio output 7.1/Headphones working. 1024 * Digital output working. (AC3 not checked, only PCM) 1025 * Audio Mic/Line inputs working. 1026 * Digital input not tested. 1027 */ 1028 /* DSP: Tina2 1029 * DAC: Wolfson WM8768/WM8568 1030 * ADC: Wolfson WM8775 1031 * AC97: None 1032 * CA0151: None 1033 */ 1034 /* Tested by James@superbug.co.uk 4th April 2006 */ 1035 /* A_IOCFG bits 1036 * Output 1037 * 0: Not Used 1038 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. 1039 * 2: Analog input 0 = line in, 1 = mic in 1040 * 3: Not Used 1041 * 4: Digital output 0 = off, 1 = on. 1042 * 5: Not Used 1043 * 6: Not Used 1044 * 7: Not Used 1045 * Input 1046 * All bits 1 (0x3fxx) means nothing plugged in. 1047 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. 1048 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. 1049 * C-D: 2 = Front/Rear/etc, 3 = nothing. 1050 * E-F: Always 0 1051 * 1052 */ 1053 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, 1054 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]", 1055 .id = "Audigy2", 1056 .emu10k2_chip = 1, 1057 .ca0108_chip = 1, 1058 .ca_cardbus_chip = 1, 1059 .spi_dac = 1, 1060 .i2c_adc = 1, 1061 .spk71 = 1} , 1062 /* This is MAEM8950 "Mana" */ 1063 /* Attach MicroDock[M] to make it an E-MU 1616[m]. */ 1064 /* Does NOT support sync daughter card (obviously). */ 1065 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1066 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, 1067 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]", 1068 .id = "EMU1010", 1069 .emu10k2_chip = 1, 1070 .ca0108_chip = 1, 1071 .ca_cardbus_chip = 1, 1072 .spk71 = 1 , 1073 .emu_model = EMU_MODEL_EMU1616}, 1074 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1075 /* This is MAEM8960 "Hana3", 0202 is MAEM8980 */ 1076 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1077 * MicroDock[M] to make it an E-MU 1616[m]. */ 1078 /* Does NOT support sync daughter card. */ 1079 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, 1080 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]", 1081 .id = "EMU1010", 1082 .emu10k2_chip = 1, 1083 .ca0108_chip = 1, 1084 .spk71 = 1, 1085 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */ 1086 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */ 1087 /* This is MAEM8986, 0202 is MAEM8980 */ 1088 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1089 * MicroDockM to make it an E-MU 1616m. The non-m 1090 * version was never sold with this card, but should 1091 * still work. */ 1092 /* Does NOT support sync daughter card. */ 1093 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102, 1094 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]", 1095 .id = "EMU1010", 1096 .emu10k2_chip = 1, 1097 .ca0108_chip = 1, 1098 .spk71 = 1, 1099 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */ 1100 /* Tested by James@superbug.co.uk 8th July 2005. */ 1101 /* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */ 1102 /* Attach 0202 daughter card to make it an E-MU 1212m, OR an 1103 * AudioDock[M] to make it an E-MU 1820[m]. */ 1104 /* Supports sync daughter card. */ 1105 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, 1106 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]", 1107 .id = "EMU1010", 1108 .emu10k2_chip = 1, 1109 .ca0102_chip = 1, 1110 .spk71 = 1, 1111 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */ 1112 /* This is MAEM8852 "HanaLiteLite" */ 1113 /* Supports sync daughter card. */ 1114 /* Tested by oswald.buddenhagen@gmx.de Mar 2023. */ 1115 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102, 1116 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]", 1117 .id = "EMU0404", 1118 .emu10k2_chip = 1, 1119 .ca0108_chip = 1, 1120 .spk71 = 1, 1121 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */ 1122 /* This is MAEM8850 "HanaLite" */ 1123 /* Supports sync daughter card. */ 1124 /* Tested by James@superbug.co.uk 20-3-2007. */ 1125 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102, 1126 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]", 1127 .id = "EMU0404", 1128 .emu10k2_chip = 1, 1129 .ca0102_chip = 1, 1130 .spk71 = 1, 1131 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */ 1132 /* EMU0404 PCIe */ 1133 /* Does NOT support sync daughter card. */ 1134 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102, 1135 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]", 1136 .id = "EMU0404", 1137 .emu10k2_chip = 1, 1138 .ca0108_chip = 1, 1139 .spk71 = 1, 1140 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */ 1141 {.vendor = 0x1102, .device = 0x0008, 1142 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]", 1143 .id = "Audigy2", 1144 .emu10k2_chip = 1, 1145 .ca0108_chip = 1, 1146 .ac97_chip = 1} , 1147 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1148 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, 1149 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]", 1150 .id = "Audigy2", 1151 .emu10k2_chip = 1, 1152 .ca0102_chip = 1, 1153 .ca0151_chip = 1, 1154 .spk71 = 1, 1155 .spdif_bug = 1, 1156 .ac97_chip = 1} , 1157 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ 1158 /* The 0x20061102 does have SB0350 written on it 1159 * Just like 0x20021102 1160 */ 1161 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, 1162 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]", 1163 .id = "Audigy2", 1164 .emu10k2_chip = 1, 1165 .ca0102_chip = 1, 1166 .ca0151_chip = 1, 1167 .spk71 = 1, 1168 .spdif_bug = 1, 1169 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1170 .ac97_chip = 1} , 1171 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by 1172 Creative's Windows driver */ 1173 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102, 1174 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]", 1175 .id = "Audigy2", 1176 .emu10k2_chip = 1, 1177 .ca0102_chip = 1, 1178 .ca0151_chip = 1, 1179 .spk71 = 1, 1180 .spdif_bug = 1, 1181 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1182 .ac97_chip = 1} , 1183 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, 1184 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]", 1185 .id = "Audigy2", 1186 .emu10k2_chip = 1, 1187 .ca0102_chip = 1, 1188 .ca0151_chip = 1, 1189 .spk71 = 1, 1190 .spdif_bug = 1, 1191 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1192 .ac97_chip = 1} , 1193 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, 1194 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]", 1195 .id = "Audigy2", 1196 .emu10k2_chip = 1, 1197 .ca0102_chip = 1, 1198 .ca0151_chip = 1, 1199 .spk71 = 1, 1200 .spdif_bug = 1, 1201 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1202 .ac97_chip = 1} , 1203 /* Audigy 2 */ 1204 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1205 /* DSP: CA0102-IAT 1206 * DAC: CS4382-KQ 1207 * ADC: Philips 1361T 1208 * AC97: STAC9721 1209 * CA0151: Yes 1210 */ 1211 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, 1212 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]", 1213 .id = "Audigy2", 1214 .emu10k2_chip = 1, 1215 .ca0102_chip = 1, 1216 .ca0151_chip = 1, 1217 .spk71 = 1, 1218 .spdif_bug = 1, 1219 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1220 .ac97_chip = 1} , 1221 /* Audigy 2 Platinum EX */ 1222 /* Win driver sets A_IOCFG output to 0x1c00 */ 1223 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, 1224 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]", 1225 .id = "Audigy2", 1226 .emu10k2_chip = 1, 1227 .ca0102_chip = 1, 1228 .ca0151_chip = 1, 1229 .spk71 = 1, 1230 .spdif_bug = 1} , 1231 /* Dell OEM/Creative Labs Audigy 2 ZS */ 1232 /* See ALSA bug#1365 */ 1233 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, 1234 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]", 1235 .id = "Audigy2", 1236 .emu10k2_chip = 1, 1237 .ca0102_chip = 1, 1238 .ca0151_chip = 1, 1239 .spk71 = 1, 1240 .spdif_bug = 1, 1241 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1242 .ac97_chip = 1} , 1243 /* Audigy 2 Platinum */ 1244 /* Win driver sets A_IOCFG output to 0xa00 */ 1245 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, 1246 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]", 1247 .id = "Audigy2", 1248 .emu10k2_chip = 1, 1249 .ca0102_chip = 1, 1250 .ca0151_chip = 1, 1251 .spk71 = 1, 1252 .spdif_bug = 1, 1253 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1254 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ 1255 .ac97_chip = 1} , 1256 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, 1257 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]", 1258 .id = "Audigy2", 1259 .emu10k2_chip = 1, 1260 .ca0102_chip = 1, 1261 .ca0151_chip = 1, 1262 .spdif_bug = 1, 1263 .ac97_chip = 1} , 1264 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, 1265 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]", 1266 .id = "Audigy", 1267 .emu10k2_chip = 1, 1268 .ca0102_chip = 1, 1269 .ac97_chip = 1} , 1270 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, 1271 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]", 1272 .id = "Audigy", 1273 .emu10k2_chip = 1, 1274 .ca0102_chip = 1, 1275 .spdif_bug = 1, 1276 .ac97_chip = 1} , 1277 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, 1278 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]", 1279 .id = "Audigy", 1280 .emu10k2_chip = 1, 1281 .ca0102_chip = 1, 1282 .ac97_chip = 1} , 1283 {.vendor = 0x1102, .device = 0x0004, 1284 .driver = "Audigy", .name = "Audigy 1 [Unknown]", 1285 .id = "Audigy", 1286 .emu10k2_chip = 1, 1287 .ca0102_chip = 1, 1288 .ac97_chip = 1} , 1289 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, 1290 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1291 .id = "Live", 1292 .emu10k1_chip = 1, 1293 .ac97_chip = 1, 1294 .sblive51 = 1} , 1295 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102, 1296 .driver = "EMU10K1", .name = "SB Live! [SB0105]", 1297 .id = "Live", 1298 .emu10k1_chip = 1, 1299 .ac97_chip = 1, 1300 .sblive51 = 1} , 1301 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102, 1302 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]", 1303 .id = "Live", 1304 .emu10k1_chip = 1, 1305 .ac97_chip = 1, 1306 .sblive51 = 1} , 1307 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, 1308 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]", 1309 .id = "Live", 1310 .emu10k1_chip = 1, 1311 .ac97_chip = 1, 1312 .sblive51 = 1} , 1313 /* Tested by ALSA bug#1680 26th December 2005 */ 1314 /* note: It really has SB0220 written on the card, */ 1315 /* but it's SB0228 according to kx.inf */ 1316 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, 1317 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]", 1318 .id = "Live", 1319 .emu10k1_chip = 1, 1320 .ac97_chip = 1, 1321 .sblive51 = 1} , 1322 /* Tested by Thomas Zehetbauer 27th Aug 2005 */ 1323 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, 1324 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1325 .id = "Live", 1326 .emu10k1_chip = 1, 1327 .ac97_chip = 1, 1328 .sblive51 = 1} , 1329 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, 1330 .driver = "EMU10K1", .name = "SB Live! 5.1", 1331 .id = "Live", 1332 .emu10k1_chip = 1, 1333 .ac97_chip = 1, 1334 .sblive51 = 1} , 1335 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ 1336 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, 1337 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]", 1338 .id = "Live", 1339 .emu10k1_chip = 1, 1340 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum 1341 * share the same IDs! 1342 */ 1343 .sblive51 = 1} , 1344 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, 1345 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]", 1346 .id = "Live", 1347 .emu10k1_chip = 1, 1348 .ac97_chip = 1, 1349 .sblive51 = 1} , 1350 /* SB Live! Platinum */ 1351 /* Win driver sets A_IOCFG output to 0 */ 1352 /* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */ 1353 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, 1354 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]", 1355 .id = "Live", 1356 .emu10k1_chip = 1, 1357 .ac97_chip = 1} , 1358 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, 1359 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]", 1360 .id = "Live", 1361 .emu10k1_chip = 1, 1362 .ac97_chip = 1, 1363 .sblive51 = 1} , 1364 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, 1365 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]", 1366 .id = "Live", 1367 .emu10k1_chip = 1, 1368 .ac97_chip = 1, 1369 .sblive51 = 1} , 1370 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, 1371 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]", 1372 .id = "Live", 1373 .emu10k1_chip = 1, 1374 .ac97_chip = 1, 1375 .sblive51 = 1} , 1376 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1377 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, 1378 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]", 1379 .id = "Live", 1380 .emu10k1_chip = 1, 1381 .ac97_chip = 1, 1382 .sblive51 = 1} , 1383 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, 1384 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]", 1385 .id = "Live", 1386 .emu10k1_chip = 1, 1387 .ac97_chip = 1, 1388 .sblive51 = 1} , 1389 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, 1390 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", 1391 .id = "Live", 1392 .emu10k1_chip = 1, 1393 .ac97_chip = 1, 1394 .sblive51 = 1} , 1395 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, 1396 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]", 1397 .id = "Live", 1398 .emu10k1_chip = 1, 1399 .ac97_chip = 1, 1400 .sblive51 = 1} , 1401 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, 1402 .driver = "EMU10K1", .name = "E-MU APS [PC545]", 1403 .id = "APS", 1404 .emu10k1_chip = 1, 1405 .ecard = 1} , 1406 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, 1407 .driver = "EMU10K1", .name = "SB Live! [CT4620]", 1408 .id = "Live", 1409 .emu10k1_chip = 1, 1410 .ac97_chip = 1, 1411 .sblive51 = 1} , 1412 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, 1413 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]", 1414 .id = "Live", 1415 .emu10k1_chip = 1, 1416 .ac97_chip = 1, 1417 .sblive51 = 1} , 1418 {.vendor = 0x1102, .device = 0x0002, 1419 .driver = "EMU10K1", .name = "SB Live! [Unknown]", 1420 .id = "Live", 1421 .emu10k1_chip = 1, 1422 .ac97_chip = 1, 1423 .sblive51 = 1} , 1424 { } /* terminator */ 1425 }; 1426 1427 /* 1428 * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too) 1429 * has a problem that from time to time it likes to do few DMA reads a bit 1430 * beyond its normal allocation and gets very confused if these reads get 1431 * blocked by a IOMMU. 1432 * 1433 * This behaviour has been observed for the first (reserved) page 1434 * (for which it happens multiple times at every playback), often for various 1435 * synth pages and sometimes for PCM playback buffers and the page table 1436 * memory itself. 1437 * 1438 * As a workaround let's widen these DMA allocations by an extra page if we 1439 * detect that the device is behind a non-passthrough IOMMU. 1440 */ 1441 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu) 1442 { 1443 struct iommu_domain *domain; 1444 1445 emu->iommu_workaround = false; 1446 1447 domain = iommu_get_domain_for_dev(emu->card->dev); 1448 if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY) 1449 return; 1450 1451 dev_notice(emu->card->dev, 1452 "non-passthrough IOMMU detected, widening DMA allocations"); 1453 emu->iommu_workaround = true; 1454 } 1455 1456 int snd_emu10k1_create(struct snd_card *card, 1457 struct pci_dev *pci, 1458 unsigned short extin_mask, 1459 unsigned short extout_mask, 1460 long max_cache_bytes, 1461 int enable_ir, 1462 uint subsystem) 1463 { 1464 struct snd_emu10k1 *emu = card->private_data; 1465 int idx, err; 1466 int is_audigy; 1467 size_t page_table_size; 1468 __le32 *pgtbl; 1469 unsigned int silent_page; 1470 const struct snd_emu_chip_details *c; 1471 1472 /* enable PCI device */ 1473 err = pcim_enable_device(pci); 1474 if (err < 0) 1475 return err; 1476 1477 card->private_free = snd_emu10k1_free; 1478 emu->card = card; 1479 spin_lock_init(&emu->reg_lock); 1480 spin_lock_init(&emu->emu_lock); 1481 spin_lock_init(&emu->spi_lock); 1482 spin_lock_init(&emu->i2c_lock); 1483 spin_lock_init(&emu->voice_lock); 1484 spin_lock_init(&emu->synth_lock); 1485 spin_lock_init(&emu->memblk_lock); 1486 mutex_init(&emu->fx8010.lock); 1487 INIT_LIST_HEAD(&emu->mapped_link_head); 1488 INIT_LIST_HEAD(&emu->mapped_order_link_head); 1489 emu->pci = pci; 1490 emu->irq = -1; 1491 emu->synth = NULL; 1492 emu->get_synth_voice = NULL; 1493 INIT_DELAYED_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work); 1494 /* read revision & serial */ 1495 emu->revision = pci->revision; 1496 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); 1497 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); 1498 dev_dbg(card->dev, 1499 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", 1500 pci->vendor, pci->device, emu->serial, emu->model); 1501 1502 for (c = emu_chip_details; c->vendor; c++) { 1503 if (c->vendor == pci->vendor && c->device == pci->device) { 1504 if (subsystem) { 1505 if (c->subsystem && (c->subsystem == subsystem)) 1506 break; 1507 else 1508 continue; 1509 } else { 1510 if (c->subsystem && (c->subsystem != emu->serial)) 1511 continue; 1512 if (c->revision && c->revision != emu->revision) 1513 continue; 1514 } 1515 break; 1516 } 1517 } 1518 if (c->vendor == 0) { 1519 dev_err(card->dev, "emu10k1: Card not recognised\n"); 1520 return -ENOENT; 1521 } 1522 emu->card_capabilities = c; 1523 if (c->subsystem && !subsystem) 1524 dev_dbg(card->dev, "Sound card name = %s\n", c->name); 1525 else if (subsystem) 1526 dev_dbg(card->dev, "Sound card name = %s, " 1527 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. " 1528 "Forced to subsystem = 0x%x\n", c->name, 1529 pci->vendor, pci->device, emu->serial, c->subsystem); 1530 else 1531 dev_dbg(card->dev, "Sound card name = %s, " 1532 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n", 1533 c->name, pci->vendor, pci->device, 1534 emu->serial); 1535 1536 if (!*card->id && c->id) 1537 strscpy(card->id, c->id, sizeof(card->id)); 1538 1539 is_audigy = emu->audigy = c->emu10k2_chip; 1540 1541 snd_emu10k1_detect_iommu(emu); 1542 1543 /* set addressing mode */ 1544 emu->address_mode = is_audigy ? 0 : 1; 1545 /* set the DMA transfer mask */ 1546 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK; 1547 if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) { 1548 dev_err(card->dev, 1549 "architecture does not support PCI busmaster DMA with mask 0x%lx\n", 1550 emu->dma_mask); 1551 return -ENXIO; 1552 } 1553 if (is_audigy) 1554 emu->gpr_base = A_FXGPREGBASE; 1555 else 1556 emu->gpr_base = FXGPREGBASE; 1557 1558 err = pci_request_regions(pci, "EMU10K1"); 1559 if (err < 0) 1560 return err; 1561 emu->port = pci_resource_start(pci, 0); 1562 1563 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; 1564 1565 page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 : 1566 MAXPAGES0); 1567 if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size, 1568 &emu->ptb_pages) < 0) 1569 return -ENOMEM; 1570 dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n", 1571 (unsigned long)emu->ptb_pages.addr, 1572 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes)); 1573 1574 emu->page_ptr_table = vmalloc(array_size(sizeof(void *), 1575 emu->max_cache_pages)); 1576 emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long), 1577 emu->max_cache_pages)); 1578 if (!emu->page_ptr_table || !emu->page_addr_table) 1579 return -ENOMEM; 1580 1581 if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE, 1582 &emu->silent_page) < 0) 1583 return -ENOMEM; 1584 dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n", 1585 (unsigned long)emu->silent_page.addr, 1586 (unsigned long)(emu->silent_page.addr + 1587 emu->silent_page.bytes)); 1588 1589 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); 1590 if (!emu->memhdr) 1591 return -ENOMEM; 1592 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - 1593 sizeof(struct snd_util_memblk); 1594 1595 pci_set_master(pci); 1596 1597 // The masks are not used for Audigy. 1598 // FIXME: these should come from the card_capabilites table. 1599 if (extin_mask == 0) 1600 extin_mask = 0x3fcf; // EXTIN_* 1601 if (extout_mask == 0) 1602 extout_mask = 0x7fff; // EXTOUT_* 1603 emu->fx8010.extin_mask = extin_mask; 1604 emu->fx8010.extout_mask = extout_mask; 1605 emu->enable_ir = enable_ir; 1606 1607 if (emu->card_capabilities->ca_cardbus_chip) { 1608 err = snd_emu10k1_cardbus_init(emu); 1609 if (err < 0) 1610 return err; 1611 } 1612 if (emu->card_capabilities->ecard) { 1613 err = snd_emu10k1_ecard_init(emu); 1614 if (err < 0) 1615 return err; 1616 } else if (emu->card_capabilities->emu_model) { 1617 err = snd_emu10k1_emu1010_init(emu); 1618 if (err < 0) 1619 return err; 1620 } else { 1621 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version 1622 does not support this, it shouldn't do any harm */ 1623 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, 1624 AC97SLOT_CNTR|AC97SLOT_LFE); 1625 } 1626 1627 /* initialize TRAM setup */ 1628 emu->fx8010.itram_size = (16 * 1024)/2; 1629 emu->fx8010.etram_pages.area = NULL; 1630 emu->fx8010.etram_pages.bytes = 0; 1631 1632 /* irq handler must be registered after I/O ports are activated */ 1633 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt, 1634 IRQF_SHARED, KBUILD_MODNAME, emu)) 1635 return -EBUSY; 1636 emu->irq = pci->irq; 1637 card->sync_irq = emu->irq; 1638 1639 /* 1640 * Init to 0x02109204 : 1641 * Clock accuracy = 0 (1000ppm) 1642 * Sample Rate = 2 (48kHz) 1643 * Audio Channel = 1 (Left of 2) 1644 * Source Number = 0 (Unspecified) 1645 * Generation Status = 1 (Original for Cat Code 12) 1646 * Cat Code = 12 (Digital Signal Mixer) 1647 * Mode = 0 (Mode 0) 1648 * Emphasis = 0 (None) 1649 * CP = 1 (Copyright unasserted) 1650 * AN = 0 (Audio data) 1651 * P = 0 (Consumer) 1652 */ 1653 emu->spdif_bits[0] = emu->spdif_bits[1] = 1654 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1655 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1656 SPCS_GENERATIONSTATUS | 0x00001200 | 1657 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1658 1659 /* Clear silent pages and set up pointers */ 1660 memset(emu->silent_page.area, 0, emu->silent_page.bytes); 1661 silent_page = emu->silent_page.addr << emu->address_mode; 1662 pgtbl = (__le32 *)emu->ptb_pages.area; 1663 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++) 1664 pgtbl[idx] = cpu_to_le32(silent_page | idx); 1665 1666 /* set up voice indices */ 1667 for (idx = 0; idx < NUM_G; idx++) 1668 emu->voices[idx].number = idx; 1669 1670 err = snd_emu10k1_init(emu, enable_ir); 1671 if (err < 0) 1672 return err; 1673 #ifdef CONFIG_PM_SLEEP 1674 err = alloc_pm_buffer(emu); 1675 if (err < 0) 1676 return err; 1677 #endif 1678 1679 /* Initialize the effect engine */ 1680 err = snd_emu10k1_init_efx(emu); 1681 if (err < 0) 1682 return err; 1683 snd_emu10k1_audio_enable(emu); 1684 1685 #ifdef CONFIG_SND_PROC_FS 1686 snd_emu10k1_proc_init(emu); 1687 #endif 1688 return 0; 1689 } 1690 1691 #ifdef CONFIG_PM_SLEEP 1692 static const unsigned char saved_regs[] = { 1693 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, 1694 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, 1695 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, 1696 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, 1697 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, 1698 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, 1699 0xff /* end */ 1700 }; 1701 static const unsigned char saved_regs_audigy[] = { 1702 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC, 1703 A_FXRT2, A_SENDAMOUNTS, A_FXRT1, 1704 0xff /* end */ 1705 }; 1706 1707 static int alloc_pm_buffer(struct snd_emu10k1 *emu) 1708 { 1709 int size; 1710 1711 size = ARRAY_SIZE(saved_regs); 1712 if (emu->audigy) 1713 size += ARRAY_SIZE(saved_regs_audigy); 1714 emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size)); 1715 if (!emu->saved_ptr) 1716 return -ENOMEM; 1717 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) 1718 return -ENOMEM; 1719 if (emu->card_capabilities->ca0151_chip && 1720 snd_p16v_alloc_pm_buffer(emu) < 0) 1721 return -ENOMEM; 1722 return 0; 1723 } 1724 1725 static void free_pm_buffer(struct snd_emu10k1 *emu) 1726 { 1727 vfree(emu->saved_ptr); 1728 snd_emu10k1_efx_free_pm_buffer(emu); 1729 if (emu->card_capabilities->ca0151_chip) 1730 snd_p16v_free_pm_buffer(emu); 1731 } 1732 1733 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) 1734 { 1735 int i; 1736 const unsigned char *reg; 1737 unsigned int *val; 1738 1739 val = emu->saved_ptr; 1740 for (reg = saved_regs; *reg != 0xff; reg++) 1741 for (i = 0; i < NUM_G; i++, val++) 1742 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1743 if (emu->audigy) { 1744 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1745 for (i = 0; i < NUM_G; i++, val++) 1746 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1747 } 1748 if (emu->audigy) 1749 emu->saved_a_iocfg = inw(emu->port + A_IOCFG); 1750 emu->saved_hcfg = inl(emu->port + HCFG); 1751 } 1752 1753 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) 1754 { 1755 if (emu->card_capabilities->ca_cardbus_chip) 1756 snd_emu10k1_cardbus_init(emu); 1757 if (emu->card_capabilities->ecard) 1758 snd_emu10k1_ecard_init(emu); 1759 else if (emu->card_capabilities->emu_model) 1760 snd_emu10k1_emu1010_init(emu); 1761 else 1762 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); 1763 snd_emu10k1_init(emu, emu->enable_ir); 1764 } 1765 1766 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) 1767 { 1768 int i; 1769 const unsigned char *reg; 1770 unsigned int *val; 1771 1772 snd_emu10k1_audio_enable(emu); 1773 1774 /* resore for spdif */ 1775 if (emu->audigy) 1776 outw(emu->saved_a_iocfg, emu->port + A_IOCFG); 1777 outl(emu->saved_hcfg, emu->port + HCFG); 1778 1779 val = emu->saved_ptr; 1780 for (reg = saved_regs; *reg != 0xff; reg++) 1781 for (i = 0; i < NUM_G; i++, val++) 1782 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1783 if (emu->audigy) { 1784 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1785 for (i = 0; i < NUM_G; i++, val++) 1786 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1787 } 1788 } 1789 #endif 1790