1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Device Tree Source for the PIC64GX Curiosity Kit 4 * 5 * Copyright (C) 2024 Microchip Technology Inc. and its subsidiaries 6 * 7 * Author: Pierre-Henry Moussay <pierre-henry.moussay@microchip.com> 8 * 9 * The Curiosity-GX10000 (PIC64GX SoC Curiosity Kit) is a compact SoC 10 * prototyping board featuring a Microchip PIC64GX SoC 11 * PIC64GX-1000. Features include: 12 * - 1 GB DDR4 SDRAM 13 * - Gigabit Ethernet 14 * - microSD-card slot 15 * 16 * https://www.microchip.com/en-us/development-tool/curiosity-pic64gx1000-kit-es 17 */ 18 19/dts-v1/; 20 21#include "pic64gx.dtsi" 22#include "pic64gx-pinctrl.dtsi" 23 24/* Clock frequency (in Hz) of the rtcclk */ 25#define RTCCLK_FREQ 1000000 26 27/ { 28 #address-cells = <2>; 29 #size-cells = <2>; 30 model = "Microchip PIC64GX Curiosity Kit"; 31 compatible = "microchip,pic64gx-curiosity-kit", "microchip,pic64gx"; 32 33 aliases { 34 ethernet0 = &mac0; 35 serial1 = &mmuart1; 36 serial2 = &mmuart2; 37 }; 38 39 chosen { 40 stdout-path = "serial1:115200n8"; 41 }; 42 43 cpus { 44 timebase-frequency = <RTCCLK_FREQ>; 45 }; 46 47 memory@80000000 { 48 device_type = "memory"; 49 reg = <0x0 0x80000000 0x0 0x40000000>; 50 }; 51 52 reserved-memory { 53 #address-cells = <2>; 54 #size-cells = <2>; 55 ranges; 56 57 hss: hss-buffer@bfc00000 { 58 compatible = "shared-dma-pool"; 59 reg = <0x0 0xbfc00000 0x0 0x400000>; 60 no-map; 61 }; 62 }; 63}; 64 65&gpio0 { 66 interrupts = <13>, <14>, <15>, <16>, 67 <17>, <18>, <19>, <20>, 68 <21>, <22>, <23>, <24>, 69 <25>, <26>; 70 status ="okay"; 71 gpio-line-names = 72 "", "", "", "", "", "", "", "", 73 "", "", "", "", "MIPI_CAM_RESET", "MIPI_CAM_STANDBY"; 74}; 75 76&gpio1 { 77 interrupts = <27>, <28>, <29>, <30>, 78 <31>, <32>, <33>, <34>, 79 <35>, <36>, <37>, <38>, 80 <39>, <40>, <41>, <42>, 81 <43>, <44>, <45>, <46>, 82 <47>, <48>, <49>, <50>; 83 status ="okay"; 84 gpio-line-names = 85 "", "", "LED1", "LED2", "LED3", "LED4", "LED5", "LED6", 86 "LED7", "LED8", "", "", "", "", "", "", 87 "", "", "", "", "HDMI_HPD", "", "", "GPIO_1_23"; 88}; 89 90&gpio2 { 91 interrupts = <53>, <53>, <53>, <53>, 92 <53>, <53>, <53>, <53>, 93 <53>, <53>, <53>, <53>, 94 <53>, <53>, <53>, <53>, 95 <53>, <53>, <53>, <53>, 96 <53>, <53>, <53>, <53>, 97 <53>, <53>, <53>, <53>, 98 <53>, <53>, <53>, <53>; 99 pinctrl-names = "default"; 100 pinctrl-0 = <&mdio1_gpio>, <&spi0_gpio>, <&can0_gpio>, <&pcie_gpio>, 101 <&qspi_gpio>, <&uart3_gpio>, <&uart4_gpio>, <&can1_gpio>; 102 status ="okay"; 103 gpio-line-names = 104 "", "", "", "", "", "", "SWITCH2", "USR_IO12", 105 "DIP1", "DIP2", "", "DIP3", "USR_IO1", "USR_IO2", "USR_IO7", "USR_IO8", 106 "USR_IO3", "USR_IO4", "USR_IO5", "USR_IO6", "", "", "USR_IO9", "USR_IO10", 107 "DIP4", "USR_IO11", "", "", "SWITCH1", "", "", ""; 108}; 109 110&mac0 { 111 status = "okay"; 112 phy-mode = "sgmii"; 113 phy-handle = <&phy0>; 114 pinctrl-names = "default"; 115 pinctrl-0 = <&mdio0_default>; 116 117 phy0: ethernet-phy@b { 118 reg = <0xb>; 119 }; 120}; 121 122&mbox { 123 status = "okay"; 124}; 125 126&i2c0 { 127 status = "okay"; 128}; 129 130&i2c1 { 131 status = "okay"; 132}; 133 134&mmc { 135 bus-width = <4>; 136 disable-wp; 137 cap-sd-highspeed; 138 cap-mmc-highspeed; 139 sdhci-caps-mask = <0x00000007 0x00000000>; 140 status = "okay"; 141}; 142 143&mmuart1 { 144 pinctrl-names = "default"; 145 pinctrl-0 = <&uart1_fio>; 146 status = "okay"; 147}; 148 149&mmuart2 { 150 pinctrl-names = "default"; 151 pinctrl-0 = <&uart2_default>; 152 status = "okay"; 153}; 154 155&refclk { 156 clock-frequency = <125000000>; 157}; 158 159&rtc { 160 status = "okay"; 161}; 162 163&syscontroller { 164 status = "okay"; 165}; 166