1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 #ifndef _DT_BINDINGS_SOC_RENESAS_R8A78000_MFIS_H 3 #define _DT_BINDINGS_SOC_RENESAS_R8A78000_MFIS_H 4 5 /* 6 * Constants for the second mbox-cell of the Renesas MFIS IP core. To be treated 7 * as bit flags which can be ORed. 8 */ 9 10 /* 11 * MFIS HW design before r8a78001 requires a channel to be marked as either 12 * TX or RX. 13 */ 14 #define MFIS_CHANNEL_TX (0 << 0) 15 #define MFIS_CHANNEL_RX (1 << 0) 16 17 /* 18 * MFIS variants before r8a78001 work with pairs of IICR and EICR registers. 19 * Usually, it is specified in the datasheets which of the two a specific core 20 * should use. Then, it does not need extra description in DT. For plain MFIS 21 * of r8a78000, this is selectable, though. According to the system design and 22 * the firmware in use, these channels need to be marked. This is not needed 23 * with other versions of the MFIS, not even with MFIS-SCP of r8a78000. 24 */ 25 #define MFIS_CHANNEL_IICR (0 << 1) 26 #define MFIS_CHANNEL_EICR (1 << 1) 27 28 #endif /* _DT_BINDINGS_SOC_RENESAS_R8A78000_MFIS_H */ 29