xref: /linux/scripts/dtc/include-prefixes/dt-bindings/regulator/samsung,s2mpg10-regulator.h (revision c17ee635fd3a482b2ad2bf5e269755c2eae5f25e)
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /*
3  * Copyright 2021 Google LLC
4  * Copyright 2025 Linaro Ltd.
5  *
6  * Device Tree binding constants for the Samsung S2MPG1x PMIC regulators
7  */
8 
9 #ifndef _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H
10 #define _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H
11 
12 /*
13  * Several regulators may be controlled via external signals instead of via
14  * software. These constants describe the possible signals for such regulators
15  * and generally correspond to the respecitve on-chip pins.
16  *
17  * S2MPG10 regulators supporting these are:
18  * - buck1m .. buck7m buck10m
19  * - ldo3m .. ldo19m
20  *
21  * ldo20m supports external control, but using a different set of control
22  * signals.
23  *
24  * S2MPG11 regulators supporting these are:
25  * - buck1s .. buck3s buck5s buck8s buck9s bucka buckd
26  * - ldo1s ldo2s ldo8s ldo13s
27  */
28 #define S2MPG10_EXTCTRL_PWREN       0 /* PWREN pin */
29 #define S2MPG10_EXTCTRL_PWREN_MIF   1 /* PWREN_MIF pin */
30 #define S2MPG10_EXTCTRL_AP_ACTIVE_N 2 /* ~AP_ACTIVE_N pin */
31 #define S2MPG10_EXTCTRL_CPUCL1_EN   3 /* CPUCL1_EN pin */
32 #define S2MPG10_EXTCTRL_CPUCL1_EN2  4 /* CPUCL1_EN & PWREN pins */
33 #define S2MPG10_EXTCTRL_CPUCL2_EN   5 /* CPUCL2_EN pin */
34 #define S2MPG10_EXTCTRL_CPUCL2_EN2  6 /* CPUCL2_E2 & PWREN pins */
35 #define S2MPG10_EXTCTRL_TPU_EN      7 /* TPU_EN pin */
36 #define S2MPG10_EXTCTRL_TPU_EN2     8 /* TPU_EN & ~AP_ACTIVE_N pins */
37 #define S2MPG10_EXTCTRL_TCXO_ON     9 /* TCXO_ON pin */
38 #define S2MPG10_EXTCTRL_TCXO_ON2    10 /* TCXO_ON & ~AP_ACTIVE_N pins */
39 
40 #define S2MPG10_EXTCTRL_LDO20M_EN2  11 /* VLDO20M_EN & LDO20M_SFR */
41 #define S2MPG10_EXTCTRL_LDO20M_EN   12 /* VLDO20M_EN pin */
42 
43 #define S2MPG11_EXTCTRL_PWREN       0 /* PWREN pin */
44 #define S2MPG11_EXTCTRL_PWREN_MIF   1 /* PWREN_MIF pin */
45 #define S2MPG11_EXTCTRL_AP_ACTIVE_N 2 /* ~AP_ACTIVE_N pin */
46 #define S2MPG11_EXTCTRL_G3D_EN      3 /* G3D_EN pin */
47 #define S2MPG11_EXTCTRL_G3D_EN2     4 /* G3D_EN & ~AP_ACTIVE_N pins */
48 #define S2MPG11_EXTCTRL_AOC_VDD     5 /* AOC_VDD pin */
49 #define S2MPG11_EXTCTRL_AOC_RET     6 /* AOC_RET pin */
50 #define S2MPG11_EXTCTRL_UFS_EN      7 /* UFS_EN pin */
51 #define S2MPG11_EXTCTRL_LDO13S_EN   8 /* VLDO13S_EN pin */
52 
53 #endif /* _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H */
54