1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * Copyright (c) 2022-2024 Rockchip Electronics Co., Ltd. 4 */ 5 #ifndef __DT_BINDINGS_POWER_RK3562_POWER_H__ 6 #define __DT_BINDINGS_POWER_RK3562_POWER_H__ 7 8 /* VD_CORE */ 9 #define RK3562_PD_CPU_0 0 10 #define RK3562_PD_CPU_1 1 11 #define RK3562_PD_CPU_2 2 12 #define RK3562_PD_CPU_3 3 13 #define RK3562_PD_CORE_ALIVE 4 14 15 /* VD_PMU */ 16 #define RK3562_PD_PMU 5 17 #define RK3562_PD_PMU_ALIVE 6 18 19 /* VD_NPU */ 20 #define RK3562_PD_NPU 7 21 22 /* VD_GPU */ 23 #define RK3562_PD_GPU 8 24 25 /* VD_LOGIC */ 26 #define RK3562_PD_DDR 9 27 #define RK3562_PD_VEPU 10 28 #define RK3562_PD_VDPU 11 29 #define RK3562_PD_VI 12 30 #define RK3562_PD_VO 13 31 #define RK3562_PD_RGA 14 32 #define RK3562_PD_PHP 15 33 #define RK3562_PD_LOGIC_ALIVE 16 34 35 #endif 36