1*5c7fb203SBiju Das /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2*5c7fb203SBiju Das /* 3*5c7fb203SBiju Das * This header provides constants for Renesas RZ/G3E family pinctrl bindings. 4*5c7fb203SBiju Das * 5*5c7fb203SBiju Das * Copyright (C) 2024 Renesas Electronics Corp. 6*5c7fb203SBiju Das * 7*5c7fb203SBiju Das */ 8*5c7fb203SBiju Das 9*5c7fb203SBiju Das #ifndef __DT_BINDINGS_PINCTRL_RENESAS_R9A09G047_PINCTRL_H__ 10*5c7fb203SBiju Das #define __DT_BINDINGS_PINCTRL_RENESAS_R9A09G047_PINCTRL_H__ 11*5c7fb203SBiju Das 12*5c7fb203SBiju Das #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 13*5c7fb203SBiju Das 14*5c7fb203SBiju Das /* RZG3E_Px = Offset address of PFC_P_mn - 0x20 */ 15*5c7fb203SBiju Das #define RZG3E_P0 0 16*5c7fb203SBiju Das #define RZG3E_P1 1 17*5c7fb203SBiju Das #define RZG3E_P2 2 18*5c7fb203SBiju Das #define RZG3E_P3 3 19*5c7fb203SBiju Das #define RZG3E_P4 4 20*5c7fb203SBiju Das #define RZG3E_P5 5 21*5c7fb203SBiju Das #define RZG3E_P6 6 22*5c7fb203SBiju Das #define RZG3E_P7 7 23*5c7fb203SBiju Das #define RZG3E_P8 8 24*5c7fb203SBiju Das #define RZG3E_PA 10 25*5c7fb203SBiju Das #define RZG3E_PB 11 26*5c7fb203SBiju Das #define RZG3E_PC 12 27*5c7fb203SBiju Das #define RZG3E_PD 13 28*5c7fb203SBiju Das #define RZG3E_PE 14 29*5c7fb203SBiju Das #define RZG3E_PF 15 30*5c7fb203SBiju Das #define RZG3E_PG 16 31*5c7fb203SBiju Das #define RZG3E_PH 17 32*5c7fb203SBiju Das #define RZG3E_PJ 19 33*5c7fb203SBiju Das #define RZG3E_PK 20 34*5c7fb203SBiju Das #define RZG3E_PL 21 35*5c7fb203SBiju Das #define RZG3E_PM 22 36*5c7fb203SBiju Das #define RZG3E_PS 28 37*5c7fb203SBiju Das 38*5c7fb203SBiju Das #define RZG3E_PORT_PINMUX(b, p, f) RZG2L_PORT_PINMUX(RZG3E_P##b, p, f) 39*5c7fb203SBiju Das #define RZG3E_GPIO(port, pin) RZG2L_GPIO(RZG3E_P##port, pin) 40*5c7fb203SBiju Das 41*5c7fb203SBiju Das #endif /* __DT_BINDINGS_PINCTRL_RENESAS_R9A09G047_PINCTRL_H__ */ 42