1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 3 * This header provides constants for Renesas RZ/G3E family pinctrl bindings. 4 * 5 * Copyright (C) 2024 Renesas Electronics Corp. 6 * 7 */ 8 9 #ifndef __DT_BINDINGS_PINCTRL_RENESAS_R9A09G047_PINCTRL_H__ 10 #define __DT_BINDINGS_PINCTRL_RENESAS_R9A09G047_PINCTRL_H__ 11 12 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h> 13 14 /* RZG3E_Px = Offset address of PFC_P_mn - 0x20 */ 15 #define RZG3E_P0 0 16 #define RZG3E_P1 1 17 #define RZG3E_P2 2 18 #define RZG3E_P3 3 19 #define RZG3E_P4 4 20 #define RZG3E_P5 5 21 #define RZG3E_P6 6 22 #define RZG3E_P7 7 23 #define RZG3E_P8 8 24 #define RZG3E_PA 10 25 #define RZG3E_PB 11 26 #define RZG3E_PC 12 27 #define RZG3E_PD 13 28 #define RZG3E_PE 14 29 #define RZG3E_PF 15 30 #define RZG3E_PG 16 31 #define RZG3E_PH 17 32 #define RZG3E_PJ 19 33 #define RZG3E_PK 20 34 #define RZG3E_PL 21 35 #define RZG3E_PM 22 36 #define RZG3E_PS 28 37 38 #define RZG3E_PORT_PINMUX(b, p, f) RZG2L_PORT_PINMUX(RZG3E_P##b, p, f) 39 #define RZG3E_GPIO(port, pin) RZG2L_GPIO(RZG3E_P##port, pin) 40 41 #endif /* __DT_BINDINGS_PINCTRL_RENESAS_R9A09G047_PINCTRL_H__ */ 42