1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 #ifndef _DT_BINDINGS_CLOCK_ULTRARISC_DP1000_CLK_H 3 #define _DT_BINDINGS_CLOCK_ULTRARISC_DP1000_CLK_H 4 5 #define DP1000_CLK_SYSPLL 0 6 #define DP1000_CLK_SYSPLL_DIV2 1 7 #define DP1000_CLK_SUBSYS 2 8 #define DP1000_CLK_GMAC 3 9 #define DP1000_CLK_UART_ROOT 4 10 #define DP1000_CLK_I2C_ROOT 5 11 #define DP1000_CLK_SPI_ROOT 6 12 #define DP1000_CLK_PCIE_DBI 7 13 #define DP1000_CLK_PCIEX4_CORE 8 14 #define DP1000_CLK_PCIEX16_CORE 9 15 #define DP1000_CLK_PCIE_AUX 10 16 #define DP1000_CLK_UART0 11 17 #define DP1000_CLK_UART1 12 18 #define DP1000_CLK_UART2 13 19 #define DP1000_CLK_UART3 14 20 #define DP1000_CLK_I2C0 15 21 #define DP1000_CLK_I2C1 16 22 #define DP1000_CLK_I2C2 17 23 #define DP1000_CLK_I2C3 18 24 #define DP1000_CLK_SPI0 19 25 #define DP1000_CLK_SPI1 20 26 27 #endif /* _DT_BINDINGS_CLOCK_ULTRARISC_DP1000_CLK_H */ 28