xref: /linux/scripts/dtc/include-prefixes/arm64/ti/k3-am68-phyboard-izar-peb-av-15.dtso (revision 6e5df7cc5455dfcfac4764f00d121ee6a6796e2c)
1// SPDX-License-Identifier: GPL-2.0-only OR MIT
2/*
3 * Copyright (C) 2026 PHYTEC Messtechnik GmbH
4 * Author: Dominik Haller <d.haller@phytec.de>
5 */
6
7/dts-v1/;
8/plugin/;
9
10#include <dt-bindings/gpio/gpio.h>
11#include "k3-pinctrl.h"
12
13&{/} {
14	audio_refclk1: audio-clock {
15		compatible = "fixed-clock";
16		#clock-cells = <0>;
17		clock-frequency = <19200000>;
18	};
19
20	hdmi: hdmi-connector {
21		compatible = "hdmi-connector";
22		label = "hdmi";
23		type = "a";
24		ddc-i2c-bus = <&main_i2c2>;
25
26		port {
27			hdmi_connector_in: endpoint {
28				remote-endpoint = <&lt8912b_out>;
29			};
30		};
31	};
32
33	reg_audio_3v3: regulator-audio-3v3 {
34		compatible = "regulator-fixed";
35		regulator-name = "VCC3V3_AUDIO";
36		regulator-min-microvolt = <3300000>;
37		regulator-max-microvolt = <3300000>;
38		regulator-always-on;
39	};
40
41	reg_audio_1v8: regulator-audio-1v8 {
42		compatible = "regulator-fixed";
43		regulator-name = "VCC1V8_AUDIO";
44		regulator-min-microvolt = <1800000>;
45		regulator-max-microvolt = <1800000>;
46		regulator-always-on;
47	};
48
49	sound {
50		compatible = "simple-audio-card";
51		simple-audio-card,name = "PEB-AV-15";
52		simple-audio-card,widgets =
53			"Headphone", "Headphone Jack",
54			"Microphone", "Mic Jack";
55		simple-audio-card,routing =
56			"Headphone Jack", "HPLOUT",
57			"Headphone Jack", "HPROUT",
58			"MIC3R", "Mic Jack",
59			"Mic Jack", "Mic Bias";
60		simple-audio-card,format = "dsp_b";
61		simple-audio-card,bitclock-inversion;
62		simple-audio-card,bitclock-master = <&link0_codec>;
63		simple-audio-card,frame-master = <&link0_codec>;
64
65		link0_cpu: simple-audio-card,cpu {
66			sound-dai = <&mcasp0>;
67		};
68
69		link0_codec: simple-audio-card,codec {
70			sound-dai = <&audio_codec>;
71			clocks = <&audio_refclk1>;
72		};
73	};
74
75};
76
77&dphy_tx1 {
78	status = "okay";
79};
80
81&dsi1 {
82	status = "okay";
83};
84
85&dsi1_ports {
86	#address-cells = <1>;
87	#size-cells = <0>;
88	port@0 {
89		reg = <0>;
90		dsi1_out: endpoint {
91			remote-endpoint = <&lt8912b_in>;
92		};
93	};
94
95	port@1 {
96		reg = <1>;
97		dsi1_in: endpoint {
98			remote-endpoint = <&dpi3_out>;
99		};
100	};
101};
102
103&dss {
104	status = "okay";
105};
106
107&dss_ports {
108	#address-cells = <1>;
109	#size-cells = <0>;
110
111	port@3 {
112		reg = <3>;
113		dpi3_out: endpoint {
114			remote-endpoint = <&dsi1_in>;
115		};
116	};
117};
118
119&mcasp0 {
120	pinctrl-names = "default";
121	pinctrl-0 = <&mcasp0_pins>;
122
123	#sound-dai-cells = <0>;
124
125	op-mode = <0>;	/* MCASP_IIS_MODE */
126	tdm-slots = <2>;
127
128	/* 4 serializers */
129	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
130		2 0 0 1
131		0 0 0 0
132		0 0 0 0
133		0 0 0 0
134	>;
135
136	tx-num-evt = <32>;
137	rx-num-evt = <32>;
138	status = "okay";
139};
140
141&main_i2c2 {
142	#address-cells = <1>;
143	#size-cells = <0>;
144
145	audio_codec: audio-codec@18 {
146		compatible = "ti,tlv320aic3007";
147		reg = <0x18>;
148		#sound-dai-cells = <0>;
149		ai3x-micbias-vg = <2>;
150		AVDD-supply = <&reg_audio_3v3>;
151		IOVDD-supply = <&reg_audio_3v3>;
152		DRVDD-supply = <&reg_audio_3v3>;
153		DVDD-supply = <&reg_audio_1v8>;
154	};
155
156	bridge@48 {
157		compatible = "lontium,lt8912b";
158		reg = <0x48>;
159
160		ports {
161			#address-cells = <1>;
162			#size-cells = <0>;
163
164			port@0 {
165				reg = <0>;
166				lt8912b_in: endpoint {
167					data-lanes = <0 1 2 3>;
168					remote-endpoint = <&dsi1_out>;
169				};
170			};
171
172			port@1 {
173				reg = <1>;
174				lt8912b_out: endpoint {
175					remote-endpoint = <&hdmi_connector_in>;
176				};
177			};
178		};
179	};
180};
181
182&main_pmx0 {
183	mcasp0_pins: mcasp0-default-pins {
184		pinctrl-single,pins = <
185			J721S2_IOPAD(0x03c, PIN_INPUT, 1) /* (U27) WCLK, MCASP0_AFSX.MCASP0_AFSX */
186			J721S2_IOPAD(0x038, PIN_INPUT, 1) /* (AB28) BCLK, MCASP0_ACLKX.MCASP0_ACLKX */
187			J721S2_IOPAD(0x040, PIN_OUTPUT, 1) /* (AC28) DOUT, MCASP0_AXR0.MCASP0_AXR0 */
188			J721S2_IOPAD(0x07c, PIN_INPUT, 1) /* (T27) DIN, MCASP0_AXR3.MCASP0_AXR3 */
189		>;
190	};
191};
192