1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * AM62D2 EVM: https://www.ti.com/lit/zip/sprcal5 4 * 5 * Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/ 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/leds/common.h> 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/net/ti-dp83867.h> 13#include "k3-am62d2.dtsi" 14 15/ { 16 compatible = "ti,am62d2-evm", "ti,am62d2"; 17 model = "Texas Instruments AM62D2 EVM"; 18 19 aliases { 20 serial0 = &wkup_uart0; 21 serial1 = &mcu_uart0; 22 serial2 = &main_uart0; 23 mmc0 = &sdhci0; 24 mmc1 = &sdhci1; 25 rtc0 = &wkup_rtc0; 26 ethernet0 = &cpsw_port1; 27 ethernet1 = &cpsw_port2; 28 }; 29 30 chosen { 31 stdout-path = &main_uart0; 32 }; 33 34 memory@80000000 { 35 device_type = "memory"; 36 /* 4G RAM */ 37 reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 38 <0x00000008 0x80000000 0x00000000 0x80000000>; 39 bootph-all; 40 }; 41 42 reserved-memory { 43 #address-cells = <2>; 44 #size-cells = <2>; 45 ranges; 46 47 /* global cma region */ 48 linux,cma { 49 compatible = "shared-dma-pool"; 50 reusable; 51 size = <0x00 0x2000000>; 52 alloc-ranges = <0x00 0xc0000000 0x00 0x2000000>; 53 linux,cma-default; 54 }; 55 56 secure_tfa_ddr: tfa@80000000 { 57 reg = <0x00 0x80000000 0x00 0x80000>; 58 no-map; 59 }; 60 61 c7x_0_dma_memory_region: c7x-dma-memory@99800000 { 62 compatible = "shared-dma-pool"; 63 reg = <0x00 0x99800000 0x00 0x100000>; 64 no-map; 65 }; 66 67 c7x_0_memory_region: c7x-memory@99900000 { 68 compatible = "shared-dma-pool"; 69 reg = <0x00 0x99900000 0x00 0xf00000>; 70 no-map; 71 }; 72 73 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { 74 compatible = "shared-dma-pool"; 75 reg = <0x00 0x9b800000 0x00 0x100000>; 76 no-map; 77 }; 78 79 mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { 80 compatible = "shared-dma-pool"; 81 reg = <0x00 0x9b900000 0x00 0xf00000>; 82 no-map; 83 }; 84 85 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { 86 compatible = "shared-dma-pool"; 87 reg = <0x00 0x9c800000 0x00 0x100000>; 88 no-map; 89 }; 90 91 wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { 92 compatible = "shared-dma-pool"; 93 reg = <0x00 0x9c900000 0x00 0xf00000>; 94 no-map; 95 bootph-pre-ram; 96 }; 97 98 secure_ddr: optee@9e800000 { 99 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 100 no-map; 101 }; 102 103 rtos_ipc_memory_region: ipc-memories@a0000000 { 104 compatible = "shared-dma-pool"; 105 reg = <0x00 0xa0000000 0x00 0x01000000>; 106 no-map; 107 }; 108 }; 109 110 opp-table { 111 /* Requires VDD_CORE at 0v85 */ 112 opp-1400000000 { 113 opp-hz = /bits/ 64 <1400000000>; 114 opp-supported-hw = <0x01 0x0004>; 115 clock-latency-ns = <6000000>; 116 }; 117 }; 118 119 vout_pd: regulator-0 { 120 /* TPS65988 PD CONTROLLER OUTPUT */ 121 compatible = "regulator-fixed"; 122 regulator-name = "vout_pd"; 123 regulator-min-microvolt = <5000000>; 124 regulator-max-microvolt = <5000000>; 125 regulator-always-on; 126 regulator-boot-on; 127 bootph-all; 128 }; 129 130 vmain_pd: regulator-1 { 131 /* Output of TPS22811 */ 132 compatible = "regulator-fixed"; 133 regulator-name = "vmain_pd"; 134 regulator-min-microvolt = <5000000>; 135 regulator-max-microvolt = <5000000>; 136 vin-supply = <&vout_pd>; 137 regulator-always-on; 138 regulator-boot-on; 139 bootph-all; 140 }; 141 142 vcc_5v0: regulator-2 { 143 /* Output of TPS630702RNMR */ 144 compatible = "regulator-fixed"; 145 regulator-name = "vcc_5v0"; 146 regulator-min-microvolt = <5000000>; 147 regulator-max-microvolt = <5000000>; 148 vin-supply = <&vmain_pd>; 149 regulator-always-on; 150 regulator-boot-on; 151 bootph-all; 152 }; 153 154 vcc_3v3_main: regulator-3 { 155 /* output of LM5141-Q1 */ 156 compatible = "regulator-fixed"; 157 regulator-name = "vcc_3v3_main"; 158 regulator-min-microvolt = <3300000>; 159 regulator-max-microvolt = <3300000>; 160 vin-supply = <&vmain_pd>; 161 regulator-always-on; 162 regulator-boot-on; 163 bootph-all; 164 }; 165 166 vdd_mmc1: regulator-4 { 167 /* TPS22918DBVR */ 168 compatible = "regulator-fixed"; 169 regulator-name = "vdd_mmc1"; 170 regulator-min-microvolt = <3300000>; 171 regulator-max-microvolt = <3300000>; 172 regulator-boot-on; 173 enable-active-high; 174 gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; 175 bootph-all; 176 }; 177 178 vcc_3v3_sys: regulator-5 { 179 /* output of TPS222965DSGT */ 180 compatible = "regulator-fixed"; 181 regulator-name = "vcc_3v3_sys"; 182 regulator-min-microvolt = <3300000>; 183 regulator-max-microvolt = <3300000>; 184 vin-supply = <&vcc_3v3_main>; 185 regulator-always-on; 186 regulator-boot-on; 187 bootph-all; 188 }; 189 190 vddshv_sdio: regulator-6 { 191 compatible = "regulator-gpio"; 192 regulator-name = "vddshv_sdio"; 193 pinctrl-names = "default"; 194 pinctrl-0 = <&vddshv_sdio_pins_default>; 195 regulator-min-microvolt = <1800000>; 196 regulator-max-microvolt = <3300000>; 197 regulator-boot-on; 198 gpios = <&main_gpio1 31 GPIO_ACTIVE_HIGH>; 199 states = <1800000 0x0>, 200 <3300000 0x1>; 201 bootph-all; 202 }; 203 204 leds { 205 compatible = "gpio-leds"; 206 pinctrl-names = "default"; 207 pinctrl-0 = <&usr_led_pins_default>; 208 209 led-0 { 210 label = "am62d-evm:green:heartbeat"; 211 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>; 212 linux,default-trigger = "heartbeat"; 213 function = LED_FUNCTION_HEARTBEAT; 214 default-state = "off"; 215 }; 216 }; 217}; 218 219&mcu_pmx0 { 220 status = "okay"; 221 222 pmic_irq_pins_default: pmic-irq-default-pins { 223 pinctrl-single,pins = < 224 AM62DX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */ 225 >; 226 }; 227 228 wkup_uart0_pins_default: wkup-uart0-default-pins { 229 pinctrl-single,pins = < 230 AM62DX_MCU_IOPAD(0x0024, PIN_INPUT, 0) /* (C9) WKUP_UART0_RXD */ 231 AM62DX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (E9) WKUP_UART0_TXD */ 232 AM62DX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C10) WKUP_UART0_CTSn */ 233 AM62DX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_RTSn */ 234 >; 235 bootph-all; 236 }; 237}; 238 239/* WKUP UART0 is used for DM firmware logs */ 240&wkup_uart0 { 241 pinctrl-names = "default"; 242 pinctrl-0 = <&wkup_uart0_pins_default>; 243 bootph-all; 244 status = "reserved"; 245}; 246 247&main_pmx0 { 248 main_uart0_pins_default: main-uart0-default-pins { 249 pinctrl-single,pins = < 250 AM62DX_IOPAD(0x01c8, PIN_INPUT, 0) /* (E14) UART0_RXD */ 251 AM62DX_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */ 252 >; 253 bootph-all; 254 }; 255 256 main_i2c0_pins_default: main-i2c0-default-pins { 257 pinctrl-single,pins = < 258 AM62DX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */ 259 AM62DX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (E16) I2C0_SDA */ 260 >; 261 bootph-all; 262 }; 263 264 main_i2c1_pins_default: main-i2c1-default-pins { 265 pinctrl-single,pins = < 266 AM62DX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C17) I2C1_SCL */ 267 AM62DX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (E17) I2C1_SDA */ 268 >; 269 bootph-all; 270 }; 271 272 main_i2c2_pins_default: main-i2c2-default-pins { 273 pinctrl-single,pins = < 274 AM62DX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (M22) GPMC0_CSn2.I2C2_SCL */ 275 AM62DX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (M20) GPMC0_CSn3.I2C2_SDA */ 276 >; 277 }; 278 279 main_mmc0_pins_default: main-mmc0-default-pins { 280 pinctrl-single,pins = < 281 AM62DX_IOPAD(0x0220, PIN_INPUT_PULLUP, 0) /* (Y6) MMC0_CMD */ 282 AM62DX_IOPAD(0x0218, PIN_OUTPUT, 0) /* (AB7) MMC0_CLK */ 283 AM62DX_IOPAD(0x0214, PIN_INPUT_PULLUP, 0) /* (AA6) MMC0_DAT0 */ 284 AM62DX_IOPAD(0x0210, PIN_INPUT_PULLUP, 0) /* (AB6) MMC0_DAT1 */ 285 AM62DX_IOPAD(0x020c, PIN_INPUT_PULLUP, 0) /* (Y7) MMC0_DAT2 */ 286 AM62DX_IOPAD(0x0208, PIN_INPUT_PULLUP, 0) /* (AA7) MMC0_DAT3 */ 287 AM62DX_IOPAD(0x0204, PIN_INPUT_PULLUP, 0) /* (Y8) MMC0_DAT4 */ 288 AM62DX_IOPAD(0x0200, PIN_INPUT_PULLUP, 0) /* (W7) MMC0_DAT5 */ 289 AM62DX_IOPAD(0x01fc, PIN_INPUT_PULLUP, 0) /* (W9) MMC0_DAT6 */ 290 AM62DX_IOPAD(0x01f8, PIN_INPUT_PULLUP, 0) /* (AB8) MMC0_DAT7 */ 291 >; 292 bootph-all; 293 }; 294 295 main_mmc1_pins_default: main-mmc1-default-pins { 296 pinctrl-single,pins = < 297 AM62DX_IOPAD(0x023c, PIN_INPUT, 0) /* (C21) MMC1_CMD */ 298 AM62DX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (E22) MMC1_CLK */ 299 AM62DX_IOPAD(0x0230, PIN_INPUT, 0) /* (B22) MMC1_DAT0 */ 300 AM62DX_IOPAD(0x022c, PIN_INPUT, 0) /* (D21) MMC1_DAT1 */ 301 AM62DX_IOPAD(0x0228, PIN_INPUT, 0) /* (C22) MMC1_DAT2 */ 302 AM62DX_IOPAD(0x0224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ 303 AM62DX_IOPAD(0x0240, PIN_INPUT, 0) /* (E18) MMC1_SDCD */ 304 >; 305 bootph-all; 306 }; 307 308 main_mdio0_pins_default: main-mdio0-default-pins { 309 pinctrl-single,pins = < 310 AM62DX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */ 311 AM62DX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */ 312 >; 313 bootph-all; 314 }; 315 316 main_rgmii1_pins_default: main-rgmii1-default-pins { 317 pinctrl-single,pins = < 318 AM62DX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */ 319 AM62DX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */ 320 AM62DX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */ 321 AM62DX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */ 322 AM62DX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */ 323 AM62DX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */ 324 AM62DX_IOPAD(0x134, PIN_INPUT, 0) /* (Y17) RGMII1_TD0 */ 325 AM62DX_IOPAD(0x138, PIN_INPUT, 0) /* (V16) RGMII1_TD1 */ 326 AM62DX_IOPAD(0x13c, PIN_INPUT, 0) /* (Y16) RGMII1_TD2 */ 327 AM62DX_IOPAD(0x140, PIN_INPUT, 0) /* (AA17) RGMII1_TD3 */ 328 AM62DX_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AB17) RGMII1_TXC */ 329 AM62DX_IOPAD(0x012c, PIN_OUTPUT, 0) /* (W16) RGMII1_TX_CTL */ 330 >; 331 bootph-all; 332 }; 333 334 main_rgmii2_pins_default: main-rgmii2-default-pins { 335 pinctrl-single,pins = < 336 AM62DX_IOPAD(0x0184, PIN_INPUT, 0) /* (AA21) RGMII2_RD0 */ 337 AM62DX_IOPAD(0x0188, PIN_INPUT, 0) /* (Y20) RGMII2_RD1 */ 338 AM62DX_IOPAD(0x018c, PIN_INPUT, 0) /* (AB21) RGMII2_RD2 */ 339 AM62DX_IOPAD(0x0190, PIN_INPUT, 0) /* (AB20) RGMII2_RD3 */ 340 AM62DX_IOPAD(0x0180, PIN_INPUT, 0) /* (AA20) RGMII2_RXC */ 341 AM62DX_IOPAD(0x017c, PIN_INPUT, 0) /* (W18) RGMII2_RX_CTL */ 342 AM62DX_IOPAD(0x016c, PIN_INPUT, 0) /* (AA19) RGMII2_TD0 */ 343 AM62DX_IOPAD(0x0170, PIN_INPUT, 0) /* (Y18) RGMII2_TD1 */ 344 AM62DX_IOPAD(0x0174, PIN_INPUT, 0) /* (AA18) RGMII2_TD2 */ 345 AM62DX_IOPAD(0x0178, PIN_INPUT, 0) /* (W17) RGMII2_TD3 */ 346 AM62DX_IOPAD(0x0168, PIN_OUTPUT, 0) /* (AB19) RGMII2_TXC */ 347 AM62DX_IOPAD(0x0164, PIN_OUTPUT, 0) /* (Y19) RGMII2_TX_CTL */ 348 >; 349 bootph-all; 350 }; 351 352 main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { 353 pinctrl-single,pins = < 354 AM62DX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */ 355 >; 356 }; 357 358 vddshv_sdio_pins_default: vddshv-sdio-default-pins { 359 pinctrl-single,pins = < 360 AM62DX_IOPAD(0x1f4, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO1_31 */ 361 >; 362 bootph-all; 363 }; 364 365 usr_led_pins_default: usr-led-default-pins { 366 pinctrl-single,pins = < 367 AM62DX_IOPAD(0x0244, PIN_INPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */ 368 >; 369 }; 370}; 371 372&mcu_gpio0 { 373 status = "okay"; 374}; 375 376&main_i2c0 { 377 pinctrl-names = "default"; 378 pinctrl-0 = <&main_i2c0_pins_default>; 379 clock-frequency = <400000>; 380 bootph-all; 381 status = "okay"; 382 383 typec_pd0: usb-power-controller@3f { 384 compatible = "ti,tps6598x"; 385 reg = <0x3f>; 386 387 connector { 388 compatible = "usb-c-connector"; 389 label = "USB-C"; 390 self-powered; 391 data-role = "dual"; 392 power-role = "sink"; 393 port { 394 usb_con_hs: endpoint { 395 remote-endpoint = <&usb0_hs_ep>; 396 }; 397 }; 398 }; 399 }; 400 401 exp1: gpio@22 { 402 compatible = "ti,tca6424"; 403 reg = <0x22>; 404 gpio-controller; 405 #gpio-cells = <2>; 406 interrupt-parent = <&main_gpio1>; 407 interrupts = <23 IRQ_TYPE_EDGE_FALLING>; 408 interrupt-controller; 409 #interrupt-cells = <2>; 410 pinctrl-names = "default"; 411 pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; 412 bootph-all; 413 414 gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", 415 "","MMC1_SD_EN", 416 "VPP_EN", "GPIO_DIX_RST", 417 "IO_EXP_OPT_EN", "DIX_INT", 418 "GPIO_eMMC_RSTn", "CPLD2_DONE", 419 "CPLD2_INTN", "CPLD1_DONE", 420 "CPLD1_INTN", "USB_TYPEA_OC_INDICATION", 421 "PCM1_INT", "PCM2_INT", 422 "GPIO_PCM1_RST", "TEST_GPIO2", 423 "GPIO_PCM2_RST", "", 424 "IO_MCAN0_STB", "IO_MCAN1_STB", 425 "PD_I2C_IRQ", "IO_EXP_TEST_LED"; 426 }; 427 428 exp2: gpio@20 { 429 compatible = "ti,tca6416"; 430 reg = <0x20>; 431 gpio-controller; 432 #gpio-cells = <2>; 433 434 gpio-line-names = "PCM6240_BUF_IO_EN", "", 435 "CPLD1_JTAGENB", "CPLD1_PROGRAMN", 436 "CPLD2_JTAGENB", "CPLD2_PROGRAMN", 437 "", "", 438 "", "CPLD1_TCK", 439 "CPLD1_TMS", "CPLD1_TDI", 440 "CPLD1_TDO", "CPLD2_TCK", 441 "CPLD2_TMS", "CPLD2_TDI", 442 "CPLD2_TDO", "ADDR1_IO_EXP", 443 "SoC_I2C0_SCL", "SoC_I2C0_SDA"; 444 }; 445}; 446 447&main_i2c1 { 448 pinctrl-names = "default"; 449 pinctrl-0 = <&main_i2c1_pins_default>; 450 clock-frequency = <100000>; 451 status = "okay"; 452}; 453 454&main_i2c2 { 455 pinctrl-names = "default"; 456 pinctrl-0 = <&main_i2c2_pins_default>; 457 clock-frequency = <400000>; 458 status = "okay"; 459}; 460 461&sdhci0 { 462 /* eMMC */ 463 non-removable; 464 pinctrl-names = "default"; 465 pinctrl-0 = <&main_mmc0_pins_default>; 466 bootph-all; 467 status = "okay"; 468}; 469 470&sdhci1 { 471 /* SD/MMC */ 472 vmmc-supply = <&vdd_mmc1>; 473 vqmmc-supply = <&vddshv_sdio>; 474 pinctrl-names = "default"; 475 pinctrl-0 = <&main_mmc1_pins_default>; 476 disable-wp; 477 bootph-all; 478 status = "okay"; 479}; 480 481&main_gpio0 { 482 bootph-all; 483 status = "okay"; 484}; 485 486&main_gpio1 { 487 bootph-all; 488 status = "okay"; 489}; 490 491&main_gpio_intr { 492 status = "okay"; 493}; 494 495&main_uart0 { 496 pinctrl-names = "default"; 497 pinctrl-0 = <&main_uart0_pins_default>; 498 bootph-all; 499 status = "okay"; 500}; 501 502&usb0 { 503 usb-role-switch; 504 505 port { 506 usb0_hs_ep: endpoint { 507 remote-endpoint = <&usb_con_hs>; 508 }; 509 }; 510}; 511 512&cpsw3g { 513 pinctrl-names = "default"; 514 pinctrl-0 = <&main_rgmii1_pins_default>, 515 <&main_rgmii2_pins_default>; 516 status = "okay"; 517 518 cpts@3d000 { 519 /* MAP HW3_TS_PUSH to GENF1 */ 520 ti,pps = <2 1>; 521 }; 522}; 523 524&cpsw_port1 { 525 phy-mode = "rgmii-id"; 526 phy-handle = <&cpsw3g_phy0>; 527 status = "okay"; 528}; 529 530&cpsw_port2 { 531 phy-mode = "rgmii-id"; 532 phy-handle = <&cpsw3g_phy1>; 533 status = "okay"; 534}; 535 536&cpsw3g_mdio { 537 pinctrl-names = "default"; 538 pinctrl-0 = <&main_mdio0_pins_default>; 539 status = "okay"; 540 541 cpsw3g_phy0: ethernet-phy@0 { 542 reg = <0>; 543 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 544 ti,min-output-impedance; 545 }; 546 547 cpsw3g_phy1: ethernet-phy@3 { 548 reg = <3>; 549 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 550 ti,min-output-impedance; 551 }; 552}; 553 554&mailbox0_cluster0 { 555 status = "okay"; 556 557 mbox_r5_0: mbox-r5-0 { 558 ti,mbox-rx = <0 0 0>; 559 ti,mbox-tx = <1 0 0>; 560 }; 561}; 562 563&mailbox0_cluster1 { 564 status = "okay"; 565 566 mbox_c7x_0: mbox-c7x-0 { 567 ti,mbox-rx = <0 0 0>; 568 ti,mbox-tx = <1 0 0>; 569 }; 570}; 571 572&mailbox0_cluster2 { 573 status = "okay"; 574 575 mbox_mcu_r5_0: mbox-mcu-r5-0 { 576 ti,mbox-rx = <0 0 0>; 577 ti,mbox-tx = <1 0 0>; 578 }; 579}; 580 581&wkup_r5fss0 { 582 status = "okay"; 583}; 584 585&wkup_r5fss0_core0 { 586 mboxes = <&mailbox0_cluster0 &mbox_r5_0>; 587 memory-region = <&wkup_r5fss0_core0_dma_memory_region>, 588 <&wkup_r5fss0_core0_memory_region>; 589 bootph-pre-ram; 590}; 591 592&mcu_r5fss0 { 593 status = "okay"; 594}; 595 596&mcu_r5fss0_core0 { 597 mboxes = <&mailbox0_cluster2 &mbox_mcu_r5_0>; 598 memory-region = <&mcu_r5fss0_core0_dma_memory_region>, 599 <&mcu_r5fss0_core0_memory_region>; 600 firmware-name = "am62d-mcu-r5f0_0-fw"; 601 status = "okay"; 602}; 603 604&c7x_0 { 605 mboxes = <&mailbox0_cluster1 &mbox_c7x_0>; 606 memory-region = <&c7x_0_dma_memory_region>, 607 <&c7x_0_memory_region>; 608 firmware-name = "am62d-c71_0-fw"; 609 status = "okay"; 610}; 611 612/* main_rti4 is used by C7x DSP */ 613&main_rti4 { 614 status = "reserved"; 615}; 616