1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/ 4 * Copyright (c) 2023-2026 TQ-Systems GmbH <linux@ew.tq-group.com>, D-82229 Seefeld, Germany. 5 * Author: Nora Schiffer 6 */ 7 8#include "k3-am625.dtsi" 9 10/ { 11 aliases { 12 i2c0 = &main_i2c0; 13 mmc0 = &sdhci0; 14 spi0 = &ospi0; 15 }; 16 17 memory@80000000 { 18 device_type = "memory"; 19 /* 1G RAM */ 20 reg = <0x00000000 0x80000000 0x00000000 0x40000000>; 21 bootph-pre-ram; 22 }; 23 24 reserved_memory: reserved-memory { 25 #address-cells = <2>; 26 #size-cells = <2>; 27 ranges; 28 29 ramoops@9c700000 { 30 compatible = "ramoops"; 31 reg = <0x00 0x9c700000 0x00 0x00100000>; 32 record-size = <0x8000>; 33 console-size = <0x8000>; 34 ftrace-size = <0x00>; 35 pmsg-size = <0x8000>; 36 }; 37 38 /* global cma region */ 39 linux,cma { 40 compatible = "shared-dma-pool"; 41 reusable; 42 size = <0x00 0x8000000>; 43 linux,cma-default; 44 }; 45 46 rtos_ipc_memory_region: memory@9c800000 { 47 compatible = "shared-dma-pool"; 48 reg = <0x00 0x9c800000 0x00 0x00300000>; 49 no-map; 50 }; 51 52 wkup_r5fss0_core0_dma_memory_region: memory@9da00000 { 53 compatible = "shared-dma-pool"; 54 reg = <0x00 0x9da00000 0x00 0x100000>; 55 no-map; 56 }; 57 58 wkup_r5fss0_core0_memory_region: memory@9db00000 { 59 compatible = "shared-dma-pool"; 60 reg = <0x00 0x9db00000 0x00 0xc00000>; 61 no-map; 62 }; 63 64 secure_tfa_ddr: tfa@9e780000 { 65 reg = <0x00 0x9e780000 0x00 0x80000>; 66 alignment = <0x1000>; 67 no-map; 68 }; 69 70 secure_ddr: optee@9e800000 { 71 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 72 alignment = <0x1000>; 73 no-map; 74 }; 75 }; 76 77 reg_3v3: regulator-3v3 { 78 compatible = "regulator-fixed"; 79 regulator-name = "V_3V3"; 80 regulator-min-microvolt = <3300000>; 81 regulator-max-microvolt = <3300000>; 82 regulator-always-on; 83 regulator-boot-on; 84 }; 85 86 reg_sd: regulator-sd { 87 /* Output of TPS6521902RSM */ 88 compatible = "regulator-gpio"; 89 regulator-name = "V_VDDSHV5"; 90 regulator-min-microvolt = <1800000>; 91 regulator-max-microvolt = <3300000>; 92 regulator-boot-on; 93 vin-supply = <®_ldo1>; 94 states = <1800000 0x0>, 95 <3300000 0x1>; 96 /* Controlling GPIO set by base board */ 97 status = "disabled"; 98 }; 99}; 100 101&main_i2c0 { 102 pinctrl-names = "default"; 103 pinctrl-0 = <&main_i2c0_pins>; 104 clock-frequency = <400000>; 105 bootph-pre-ram; 106 status = "okay"; 107 108 tps65219: pmic@30 { 109 compatible = "ti,tps65219"; 110 reg = <0x30>; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&pmic_irq_pins>; 113 interrupt-parent = <&gic500>; 114 interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; 115 interrupt-controller; 116 #interrupt-cells = <1>; 117 buck1-supply = <®_3v3>; 118 buck2-supply = <®_3v3>; 119 buck3-supply = <®_3v3>; 120 ldo1-supply = <®_3v3>; 121 ldo2-supply = <®_buck2>; 122 ldo3-supply = <®_3v3>; 123 ldo4-supply = <®_3v3>; 124 system-power-controller; 125 ti,power-button; 126 127 regulators { 128 reg_buck1: buck1 { 129 regulator-name = "V_VDD_CORE"; 130 regulator-min-microvolt = <750000>; 131 regulator-max-microvolt = <750000>; 132 regulator-boot-on; 133 regulator-always-on; 134 }; 135 136 reg_buck2: buck2 { 137 regulator-name = "V_1V8"; 138 regulator-min-microvolt = <1800000>; 139 regulator-max-microvolt = <1800000>; 140 regulator-boot-on; 141 regulator-always-on; 142 }; 143 144 reg_buck3: buck3 { 145 regulator-name = "V_1V1"; 146 regulator-min-microvolt = <1100000>; 147 regulator-max-microvolt = <1100000>; 148 regulator-boot-on; 149 regulator-always-on; 150 }; 151 152 reg_ldo1: ldo1 { 153 /* Actual voltage of LDO1 is controlled by GPIO, see reg_sd */ 154 regulator-name = "V_VDDSHV5_3V3"; 155 regulator-min-microvolt = <3300000>; 156 regulator-max-microvolt = <3300000>; 157 regulator-allow-bypass; 158 regulator-boot-on; 159 regulator-always-on; 160 }; 161 162 reg_ldo2: ldo2 { 163 regulator-name = "V_0V85"; 164 regulator-min-microvolt = <850000>; 165 regulator-max-microvolt = <850000>; 166 regulator-boot-on; 167 regulator-always-on; 168 }; 169 170 reg_ldo3: ldo3 { 171 regulator-name = "V_1V8A"; 172 regulator-min-microvolt = <1800000>; 173 regulator-max-microvolt = <1800000>; 174 regulator-boot-on; 175 regulator-always-on; 176 }; 177 178 reg_ldo4: ldo4 { 179 /* Unused */ 180 regulator-name = "V_VLDO4"; 181 regulator-boot-on; 182 }; 183 }; 184 }; 185 186 tmp1075: temperature-sensor@4a { 187 compatible = "ti,tmp1075"; 188 reg = <0x4a>; 189 vs-supply = <®_buck2>; 190 }; 191 192 eeprom0: eeprom@50 { 193 compatible = "st,24c02", "atmel,24c02"; 194 reg = <0x50>; 195 vcc-supply = <®_buck2>; 196 pagesize = <16>; 197 read-only; 198 bootph-pre-ram; 199 }; 200 201 pcf85063: rtc@51 { 202 compatible = "nxp,pcf85063a"; 203 reg = <0x51>; 204 quartz-load-femtofarads = <12500>; 205 }; 206 207 eeprom1: eeprom@54 { 208 compatible = "st,24c64", "atmel,24c64"; 209 reg = <0x54>; 210 vcc-supply = <®_buck2>; 211 pagesize = <32>; 212 }; 213}; 214 215&a53_opp_table { 216 opp-1400000000 { 217 opp-hz = /bits/ 64 <1400000000>; 218 opp-supported-hw = <0x01 0x0004>; 219 opp-suspend; 220 clock-latency-ns = <6000000>; 221 /* 222 * Enabled by bootloader if supported. The PMIC configuration 223 * will be adjusted accordingly, as a higher core voltage is 224 * required for 1400MHz operation. 225 */ 226 status = "disabled"; 227 }; 228}; 229 230&ospi0 { 231 pinctrl-names = "default"; 232 pinctrl-0 = <&ospi0_pins>; 233 bootph-all; 234 status = "okay"; 235 236 flash@0 { 237 compatible = "jedec,spi-nor"; 238 reg = <0x0>; 239 vcc-supply = <®_buck2>; 240 spi-tx-bus-width = <8>; 241 spi-rx-bus-width = <8>; 242 spi-max-frequency = <84000000>; 243 bootph-all; 244 cdns,tshsl-ns = <60>; 245 cdns,tsd2d-ns = <60>; 246 cdns,tchsh-ns = <60>; 247 cdns,tslch-ns = <60>; 248 cdns,read-delay = <2>; 249 250 partitions { 251 compatible = "fixed-partitions"; 252 #address-cells = <1>; 253 #size-cells = <1>; 254 255 /* Filled by bootloader */ 256 }; 257 }; 258}; 259 260&sdhci0 { 261 pinctrl-names = "default"; 262 pinctrl-0 = <&main_mmc0_pins>; 263 non-removable; 264 disable-wp; 265 no-sd; 266 no-sdio; 267 bootph-all; 268 ti,driver-strength-ohm = <50>; 269 status = "okay"; 270}; 271 272&wkup_rtc0 { 273 /* 274 * Erratum i2327: We can't guarantee that the TQMa62xx will boot fast 275 * enough for U-Boot to apply the workaround within one second after 276 * power-on. Keep the RTC disabled to avoid RTC interrupt issues. 277 * 278 * The external RTC of the TQMa62xx should be used instead. 279 * 280 * If needed, the RTC can be enabled in a baseboard DTS, as long as 281 * boot is fast enough on all relevant boot media. 282 */ 283 status = "disabled"; 284}; 285 286&main_pmx0 { 287 main_i2c0_pins: main-i2c0-pins { 288 pinctrl-single,pins = < 289 /* (B16) I2C0_SCL */ 290 AM62X_IOPAD(0x1e0, PIN_INPUT, 0) 291 /* (A16) I2C0_SDA */ 292 AM62X_IOPAD(0x1e4, PIN_INPUT, 0) 293 >; 294 bootph-pre-ram; 295 }; 296 297 main_mmc0_pins: main-mmc0-pins { 298 pinctrl-single,pins = < 299 /* (Y3) MMC0_CMD */ 300 AM62X_IOPAD(0x220, PIN_INPUT, 0) 301 /* (AB1) MMC0_CLK */ 302 AM62X_IOPAD(0x218, PIN_INPUT, 0) 303 /* (AA2) MMC0_DAT0 */ 304 AM62X_IOPAD(0x214, PIN_INPUT, 0) 305 /* (AA1) MMC0_DAT1 */ 306 AM62X_IOPAD(0x210, PIN_INPUT, 0) 307 /* (AA3) MMC0_DAT2 */ 308 AM62X_IOPAD(0x20c, PIN_INPUT, 0) 309 /* (Y4) MMC0_DAT3 */ 310 AM62X_IOPAD(0x208, PIN_INPUT, 0) 311 /* (AB2) MMC0_DAT4 */ 312 AM62X_IOPAD(0x204, PIN_INPUT, 0) 313 /* (AC1) MMC0_DAT5 */ 314 AM62X_IOPAD(0x200, PIN_INPUT, 0) 315 /* (AD2) MMC0_DAT6 */ 316 AM62X_IOPAD(0x1fc, PIN_INPUT, 0) 317 /* (AC2) MMC0_DAT7 */ 318 AM62X_IOPAD(0x1f8, PIN_INPUT, 0) 319 >; 320 bootph-all; 321 }; 322 323 ospi0_pins: ospi0-pins { 324 pinctrl-single,pins = < 325 /* (H24) OSPI0_CLK */ 326 AM62X_IOPAD(0x000, PIN_OUTPUT, 0) 327 /* (F23) OSPI0_CSn0 */ 328 AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) 329 /* (E25) OSPI0_D0 */ 330 AM62X_IOPAD(0x00c, PIN_INPUT, 0) 331 /* (G24) OSPI0_D1 */ 332 AM62X_IOPAD(0x010, PIN_INPUT, 0) 333 /* (F25) OSPI0_D2 */ 334 AM62X_IOPAD(0x014, PIN_INPUT, 0) 335 /* (F24) OSPI0_D3 */ 336 AM62X_IOPAD(0x018, PIN_INPUT, 0) 337 /* (J23) OSPI0_D4 */ 338 AM62X_IOPAD(0x01c, PIN_INPUT, 0) 339 /* (J25) OSPI0_D5 */ 340 AM62X_IOPAD(0x020, PIN_INPUT, 0) 341 /* (H25) OSPI0_D6 */ 342 AM62X_IOPAD(0x024, PIN_INPUT, 0) 343 /* (J22) OSPI0_D7 */ 344 AM62X_IOPAD(0x028, PIN_INPUT, 0) 345 /* (J24) OSPI0_DQS */ 346 AM62X_IOPAD(0x008, PIN_INPUT, 0) 347 /* (G25) OSPI0_LBCLKO */ 348 AM62X_IOPAD(0x004, PIN_INPUT, 0) 349 >; 350 }; 351 352 pmic_irq_pins: pmic-irq-pins { 353 pinctrl-single,pins = < 354 /* (D16) EXTINTn */ 355 AM62X_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0) 356 >; 357 }; 358}; 359 360#include "k3-am62-ti-ipc-firmware.dtsi" 361