xref: /linux/scripts/dtc/include-prefixes/arm64/ti/k3-am62-ti-ipc-firmware.dtsi (revision 4f38da1f027ea2c9f01bb71daa7a299c191b6940)
1// SPDX-License-Identifier: GPL-2.0-only OR MIT
2/**
3 * Device Tree Source for enabling IPC using TI SDK firmware on AM62 SoCs
4 *
5 * Copyright (C) 2021-2025 Texas Instruments Incorporated - https://www.ti.com/
6 */
7
8&reserved_memory {
9	mcu_m4fss_dma_memory_region: memory@9cb00000 {
10		compatible = "shared-dma-pool";
11		reg = <0x00 0x9cb00000 0x00 0x100000>;
12		no-map;
13	};
14
15	mcu_m4fss_memory_region: memory@9cc00000 {
16		compatible = "shared-dma-pool";
17		reg = <0x00 0x9cc00000 0x00 0xe00000>;
18		no-map;
19	};
20};
21
22&mailbox0_cluster0 {
23	status = "okay";
24
25	mbox_m4_0: mbox-m4-0 {
26		ti,mbox-rx = <0 0 0>;
27		ti,mbox-tx = <1 0 0>;
28	};
29
30	mbox_r5_0: mbox-r5-0 {
31		ti,mbox-rx = <2 0 0>;
32		ti,mbox-tx = <3 0 0>;
33	};
34};
35
36&mcu_m4fss {
37	mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
38	memory-region = <&mcu_m4fss_dma_memory_region>,
39			<&mcu_m4fss_memory_region>;
40	status = "okay";
41};
42
43&wkup_r5fss0 {
44	status = "okay";
45};
46
47&wkup_r5fss0_core0 {
48	mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
49	memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
50			<&wkup_r5fss0_core0_memory_region>;
51	status = "okay";
52};
53