1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/leds/common.h> 7#include <dt-bindings/soc/rockchip,vop2.h> 8#include "rk3588.dtsi" 9 10/ { 11 aliases { 12 mmc0 = &sdhci; 13 mmc1 = &sdmmc; 14 mmc2 = &sdio; 15 }; 16 17 chosen { 18 stdout-path = "serial2:1500000n8"; 19 }; 20 21 hdmi0-con { 22 compatible = "hdmi-connector"; 23 type = "a"; 24 25 port { 26 hdmi0_con_in: endpoint { 27 remote-endpoint = <&hdmi0_out_con>; 28 }; 29 }; 30 }; 31 32 hdmi1-con { 33 compatible = "hdmi-connector"; 34 type = "a"; 35 36 port { 37 hdmi1_con_in: endpoint { 38 remote-endpoint = <&hdmi1_out_con>; 39 }; 40 }; 41 }; 42 43 fan: pwm-fan { 44 compatible = "pwm-fan"; 45 cooling-levels = <0 120 150 180 210 240 255>; 46 fan-supply = <&vcc5v0_sys>; 47 pwms = <&pwm1 0 50000 0>; 48 #cooling-cells = <2>; 49 }; 50 51 rfkill-bt { 52 compatible = "rfkill-gpio"; 53 label = "rfkill-m2-bt"; 54 radio-type = "bluetooth"; 55 shutdown-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; 56 }; 57 58 vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 { 59 compatible = "regulator-fixed"; 60 enable-active-high; 61 regulator-name = "vcc3v3_pcie2x1l0"; 62 regulator-always-on; 63 regulator-boot-on; 64 regulator-min-microvolt = <3300000>; 65 regulator-max-microvolt = <3300000>; 66 startup-delay-us = <50000>; 67 vin-supply = <&vcc5v0_sys>; 68 status = "disabled"; 69 }; 70 71 vcc3v3_pcie2x1l2: regulator-vcc3v3-pcie2x1l2 { 72 compatible = "regulator-fixed"; 73 regulator-name = "vcc3v3_pcie2x1l2"; 74 regulator-min-microvolt = <3300000>; 75 regulator-max-microvolt = <3300000>; 76 startup-delay-us = <5000>; 77 vin-supply = <&vcc_3v3_s3>; 78 }; 79 80 vcc3v3_pcie30: regulator-vcc3v3-pcie30 { 81 compatible = "regulator-fixed"; 82 enable-active-high; 83 gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; 84 pinctrl-names = "default"; 85 pinctrl-0 = <&pcie3_vcc3v3_en>; 86 regulator-name = "vcc3v3_pcie30"; 87 regulator-min-microvolt = <3300000>; 88 regulator-max-microvolt = <3300000>; 89 startup-delay-us = <5000>; 90 vin-supply = <&vcc5v0_sys>; 91 }; 92 93 vcc5v0_host: regulator-vcc5v0-host { 94 compatible = "regulator-fixed"; 95 regulator-name = "vcc5v0_host"; 96 regulator-boot-on; 97 regulator-always-on; 98 regulator-min-microvolt = <5000000>; 99 regulator-max-microvolt = <5000000>; 100 vin-supply = <&vcc5v0_sys>; 101 }; 102 103 vcc5v0_sys: regulator-vcc5v0-sys { 104 compatible = "regulator-fixed"; 105 regulator-name = "vcc5v0_sys"; 106 regulator-always-on; 107 regulator-boot-on; 108 regulator-min-microvolt = <5000000>; 109 regulator-max-microvolt = <5000000>; 110 }; 111 112 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 113 compatible = "regulator-fixed"; 114 regulator-name = "vcc_1v1_nldo_s3"; 115 regulator-always-on; 116 regulator-boot-on; 117 regulator-min-microvolt = <1100000>; 118 regulator-max-microvolt = <1100000>; 119 vin-supply = <&vcc5v0_sys>; 120 }; 121}; 122 123&combphy0_ps { 124 status = "okay"; 125}; 126 127&combphy1_ps { 128 status = "okay"; 129}; 130 131&combphy2_psu { 132 status = "okay"; 133}; 134 135&cpu_b0 { 136 cpu-supply = <&vdd_cpu_big0_s0>; 137}; 138 139&cpu_b1 { 140 cpu-supply = <&vdd_cpu_big0_s0>; 141}; 142 143&cpu_b2 { 144 cpu-supply = <&vdd_cpu_big1_s0>; 145}; 146 147&cpu_b3 { 148 cpu-supply = <&vdd_cpu_big1_s0>; 149}; 150 151&cpu_l0 { 152 cpu-supply = <&vdd_cpu_lit_s0>; 153}; 154 155&cpu_l1 { 156 cpu-supply = <&vdd_cpu_lit_s0>; 157}; 158 159&cpu_l2 { 160 cpu-supply = <&vdd_cpu_lit_s0>; 161}; 162 163&cpu_l3 { 164 cpu-supply = <&vdd_cpu_lit_s0>; 165}; 166 167&gpu { 168 mali-supply = <&vdd_gpu_s0>; 169 status = "okay"; 170}; 171 172&hdmi0 { 173 status = "okay"; 174}; 175 176&hdmi0_in { 177 hdmi0_in_vp0: endpoint { 178 remote-endpoint = <&vp0_out_hdmi0>; 179 }; 180}; 181 182&hdmi0_out { 183 hdmi0_out_con: endpoint { 184 remote-endpoint = <&hdmi0_con_in>; 185 }; 186}; 187 188&hdmi0_sound { 189 status = "okay"; 190}; 191 192&hdmi1 { 193 pinctrl-0 = <&hdmim0_tx1_cec &hdmim0_tx1_hpd 194 &hdmim1_tx1_scl &hdmim1_tx1_sda>; 195 status = "okay"; 196}; 197 198&hdmi1_in { 199 hdmi1_in_vp1: endpoint { 200 remote-endpoint = <&vp1_out_hdmi1>; 201 }; 202}; 203 204&hdmi1_out { 205 hdmi1_out_con: endpoint { 206 remote-endpoint = <&hdmi1_con_in>; 207 }; 208}; 209 210&hdmi1_sound { 211 status = "okay"; 212}; 213 214&hdmi_receiver_cma { 215 status = "okay"; 216}; 217 218&hdmi_receiver { 219 pinctrl-0 = <&hdmim1_rx_cec &hdmim1_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda &hdmirx_hpd>; 220 pinctrl-names = "default"; 221}; 222 223&hdptxphy0 { 224 status = "okay"; 225}; 226 227&hdptxphy1 { 228 status = "okay"; 229}; 230 231&i2c0 { 232 pinctrl-names = "default"; 233 pinctrl-0 = <&i2c0m2_xfer>; 234 status = "okay"; 235 236 vdd_cpu_big0_s0: regulator@42 { 237 compatible = "rockchip,rk8602"; 238 reg = <0x42>; 239 fcs,suspend-voltage-selector = <1>; 240 regulator-name = "vdd_cpu_big0_s0"; 241 regulator-always-on; 242 regulator-boot-on; 243 regulator-min-microvolt = <550000>; 244 regulator-max-microvolt = <1050000>; 245 regulator-ramp-delay = <2300>; 246 vin-supply = <&vcc5v0_sys>; 247 248 regulator-state-mem { 249 regulator-off-in-suspend; 250 }; 251 }; 252 253 vdd_cpu_big1_s0: regulator@43 { 254 compatible = "rockchip,rk8603", "rockchip,rk8602"; 255 reg = <0x43>; 256 fcs,suspend-voltage-selector = <1>; 257 regulator-name = "vdd_cpu_big1_s0"; 258 regulator-always-on; 259 regulator-boot-on; 260 regulator-min-microvolt = <550000>; 261 regulator-max-microvolt = <1050000>; 262 regulator-ramp-delay = <2300>; 263 vin-supply = <&vcc5v0_sys>; 264 265 regulator-state-mem { 266 regulator-off-in-suspend; 267 }; 268 }; 269}; 270 271&i2c6 { 272 status = "okay"; 273 274 hym8563: rtc@51 { 275 compatible = "haoyu,hym8563"; 276 reg = <0x51>; 277 #clock-cells = <0>; 278 clock-output-names = "hym8563"; 279 pinctrl-names = "default"; 280 pinctrl-0 = <&hym8563_int>; 281 interrupt-parent = <&gpio0>; 282 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 283 wakeup-source; 284 }; 285}; 286 287&i2c7 { 288 status = "okay"; 289 290 es8316: audio-codec@11 { 291 compatible = "everest,es8316"; 292 reg = <0x11>; 293 clocks = <&cru I2S0_8CH_MCLKOUT>; 294 clock-names = "mclk"; 295 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; 296 assigned-clock-rates = <12288000>; 297 #sound-dai-cells = <0>; 298 299 port { 300 es8316_p0_0: endpoint { 301 remote-endpoint = <&i2s0_8ch_p0_0>; 302 }; 303 }; 304 }; 305}; 306 307&i2s0_8ch { 308 pinctrl-names = "default"; 309 pinctrl-0 = <&i2s0_lrck 310 &i2s0_mclk 311 &i2s0_sclk 312 &i2s0_sdi0 313 &i2s0_sdo0>; 314 status = "okay"; 315 316 i2s0_8ch_p0: port { 317 i2s0_8ch_p0_0: endpoint { 318 dai-format = "i2s"; 319 mclk-fs = <256>; 320 remote-endpoint = <&es8316_p0_0>; 321 }; 322 }; 323}; 324 325&i2s5_8ch { 326 status = "okay"; 327}; 328 329&i2s6_8ch { 330 status = "okay"; 331}; 332 333&package_thermal { 334 polling-delay = <1000>; 335 336 trips { 337 package_fan0: package-fan0 { 338 temperature = <55000>; 339 hysteresis = <2000>; 340 type = "active"; 341 }; 342 343 package_fan1: package-fan1 { 344 temperature = <65000>; 345 hysteresis = <2000>; 346 type = "active"; 347 }; 348 }; 349 350 cooling-maps { 351 map0 { 352 trip = <&package_fan0>; 353 cooling-device = <&fan THERMAL_NO_LIMIT 1>; 354 }; 355 356 map1 { 357 trip = <&package_fan1>; 358 cooling-device = <&fan 2 THERMAL_NO_LIMIT>; 359 }; 360 }; 361}; 362 363&pcie2x1l0 { 364 pinctrl-names = "default"; 365 pinctrl-0 = <&pcie2_0_rst>; 366 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 367 vpcie3v3-supply = <&vcc3v3_pcie2x1l0>; 368 status = "okay"; 369}; 370 371&pcie2x1l2 { 372 pinctrl-names = "default"; 373 pinctrl-0 = <&pcie2_2_rst>; 374 reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; 375 vpcie3v3-supply = <&vcc3v3_pcie2x1l2>; 376 status = "okay"; 377}; 378 379&pcie30phy { 380 status = "okay"; 381}; 382 383&pcie3x4 { 384 pinctrl-names = "default"; 385 pinctrl-0 = <&pcie3_rst>; 386 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 387 vpcie3v3-supply = <&vcc3v3_pcie30>; 388 status = "okay"; 389}; 390 391&pd_gpu { 392 domain-supply = <&vdd_gpu_s0>; 393}; 394 395&pinctrl { 396 hym8563 { 397 hym8563_int: hym8563-int { 398 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 399 }; 400 }; 401 402 pcie2 { 403 pcie2_0_rst: pcie2-0-rst { 404 rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 405 }; 406 407 pcie2_2_rst: pcie2-2-rst { 408 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 409 }; 410 }; 411 412 pcie3 { 413 pcie3_rst: pcie3-rst { 414 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 415 }; 416 417 pcie3_vcc3v3_en: pcie3-vcc3v3-en { 418 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 419 }; 420 }; 421}; 422 423&pwm1 { 424 status = "okay"; 425}; 426 427&saradc { 428 vref-supply = <&avcc_1v8_s0>; 429 status = "okay"; 430}; 431 432&sdhci { 433 bus-width = <8>; 434 no-sdio; 435 no-sd; 436 non-removable; 437 mmc-hs400-1_8v; 438 mmc-hs400-enhanced-strobe; 439 status = "okay"; 440}; 441 442&sdmmc { 443 max-frequency = <200000000>; 444 no-sdio; 445 no-mmc; 446 bus-width = <4>; 447 cap-mmc-highspeed; 448 cap-sd-highspeed; 449 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 450 disable-wp; 451 sd-uhs-sdr104; 452 vmmc-supply = <&vcc_3v3_s3>; 453 vqmmc-supply = <&vccio_sd_s0>; 454 status = "okay"; 455}; 456 457&sfc { 458 pinctrl-names = "default"; 459 pinctrl-0 = <&fspim2_pins>; 460 status = "okay"; 461 462 flash@0 { 463 compatible = "jedec,spi-nor"; 464 reg = <0>; 465 spi-max-frequency = <104000000>; 466 spi-rx-bus-width = <4>; 467 spi-tx-bus-width = <1>; 468 vcc-supply = <&vcc_3v3_s3>; 469 }; 470}; 471 472&spi2 { 473 status = "okay"; 474 assigned-clocks = <&cru CLK_SPI2>; 475 assigned-clock-rates = <200000000>; 476 pinctrl-names = "default"; 477 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; 478 num-cs = <1>; 479 480 pmic@0 { 481 compatible = "rockchip,rk806"; 482 spi-max-frequency = <1000000>; 483 reg = <0x0>; 484 485 interrupt-parent = <&gpio0>; 486 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 487 488 pinctrl-names = "default"; 489 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, 490 <&rk806_dvs2_null>, <&rk806_dvs3_null>; 491 492 system-power-controller; 493 494 vcc1-supply = <&vcc5v0_sys>; 495 vcc2-supply = <&vcc5v0_sys>; 496 vcc3-supply = <&vcc5v0_sys>; 497 vcc4-supply = <&vcc5v0_sys>; 498 vcc5-supply = <&vcc5v0_sys>; 499 vcc6-supply = <&vcc5v0_sys>; 500 vcc7-supply = <&vcc5v0_sys>; 501 vcc8-supply = <&vcc5v0_sys>; 502 vcc9-supply = <&vcc5v0_sys>; 503 vcc10-supply = <&vcc5v0_sys>; 504 vcc11-supply = <&vcc_2v0_pldo_s3>; 505 vcc12-supply = <&vcc5v0_sys>; 506 vcc13-supply = <&vcc_1v1_nldo_s3>; 507 vcc14-supply = <&vcc_1v1_nldo_s3>; 508 vcca-supply = <&vcc5v0_sys>; 509 510 gpio-controller; 511 #gpio-cells = <2>; 512 513 rk806_dvs1_null: dvs1-null-pins { 514 pins = "gpio_pwrctrl1"; 515 function = "pin_fun0"; 516 }; 517 518 rk806_dvs2_null: dvs2-null-pins { 519 pins = "gpio_pwrctrl2"; 520 function = "pin_fun0"; 521 }; 522 523 rk806_dvs3_null: dvs3-null-pins { 524 pins = "gpio_pwrctrl3"; 525 function = "pin_fun0"; 526 }; 527 528 regulators { 529 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { 530 regulator-boot-on; 531 regulator-min-microvolt = <550000>; 532 regulator-max-microvolt = <950000>; 533 regulator-ramp-delay = <12500>; 534 regulator-name = "vdd_gpu_s0"; 535 regulator-enable-ramp-delay = <400>; 536 537 regulator-state-mem { 538 regulator-off-in-suspend; 539 }; 540 }; 541 542 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { 543 regulator-always-on; 544 regulator-boot-on; 545 regulator-min-microvolt = <550000>; 546 regulator-max-microvolt = <950000>; 547 regulator-ramp-delay = <12500>; 548 regulator-name = "vdd_cpu_lit_s0"; 549 550 regulator-state-mem { 551 regulator-off-in-suspend; 552 }; 553 }; 554 555 vdd_log_s0: dcdc-reg3 { 556 regulator-always-on; 557 regulator-boot-on; 558 regulator-min-microvolt = <675000>; 559 regulator-max-microvolt = <750000>; 560 regulator-ramp-delay = <12500>; 561 regulator-name = "vdd_log_s0"; 562 563 regulator-state-mem { 564 regulator-off-in-suspend; 565 regulator-suspend-microvolt = <750000>; 566 }; 567 }; 568 569 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { 570 regulator-always-on; 571 regulator-boot-on; 572 regulator-min-microvolt = <550000>; 573 regulator-max-microvolt = <950000>; 574 regulator-ramp-delay = <12500>; 575 regulator-name = "vdd_vdenc_s0"; 576 577 regulator-state-mem { 578 regulator-off-in-suspend; 579 }; 580 }; 581 582 vdd_ddr_s0: dcdc-reg5 { 583 regulator-always-on; 584 regulator-boot-on; 585 regulator-min-microvolt = <675000>; 586 regulator-max-microvolt = <900000>; 587 regulator-ramp-delay = <12500>; 588 regulator-name = "vdd_ddr_s0"; 589 590 regulator-state-mem { 591 regulator-off-in-suspend; 592 regulator-suspend-microvolt = <850000>; 593 }; 594 }; 595 596 vdd2_ddr_s3: dcdc-reg6 { 597 regulator-always-on; 598 regulator-boot-on; 599 regulator-name = "vdd2_ddr_s3"; 600 601 regulator-state-mem { 602 regulator-on-in-suspend; 603 }; 604 }; 605 606 vcc_2v0_pldo_s3: dcdc-reg7 { 607 regulator-always-on; 608 regulator-boot-on; 609 regulator-min-microvolt = <2000000>; 610 regulator-max-microvolt = <2000000>; 611 regulator-ramp-delay = <12500>; 612 regulator-name = "vdd_2v0_pldo_s3"; 613 614 regulator-state-mem { 615 regulator-on-in-suspend; 616 regulator-suspend-microvolt = <2000000>; 617 }; 618 }; 619 620 vcc_3v3_s3: dcdc-reg8 { 621 regulator-always-on; 622 regulator-boot-on; 623 regulator-min-microvolt = <3300000>; 624 regulator-max-microvolt = <3300000>; 625 regulator-name = "vcc_3v3_s3"; 626 627 regulator-state-mem { 628 regulator-on-in-suspend; 629 regulator-suspend-microvolt = <3300000>; 630 }; 631 }; 632 633 vddq_ddr_s0: dcdc-reg9 { 634 regulator-always-on; 635 regulator-boot-on; 636 regulator-name = "vddq_ddr_s0"; 637 638 regulator-state-mem { 639 regulator-off-in-suspend; 640 }; 641 }; 642 643 vcc_1v8_s3: dcdc-reg10 { 644 regulator-always-on; 645 regulator-boot-on; 646 regulator-min-microvolt = <1800000>; 647 regulator-max-microvolt = <1800000>; 648 regulator-name = "vcc_1v8_s3"; 649 650 regulator-state-mem { 651 regulator-on-in-suspend; 652 regulator-suspend-microvolt = <1800000>; 653 }; 654 }; 655 656 avcc_1v8_s0: pldo-reg1 { 657 regulator-always-on; 658 regulator-boot-on; 659 regulator-min-microvolt = <1800000>; 660 regulator-max-microvolt = <1800000>; 661 regulator-name = "avcc_1v8_s0"; 662 663 regulator-state-mem { 664 regulator-off-in-suspend; 665 }; 666 }; 667 668 vcc_1v8_s0: pldo-reg2 { 669 regulator-always-on; 670 regulator-boot-on; 671 regulator-min-microvolt = <1800000>; 672 regulator-max-microvolt = <1800000>; 673 regulator-name = "vcc_1v8_s0"; 674 675 regulator-state-mem { 676 regulator-off-in-suspend; 677 regulator-suspend-microvolt = <1800000>; 678 }; 679 }; 680 681 avdd_1v2_s0: pldo-reg3 { 682 regulator-always-on; 683 regulator-boot-on; 684 regulator-min-microvolt = <1200000>; 685 regulator-max-microvolt = <1200000>; 686 regulator-name = "avdd_1v2_s0"; 687 688 regulator-state-mem { 689 regulator-off-in-suspend; 690 }; 691 }; 692 693 vcc_3v3_s0: pldo-reg4 { 694 regulator-always-on; 695 regulator-boot-on; 696 regulator-min-microvolt = <3300000>; 697 regulator-max-microvolt = <3300000>; 698 regulator-ramp-delay = <12500>; 699 regulator-name = "vcc_3v3_s0"; 700 701 regulator-state-mem { 702 regulator-off-in-suspend; 703 }; 704 }; 705 706 vccio_sd_s0: pldo-reg5 { 707 regulator-always-on; 708 regulator-boot-on; 709 regulator-min-microvolt = <1800000>; 710 regulator-max-microvolt = <3300000>; 711 regulator-ramp-delay = <12500>; 712 regulator-name = "vccio_sd_s0"; 713 714 regulator-state-mem { 715 regulator-off-in-suspend; 716 }; 717 }; 718 719 pldo6_s3: pldo-reg6 { 720 regulator-always-on; 721 regulator-boot-on; 722 regulator-min-microvolt = <1800000>; 723 regulator-max-microvolt = <1800000>; 724 regulator-name = "pldo6_s3"; 725 726 regulator-state-mem { 727 regulator-on-in-suspend; 728 regulator-suspend-microvolt = <1800000>; 729 }; 730 }; 731 732 vdd_0v75_s3: nldo-reg1 { 733 regulator-always-on; 734 regulator-boot-on; 735 regulator-min-microvolt = <750000>; 736 regulator-max-microvolt = <750000>; 737 regulator-name = "vdd_0v75_s3"; 738 739 regulator-state-mem { 740 regulator-on-in-suspend; 741 regulator-suspend-microvolt = <750000>; 742 }; 743 }; 744 745 vdd_ddr_pll_s0: nldo-reg2 { 746 regulator-always-on; 747 regulator-boot-on; 748 regulator-min-microvolt = <850000>; 749 regulator-max-microvolt = <850000>; 750 regulator-name = "vdd_ddr_pll_s0"; 751 752 regulator-state-mem { 753 regulator-off-in-suspend; 754 regulator-suspend-microvolt = <850000>; 755 }; 756 }; 757 758 avdd_0v75_s0: nldo-reg3 { 759 regulator-always-on; 760 regulator-boot-on; 761 regulator-min-microvolt = <750000>; 762 regulator-max-microvolt = <750000>; 763 regulator-name = "avdd_0v75_s0"; 764 765 regulator-state-mem { 766 regulator-off-in-suspend; 767 }; 768 }; 769 770 vdd_0v85_s0: nldo-reg4 { 771 regulator-always-on; 772 regulator-boot-on; 773 regulator-min-microvolt = <850000>; 774 regulator-max-microvolt = <850000>; 775 regulator-name = "vdd_0v85_s0"; 776 777 regulator-state-mem { 778 regulator-off-in-suspend; 779 }; 780 }; 781 782 vdd_0v75_s0: nldo-reg5 { 783 regulator-always-on; 784 regulator-boot-on; 785 regulator-min-microvolt = <750000>; 786 regulator-max-microvolt = <750000>; 787 regulator-name = "vdd_0v75_s0"; 788 789 regulator-state-mem { 790 regulator-off-in-suspend; 791 }; 792 }; 793 }; 794 }; 795}; 796 797&tsadc { 798 status = "okay"; 799}; 800 801&uart2 { 802 pinctrl-0 = <&uart2m0_xfer>; 803 status = "okay"; 804}; 805 806&u2phy1 { 807 status = "okay"; 808}; 809 810&u2phy1_otg { 811 status = "okay"; 812}; 813 814&u2phy2 { 815 status = "okay"; 816}; 817 818&u2phy2_host { 819 /* connected to USB hub, which is powered by vcc5v0_sys */ 820 phy-supply = <&vcc5v0_sys>; 821 status = "okay"; 822}; 823 824&u2phy3 { 825 status = "okay"; 826}; 827 828&u2phy3_host { 829 phy-supply = <&vcc5v0_host>; 830 status = "okay"; 831}; 832 833&usbdp_phy1 { 834 status = "okay"; 835}; 836 837&usb_host0_ehci { 838 status = "okay"; 839}; 840 841&usb_host0_ohci { 842 status = "okay"; 843}; 844 845&usb_host1_ehci { 846 status = "okay"; 847}; 848 849&usb_host1_ohci { 850 status = "okay"; 851}; 852 853&usb_host1_xhci { 854 dr_mode = "host"; 855 status = "okay"; 856}; 857 858&vop { 859 status = "okay"; 860}; 861 862&vop_mmu { 863 status = "okay"; 864}; 865 866&vp0 { 867 vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 868 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 869 remote-endpoint = <&hdmi0_in_vp0>; 870 }; 871}; 872 873&vp1 { 874 vp1_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { 875 reg = <ROCKCHIP_VOP2_EP_HDMI1>; 876 remote-endpoint = <&hdmi1_in_vp1>; 877 }; 878}; 879