1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2025 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/leds/common.h> 12#include <dt-bindings/pinctrl/rockchip.h> 13#include <dt-bindings/soc/rockchip,vop2.h> 14#include "rk3576.dtsi" 15 16/ { 17 model = "100ASK DshanPi A1 board"; 18 compatible = "100ask,dshanpi-a1", "rockchip,rk3576"; 19 20 aliases { 21 ethernet0 = &gmac0; 22 ethernet1 = &gmac1; 23 mmc0 = &sdhci; 24 mmc1 = &sdmmc; 25 }; 26 27 chosen { 28 stdout-path = "serial0:1500000n8"; 29 }; 30 31 es8388_sound: es8388-sound { 32 compatible = "simple-audio-card"; 33 simple-audio-card,format = "i2s"; 34 simple-audio-card,mclk-fs = <256>; 35 simple-audio-card,name = "On-board Analog ES8388"; 36 simple-audio-card,widgets = "Microphone", "Headphone Mic", 37 "Microphone", "Mic Pads", 38 "Headphone", "Headphone", 39 "Line Out", "Line Out"; 40 simple-audio-card,routing = "Headphone", "LOUT1", 41 "Headphone", "ROUT1", 42 "Line Out", "LOUT2", 43 "Line Out", "ROUT2", 44 "RINPUT1", "Headphone Mic", 45 "LINPUT2", "Mic Pads", 46 "RINPUT2", "Mic Pads"; 47 simple-audio-card,pin-switches = "Headphone", "Line Out"; 48 49 simple-audio-card,cpu { 50 sound-dai = <&sai2>; 51 }; 52 53 simple-audio-card,codec { 54 sound-dai = <&es8388>; 55 system-clock-frequency = <12288000>; 56 }; 57 }; 58 59 hdmi-con { 60 compatible = "hdmi-connector"; 61 type = "a"; 62 63 port { 64 hdmi_con_in: endpoint { 65 remote-endpoint = <&hdmi_out_con>; 66 }; 67 }; 68 }; 69 70 keys-0 { 71 compatible = "adc-keys"; 72 io-channels = <&saradc 0>; 73 io-channel-names = "buttons"; 74 keyup-threshold-microvolt = <1800000>; 75 poll-interval = <100>; 76 77 button-maskrom { 78 label = "MASKROM"; 79 linux,code = <KEY_SETUP>; 80 press-threshold-microvolt = <0>; 81 }; 82 }; 83 84 keys-1 { 85 compatible = "adc-keys"; 86 io-channels = <&saradc 1>; 87 io-channel-names = "buttons"; 88 keyup-threshold-microvolt = <1800000>; 89 poll-interval = <100>; 90 91 button-recovery { 92 label = "RECOVERY"; 93 linux,code = <KEY_VENDOR>; 94 press-threshold-microvolt = <0>; 95 }; 96 }; 97 98 keys-2 { 99 compatible = "adc-keys"; 100 io-channels = <&saradc 4>; 101 io-channel-names = "buttons"; 102 keyup-threshold-microvolt = <1800000>; 103 poll-interval = <100>; 104 105 button-user2 { 106 label = "USER2"; 107 linux,code = <BTN_2>; 108 press-threshold-microvolt = <0>; 109 }; 110 }; 111 112 keys-3 { 113 compatible = "gpio-keys"; 114 pinctrl-names = "default"; 115 pinctrl-0 = <&gpio0_a0_d>; 116 117 button-user1 { 118 gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; 119 label = "USER1"; 120 linux,code = <BTN_1>; 121 wakeup-source; 122 }; 123 }; 124 125 vcc_in: regulator-vcc-12v0-dcin { 126 compatible = "regulator-fixed"; 127 regulator-name = "vcc_in"; 128 regulator-always-on; 129 regulator-boot-on; 130 regulator-min-microvolt = <12000000>; 131 regulator-max-microvolt = <12000000>; 132 }; 133 134 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { 135 compatible = "regulator-fixed"; 136 regulator-name = "vcc_1v1_nldo_s3"; 137 regulator-always-on; 138 regulator-boot-on; 139 regulator-min-microvolt = <1100000>; 140 regulator-max-microvolt = <1100000>; 141 vin-supply = <&vcc_5v0_sys>; 142 }; 143 144 vcc_1v8_s0: regulator-vcc-1v8-s0 { 145 compatible = "regulator-fixed"; 146 regulator-name = "vcc_1v8_s0"; 147 regulator-always-on; 148 regulator-boot-on; 149 regulator-min-microvolt = <1800000>; 150 regulator-max-microvolt = <1800000>; 151 vin-supply = <&vcc_1v8_s3>; 152 }; 153 154 vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { 155 compatible = "regulator-fixed"; 156 regulator-name = "vcc_2v0_pldo_s3"; 157 regulator-always-on; 158 regulator-boot-on; 159 regulator-min-microvolt = <2000000>; 160 regulator-max-microvolt = <2000000>; 161 vin-supply = <&vcc_5v0_sys>; 162 }; 163 164 vcc_3v3_m2: regulator-vcc-3v3-m2 { 165 compatible = "regulator-fixed"; 166 regulator-name = "vcc_3v3_m2"; 167 regulator-always-on; 168 regulator-boot-on; 169 regulator-min-microvolt = <3300000>; 170 regulator-max-microvolt = <3300000>; 171 vin-supply = <&vcc_5v0_sys>; 172 }; 173 174 vcc_3v3_s0: regulator-vcc-3v3-s0 { 175 compatible = "regulator-fixed"; 176 regulator-name = "vcc_3v3_s0"; 177 regulator-always-on; 178 regulator-boot-on; 179 regulator-min-microvolt = <3300000>; 180 regulator-max-microvolt = <3300000>; 181 vin-supply = <&vcc_3v3_s3>; 182 }; 183 184 vcc_5v0_sys: regulator-vcc-5v0-sys { 185 compatible = "regulator-fixed"; 186 regulator-name = "vcc_5v0_sys"; 187 regulator-always-on; 188 regulator-boot-on; 189 regulator-min-microvolt = <5000000>; 190 regulator-max-microvolt = <5000000>; 191 vin-supply = <&vcc_in>; 192 }; 193 194 vbus5v0_typec: regulator-vbus5v0-typec { 195 compatible = "regulator-fixed"; 196 enable-active-high; 197 gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; 198 pinctrl-names = "default"; 199 pinctrl-0 = <&typec5v_pwren_h>; 200 regulator-name = "vbus5v0_typec"; 201 regulator-min-microvolt = <5000000>; 202 regulator-max-microvolt = <5000000>; 203 vin-supply = <&vcc_5v0_sys>; 204 }; 205}; 206 207&combphy0_ps { 208 status = "okay"; 209}; 210 211&combphy1_psu { 212 status = "okay"; 213}; 214 215&cpu_b0 { 216 cpu-supply = <&vdd_cpu_big_s0>; 217}; 218 219&cpu_b1 { 220 cpu-supply = <&vdd_cpu_big_s0>; 221}; 222 223&cpu_b2 { 224 cpu-supply = <&vdd_cpu_big_s0>; 225}; 226 227&cpu_b3 { 228 cpu-supply = <&vdd_cpu_big_s0>; 229}; 230 231&cpu_l0 { 232 cpu-supply = <&vdd_cpu_lit_s0>; 233}; 234 235&cpu_l1 { 236 cpu-supply = <&vdd_cpu_lit_s0>; 237}; 238 239&cpu_l2 { 240 cpu-supply = <&vdd_cpu_lit_s0>; 241}; 242 243&cpu_l3 { 244 cpu-supply = <&vdd_cpu_lit_s0>; 245}; 246 247&gmac0 { 248 clock_in_out = "output"; 249 phy-mode = "rgmii-id"; 250 phy-handle = <&rgmii_phy0>; 251 phy-supply = <&vcc_3v3_s0>; 252 pinctrl-names = "default"; 253 pinctrl-0 = <ð0m0_miim 254 ð0m0_tx_bus2 255 ð0m0_rx_bus2 256 ð0m0_rgmii_clk 257 ð0m0_rgmii_bus>; 258 status = "okay"; 259}; 260 261&gmac1 { 262 clock_in_out = "output"; 263 phy-mode = "rgmii-id"; 264 phy-handle = <&rgmii_phy1>; 265 phy-supply = <&vcc_3v3_s0>; 266 pinctrl-names = "default"; 267 pinctrl-0 = <ð1m0_miim 268 ð1m0_tx_bus2 269 ð1m0_rx_bus2 270 ð1m0_rgmii_clk 271 ð1m0_rgmii_bus>; 272 status = "okay"; 273}; 274 275&gpu { 276 mali-supply = <&vdd_gpu_s0>; 277 status = "okay"; 278}; 279 280&hdmi { 281 status = "okay"; 282}; 283 284&hdmi_in { 285 hdmi_in_vp0: endpoint { 286 remote-endpoint = <&vp0_out_hdmi>; 287 }; 288}; 289 290&hdmi_out { 291 hdmi_out_con: endpoint { 292 remote-endpoint = <&hdmi_con_in>; 293 }; 294}; 295 296&hdmi_sound { 297 status = "okay"; 298}; 299 300&hdptxphy { 301 status = "okay"; 302}; 303 304&i2c1 { 305 status = "okay"; 306 307 pmic@23 { 308 compatible = "rockchip,rk806"; 309 reg = <0x23>; 310 gpio-controller; 311 #gpio-cells = <2>; 312 interrupt-parent = <&gpio0>; 313 interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 314 pinctrl-names = "default"; 315 pinctrl-0 = <&pmic_pins 316 &rk806_dvs1_null 317 &rk806_dvs2_null 318 &rk806_dvs3_null>; 319 system-power-controller; 320 vcc1-supply = <&vcc_5v0_sys>; 321 vcc2-supply = <&vcc_5v0_sys>; 322 vcc3-supply = <&vcc_5v0_sys>; 323 vcc4-supply = <&vcc_5v0_sys>; 324 vcc5-supply = <&vcc_5v0_sys>; 325 vcc6-supply = <&vcc_5v0_sys>; 326 vcc7-supply = <&vcc_5v0_sys>; 327 vcc8-supply = <&vcc_5v0_sys>; 328 vcc9-supply = <&vcc_5v0_sys>; 329 vcc10-supply = <&vcc_5v0_sys>; 330 vcc11-supply = <&vcc_2v0_pldo_s3>; 331 vcc12-supply = <&vcc_5v0_sys>; 332 vcc13-supply = <&vcc_1v1_nldo_s3>; 333 vcc14-supply = <&vcc_1v1_nldo_s3>; 334 vcca-supply = <&vcc_5v0_sys>; 335 336 rk806_dvs1_null: dvs1-null-pins { 337 pins = "gpio_pwrctrl1"; 338 function = "pin_fun0"; 339 }; 340 341 rk806_dvs2_null: dvs2-null-pins { 342 pins = "gpio_pwrctrl2"; 343 function = "pin_fun0"; 344 }; 345 346 rk806_dvs3_null: dvs3-null-pins { 347 pins = "gpio_pwrctrl3"; 348 function = "pin_fun0"; 349 }; 350 351 rk806_dvs1_slp: dvs1-slp-pins { 352 pins = "gpio_pwrctrl1"; 353 function = "pin_fun1"; 354 }; 355 356 rk806_dvs1_pwrdn: dvs1-pwrdn-pins { 357 pins = "gpio_pwrctrl1"; 358 function = "pin_fun2"; 359 }; 360 361 rk806_dvs1_rst: dvs1-rst-pins { 362 pins = "gpio_pwrctrl1"; 363 function = "pin_fun3"; 364 }; 365 366 rk806_dvs2_slp: dvs2-slp-pins { 367 pins = "gpio_pwrctrl2"; 368 function = "pin_fun1"; 369 }; 370 371 rk806_dvs2_pwrdn: dvs2-pwrdn-pins { 372 pins = "gpio_pwrctrl2"; 373 function = "pin_fun2"; 374 }; 375 376 rk806_dvs2_rst: dvs2-rst-pins { 377 pins = "gpio_pwrctrl2"; 378 function = "pin_fun3"; 379 }; 380 381 rk806_dvs2_dvs: dvs2-dvs-pins { 382 pins = "gpio_pwrctrl2"; 383 function = "pin_fun4"; 384 }; 385 386 rk806_dvs2_gpio: dvs2-gpio-pins { 387 pins = "gpio_pwrctrl2"; 388 function = "pin_fun5"; 389 }; 390 391 rk806_dvs3_slp: dvs3-slp-pins { 392 pins = "gpio_pwrctrl3"; 393 function = "pin_fun1"; 394 }; 395 396 rk806_dvs3_pwrdn: dvs3-pwrdn-pins { 397 pins = "gpio_pwrctrl3"; 398 function = "pin_fun2"; 399 }; 400 401 rk806_dvs3_rst: dvs3-rst-pins { 402 pins = "gpio_pwrctrl3"; 403 function = "pin_fun3"; 404 }; 405 406 rk806_dvs3_dvs: dvs3-dvs-pins { 407 pins = "gpio_pwrctrl3"; 408 function = "pin_fun4"; 409 }; 410 411 rk806_dvs3_gpio: dvs3-gpio-pins { 412 pins = "gpio_pwrctrl3"; 413 function = "pin_fun5"; 414 }; 415 416 regulators { 417 vdd_cpu_big_s0: dcdc-reg1 { 418 regulator-always-on; 419 regulator-boot-on; 420 regulator-min-microvolt = <550000>; 421 regulator-max-microvolt = <950000>; 422 regulator-ramp-delay = <12500>; 423 regulator-name = "vdd_cpu_big_s0"; 424 regulator-enable-ramp-delay = <400>; 425 regulator-state-mem { 426 regulator-off-in-suspend; 427 }; 428 }; 429 430 vdd_npu_s0: dcdc-reg2 { 431 regulator-boot-on; 432 regulator-min-microvolt = <550000>; 433 regulator-max-microvolt = <950000>; 434 regulator-ramp-delay = <12500>; 435 regulator-name = "vdd_npu_s0"; 436 regulator-enable-ramp-delay = <400>; 437 regulator-state-mem { 438 regulator-off-in-suspend; 439 }; 440 }; 441 442 vdd_cpu_lit_s0: dcdc-reg3 { 443 regulator-always-on; 444 regulator-boot-on; 445 regulator-min-microvolt = <550000>; 446 regulator-max-microvolt = <950000>; 447 regulator-ramp-delay = <12500>; 448 regulator-name = "vdd_cpu_lit_s0"; 449 regulator-state-mem { 450 regulator-off-in-suspend; 451 regulator-suspend-microvolt = <750000>; 452 }; 453 }; 454 455 vcc_3v3_s3: dcdc-reg4 { 456 regulator-always-on; 457 regulator-boot-on; 458 regulator-min-microvolt = <3300000>; 459 regulator-max-microvolt = <3300000>; 460 regulator-name = "vcc_3v3_s3"; 461 regulator-state-mem { 462 regulator-on-in-suspend; 463 regulator-suspend-microvolt = <3300000>; 464 }; 465 }; 466 467 vdd_gpu_s0: dcdc-reg5 { 468 regulator-boot-on; 469 regulator-min-microvolt = <550000>; 470 regulator-max-microvolt = <900000>; 471 regulator-ramp-delay = <12500>; 472 regulator-name = "vdd_gpu_s0"; 473 regulator-enable-ramp-delay = <400>; 474 regulator-state-mem { 475 regulator-off-in-suspend; 476 regulator-suspend-microvolt = <850000>; 477 }; 478 }; 479 480 vddq_ddr_s0: dcdc-reg6 { 481 regulator-always-on; 482 regulator-boot-on; 483 regulator-name = "vddq_ddr_s0"; 484 regulator-state-mem { 485 regulator-off-in-suspend; 486 }; 487 }; 488 489 vdd_logic_s0: dcdc-reg7 { 490 regulator-always-on; 491 regulator-boot-on; 492 regulator-min-microvolt = <550000>; 493 regulator-max-microvolt = <800000>; 494 regulator-name = "vdd_logic_s0"; 495 regulator-state-mem { 496 regulator-off-in-suspend; 497 }; 498 }; 499 500 vcc_1v8_s3: dcdc-reg8 { 501 regulator-always-on; 502 regulator-boot-on; 503 regulator-min-microvolt = <1800000>; 504 regulator-max-microvolt = <1800000>; 505 regulator-name = "vcc_1v8_s3"; 506 regulator-state-mem { 507 regulator-on-in-suspend; 508 regulator-suspend-microvolt = <1800000>; 509 }; 510 }; 511 512 vdd2_ddr_s3: dcdc-reg9 { 513 regulator-always-on; 514 regulator-boot-on; 515 regulator-name = "vdd2_ddr_s3"; 516 regulator-state-mem { 517 regulator-on-in-suspend; 518 }; 519 }; 520 521 vdd_ddr_s0: dcdc-reg10 { 522 regulator-always-on; 523 regulator-boot-on; 524 regulator-min-microvolt = <550000>; 525 regulator-max-microvolt = <1200000>; 526 regulator-name = "vdd_ddr_s0"; 527 regulator-state-mem { 528 regulator-off-in-suspend; 529 }; 530 }; 531 532 vcca_1v8_s0: pldo-reg1 { 533 regulator-always-on; 534 regulator-boot-on; 535 regulator-min-microvolt = <1800000>; 536 regulator-max-microvolt = <1800000>; 537 regulator-name = "vcca_1v8_s0"; 538 regulator-state-mem { 539 regulator-off-in-suspend; 540 }; 541 }; 542 543 vcca1v8_pldo2_s0: pldo-reg2 { 544 regulator-always-on; 545 regulator-boot-on; 546 regulator-min-microvolt = <1800000>; 547 regulator-max-microvolt = <1800000>; 548 regulator-name = "vcca1v8_pldo2_s0"; 549 regulator-state-mem { 550 regulator-off-in-suspend; 551 }; 552 }; 553 554 vdda_1v2_s0: pldo-reg3 { 555 regulator-always-on; 556 regulator-boot-on; 557 regulator-min-microvolt = <1200000>; 558 regulator-max-microvolt = <1200000>; 559 regulator-name = "vdda_1v2_s0"; 560 regulator-state-mem { 561 regulator-off-in-suspend; 562 }; 563 }; 564 565 vcca_3v3_s0: pldo-reg4 { 566 regulator-always-on; 567 regulator-boot-on; 568 regulator-min-microvolt = <3300000>; 569 regulator-max-microvolt = <3300000>; 570 regulator-name = "vcca_3v3_s0"; 571 regulator-state-mem { 572 regulator-off-in-suspend; 573 }; 574 }; 575 576 vccio_sd_s0: pldo-reg5 { 577 regulator-always-on; 578 regulator-boot-on; 579 regulator-min-microvolt = <1800000>; 580 regulator-max-microvolt = <3300000>; 581 regulator-name = "vccio_sd_s0"; 582 regulator-state-mem { 583 regulator-off-in-suspend; 584 }; 585 }; 586 587 vcca1v8_pldo6_s3: pldo-reg6 { 588 regulator-always-on; 589 regulator-boot-on; 590 regulator-min-microvolt = <1800000>; 591 regulator-max-microvolt = <1800000>; 592 regulator-name = "vcca1v8_pldo6_s3"; 593 regulator-state-mem { 594 regulator-on-in-suspend; 595 regulator-suspend-microvolt = <1800000>; 596 }; 597 }; 598 599 vdd_0v75_s3: nldo-reg1 { 600 regulator-always-on; 601 regulator-boot-on; 602 regulator-min-microvolt = <750000>; 603 regulator-max-microvolt = <750000>; 604 regulator-name = "vdd_0v75_s3"; 605 regulator-state-mem { 606 regulator-on-in-suspend; 607 regulator-suspend-microvolt = <750000>; 608 }; 609 }; 610 611 vdda_ddr_pll_s0: nldo-reg2 { 612 regulator-always-on; 613 regulator-boot-on; 614 regulator-min-microvolt = <850000>; 615 regulator-max-microvolt = <850000>; 616 regulator-name = "vdda_ddr_pll_s0"; 617 regulator-state-mem { 618 regulator-off-in-suspend; 619 }; 620 }; 621 622 vdda0v75_hdmi_s0: nldo-reg3 { 623 regulator-always-on; 624 regulator-boot-on; 625 regulator-min-microvolt = <837500>; 626 regulator-max-microvolt = <837500>; 627 regulator-name = "vdda0v75_hdmi_s0"; 628 regulator-state-mem { 629 regulator-off-in-suspend; 630 }; 631 }; 632 633 vdda_0v85_s0: nldo-reg4 { 634 regulator-always-on; 635 regulator-boot-on; 636 regulator-min-microvolt = <850000>; 637 regulator-max-microvolt = <850000>; 638 regulator-name = "vdda_0v85_s0"; 639 regulator-state-mem { 640 regulator-off-in-suspend; 641 }; 642 }; 643 644 vdda_0v75_s0: nldo-reg5 { 645 regulator-always-on; 646 regulator-boot-on; 647 regulator-min-microvolt = <750000>; 648 regulator-max-microvolt = <750000>; 649 regulator-name = "vdda_0v75_s0"; 650 regulator-state-mem { 651 regulator-off-in-suspend; 652 }; 653 }; 654 }; 655 }; 656}; 657 658&i2c2 { 659 status = "okay"; 660 661 rtc@68 { 662 compatible = "dallas,ds1338"; 663 reg = <0x68>; 664 }; 665}; 666 667&i2c4 { 668 status = "okay"; 669 670 es8388: audio-codec@11 { 671 compatible = "everest,es8388", "everest,es8328"; 672 reg = <0x11>; 673 clocks = <&cru CLK_SAI2_MCLKOUT_TO_IO>; 674 assigned-clocks = <&cru CLK_SAI2_MCLKOUT_TO_IO>; 675 assigned-clock-rates = <12288000>; 676 AVDD-supply = <&vcc_3v3_s0>; 677 DVDD-supply = <&vcc_3v3_s0>; 678 HPVDD-supply = <&vcc_3v3_s0>; 679 PVDD-supply = <&vcc_3v3_s0>; 680 pinctrl-names = "default"; 681 pinctrl-0 = <&sai2m0_mclk>; 682 #sound-dai-cells = <0>; 683 }; 684}; 685 686&mdio0 { 687 rgmii_phy0: phy@0 { 688 compatible = "ethernet-phy-ieee802.3-c22"; 689 reg = <0>; 690 pinctrl-names = "default"; 691 pinctrl-0 = <&gmac0_rst>; 692 reset-assert-us = <20000>; 693 reset-deassert-us = <100000>; 694 reset-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; 695 }; 696}; 697 698&mdio1 { 699 rgmii_phy1: phy@0 { 700 compatible = "ethernet-phy-ieee802.3-c22"; 701 reg = <0>; 702 pinctrl-names = "default"; 703 pinctrl-0 = <&gmac1_rst>; 704 reset-assert-us = <20000>; 705 reset-deassert-us = <100000>; 706 reset-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>; 707 }; 708}; 709 710&pcie0 { 711 pinctrl-names = "default"; 712 pinctrl-0 = <&pcie_reset>; 713 reset-gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_HIGH>; 714 vpcie3v3-supply = <&vcc_3v3_m2>; 715 status = "okay"; 716}; 717 718&pinctrl { 719 gmac { 720 gmac0_rst: gmac0-rst { 721 rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 722 }; 723 724 gmac1_rst: gmac1-rst { 725 rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 726 }; 727 }; 728 729 gpio-keys { 730 gpio0_a0_d: gpio0-a0-d { 731 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; 732 }; 733 }; 734 735 headphone { 736 hp_det: hp-det { 737 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 738 }; 739 }; 740 741 pcie { 742 pcie_reset: pcie-reset { 743 rockchip,pins = <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 744 }; 745 }; 746 747 usb { 748 typec5v_pwren_h: typec5v-pwren-h { 749 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 750 }; 751 }; 752}; 753 754&sai2 { 755 status = "okay"; 756}; 757 758&sai6 { 759 status = "okay"; 760}; 761 762&saradc { 763 vref-supply = <&vcca1v8_pldo2_s0>; 764 status = "okay"; 765}; 766 767&sdhci { 768 bus-width = <8>; 769 full-pwr-cycle-in-suspend; 770 mmc-hs400-1_8v; 771 mmc-hs400-enhanced-strobe; 772 no-sdio; 773 no-sd; 774 non-removable; 775 status = "okay"; 776}; 777 778&sdmmc { 779 bus-width = <4>; 780 cap-mmc-highspeed; 781 cap-sd-highspeed; 782 disable-wp; 783 sd-uhs-sdr104; 784 vmmc-supply = <&vcc_3v3_s0>; 785 vqmmc-supply = <&vccio_sd_s0>; 786 status = "okay"; 787}; 788 789&u2phy0 { 790 status = "okay"; 791}; 792 793&u2phy0_otg { 794 phy-supply = <&vbus5v0_typec>; 795 status = "okay"; 796}; 797 798&u2phy1 { 799 status = "okay"; 800}; 801 802&u2phy1_otg { 803 phy-supply = <&vcc_5v0_sys>; 804 status = "okay"; 805}; 806 807&uart0 { 808 pinctrl-0 = <&uart0m0_xfer>; 809 status = "okay"; 810}; 811 812&usbdp_phy { 813 status = "okay"; 814}; 815 816&usb_drd0_dwc3 { 817 status = "okay"; 818}; 819 820&usb_drd1_dwc3 { 821 dr_mode = "host"; 822 status = "okay"; 823}; 824 825&vop { 826 status = "okay"; 827}; 828 829&vop_mmu { 830 status = "okay"; 831}; 832 833&vp0 { 834 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 835 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 836 remote-endpoint = <&hdmi_in_vp0>; 837 }; 838}; 839