1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/input/input.h> 7#include <dt-bindings/leds/common.h> 8#include <dt-bindings/pinctrl/rockchip.h> 9#include <dt-bindings/soc/rockchip,vop2.h> 10#include "rk3568.dtsi" 11 12/ { 13 model = "LinkEase EasePi R1"; 14 compatible = "linkease,easepi-r1", "rockchip,rk3568"; 15 16 aliases { 17 ethernet0 = &gmac0; 18 ethernet1 = &gmac1; 19 mmc0 = &sdhci; 20 }; 21 22 chosen: chosen { 23 stdout-path = "serial2:1500000n8"; 24 }; 25 26 adc-keys { 27 compatible = "adc-keys"; 28 io-channels = <&saradc 0>; 29 io-channel-names = "buttons"; 30 keyup-threshold-microvolt = <1800000>; 31 32 button-recovery { 33 label = "Recovery"; 34 linux,code = <KEY_VENDOR>; 35 press-threshold-microvolt = <1750>; 36 }; 37 }; 38 39 gpio-leds { 40 compatible = "gpio-leds"; 41 pinctrl-names = "default"; 42 pinctrl-0 = <&status_led_pin>; 43 44 status_led: led-status { 45 color = <LED_COLOR_ID_GREEN>; 46 function = LED_FUNCTION_STATUS; 47 gpios = <&gpio2 RK_PD7 GPIO_ACTIVE_HIGH>; 48 linux,default-trigger = "heartbeat"; 49 }; 50 }; 51 52 hdmi-con { 53 compatible = "hdmi-connector"; 54 type = "a"; 55 56 port { 57 hdmi_con_in: endpoint { 58 remote-endpoint = <&hdmi_out_con>; 59 }; 60 }; 61 }; 62 63 dc_12v: regulator-dc-12v { 64 compatible = "regulator-fixed"; 65 regulator-name = "dc_12v"; 66 regulator-always-on; 67 regulator-boot-on; 68 regulator-min-microvolt = <12000000>; 69 regulator-max-microvolt = <12000000>; 70 }; 71 72 vcc5v0_sys: regulator-vcc5v0-sys { 73 compatible = "regulator-fixed"; 74 regulator-name = "vcc5v0_sys"; 75 regulator-always-on; 76 regulator-boot-on; 77 regulator-min-microvolt = <5000000>; 78 regulator-max-microvolt = <5000000>; 79 vin-supply = <&dc_12v>; 80 }; 81 82 vcc3v3_sys: regulator-vcc3v3-sys { 83 compatible = "regulator-fixed"; 84 regulator-name = "vcc3v3_sys"; 85 regulator-always-on; 86 regulator-boot-on; 87 regulator-min-microvolt = <3300000>; 88 regulator-max-microvolt = <3300000>; 89 vin-supply = <&dc_12v>; 90 }; 91 92 pcie30_avdd0v9: regulator-pcie30-avdd0v9 { 93 compatible = "regulator-fixed"; 94 regulator-name = "pcie30_avdd0v9"; 95 regulator-always-on; 96 regulator-boot-on; 97 regulator-min-microvolt = <900000>; 98 regulator-max-microvolt = <900000>; 99 vin-supply = <&vcc3v3_sys>; 100 }; 101 102 pcie30_avdd1v8: regulator-pcie30-avdd1v8 { 103 compatible = "regulator-fixed"; 104 regulator-name = "pcie30_avdd1v8"; 105 regulator-always-on; 106 regulator-boot-on; 107 regulator-min-microvolt = <1800000>; 108 regulator-max-microvolt = <1800000>; 109 vin-supply = <&vcc3v3_sys>; 110 }; 111 112 regulator-vdd0v95-25glan { 113 compatible = "regulator-fixed"; 114 enable-active-high; 115 gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; 116 pinctrl-names = "default"; 117 pinctrl-0 = <&vdd0v95_25glan_en>; 118 regulator-name = "vdd0v95_25glan"; 119 regulator-always-on; 120 regulator-boot-on; 121 regulator-min-microvolt = <950000>; 122 regulator-max-microvolt = <950000>; 123 vin-supply = <&vcc3v3_sys>; 124 }; 125 126 vcc3v3_nvme: regulator-vcc3v3-nvme { 127 compatible = "regulator-fixed"; 128 enable-active-high; 129 gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 130 pinctrl-names = "default"; 131 pinctrl-0 = <&vcc3v3_nvme_en>; 132 regulator-name = "vcc3v3_nvme"; 133 regulator-min-microvolt = <3300000>; 134 regulator-max-microvolt = <3300000>; 135 vin-supply = <&dc_12v>; 136 }; 137 138}; 139 140&combphy1 { 141 status = "okay"; 142}; 143 144&combphy2 { 145 status = "okay"; 146}; 147 148&cpu0 { 149 cpu-supply = <&vdd_cpu>; 150}; 151 152&cpu1 { 153 cpu-supply = <&vdd_cpu>; 154}; 155 156&cpu2 { 157 cpu-supply = <&vdd_cpu>; 158}; 159 160&cpu3 { 161 cpu-supply = <&vdd_cpu>; 162}; 163 164&gmac0 { 165 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 166 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; 167 assigned-clock-rates = <0>, <125000000>; 168 phy-handle = <&rgmii_phy0>; 169 phy-mode = "rgmii-id"; 170 pinctrl-names = "default"; 171 pinctrl-0 = <&gmac0_miim 172 &gmac0_tx_bus2 173 &gmac0_rx_bus2 174 &gmac0_rgmii_clk 175 &gmac0_rgmii_bus>; 176 status = "okay"; 177}; 178 179&gmac1 { 180 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 181 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; 182 assigned-clock-rates = <0>, <125000000>; 183 phy-handle = <&rgmii_phy1>; 184 phy-mode = "rgmii-id"; 185 pinctrl-names = "default"; 186 pinctrl-0 = <&gmac1m1_miim 187 &gmac1m1_tx_bus2 188 &gmac1m1_rx_bus2 189 &gmac1m1_rgmii_clk 190 &gmac1m1_rgmii_bus>; 191 status = "okay"; 192}; 193 194&gpu { 195 mali-supply = <&vdd_gpu>; 196 status = "okay"; 197}; 198 199&hdmi { 200 avdd-0v9-supply = <&vdda0v9_image>; 201 avdd-1v8-supply = <&vcca1v8_image>; 202 status = "okay"; 203}; 204 205&hdmi_in { 206 hdmi_in_vp0: endpoint { 207 remote-endpoint = <&vp0_out_hdmi>; 208 }; 209}; 210 211&hdmi_out { 212 hdmi_out_con: endpoint { 213 remote-endpoint = <&hdmi_con_in>; 214 }; 215}; 216 217&hdmi_sound { 218 status = "okay"; 219}; 220 221&i2c0 { 222 status = "okay"; 223 224 vdd_cpu: regulator@1c { 225 compatible = "tcs,tcs4525"; 226 reg = <0x1c>; 227 fcs,suspend-voltage-selector = <1>; 228 regulator-name = "vdd_cpu"; 229 regulator-always-on; 230 regulator-boot-on; 231 regulator-min-microvolt = <800000>; 232 regulator-max-microvolt = <1150000>; 233 regulator-ramp-delay = <2300>; 234 vin-supply = <&vcc5v0_sys>; 235 236 regulator-state-mem { 237 regulator-off-in-suspend; 238 }; 239 }; 240 241 rk809: pmic@20 { 242 compatible = "rockchip,rk809"; 243 reg = <0x20>; 244 interrupt-parent = <&gpio0>; 245 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 246 #clock-cells = <1>; 247 pinctrl-names = "default"; 248 pinctrl-0 = <&pmic_int>; 249 system-power-controller; 250 vcc1-supply = <&vcc3v3_sys>; 251 vcc2-supply = <&vcc3v3_sys>; 252 vcc3-supply = <&vcc3v3_sys>; 253 vcc4-supply = <&vcc3v3_sys>; 254 vcc5-supply = <&vcc3v3_sys>; 255 vcc6-supply = <&vcc3v3_sys>; 256 vcc7-supply = <&vcc3v3_sys>; 257 vcc8-supply = <&vcc3v3_sys>; 258 vcc9-supply = <&vcc3v3_sys>; 259 wakeup-source; 260 261 regulators { 262 vdd_logic: DCDC_REG1 { 263 regulator-name = "vdd_logic"; 264 regulator-always-on; 265 regulator-boot-on; 266 regulator-initial-mode = <0x2>; 267 regulator-min-microvolt = <500000>; 268 regulator-max-microvolt = <1350000>; 269 regulator-ramp-delay = <6001>; 270 271 regulator-state-mem { 272 regulator-off-in-suspend; 273 }; 274 }; 275 276 vdd_gpu: DCDC_REG2 { 277 regulator-name = "vdd_gpu"; 278 regulator-always-on; 279 regulator-initial-mode = <0x2>; 280 regulator-min-microvolt = <500000>; 281 regulator-max-microvolt = <1350000>; 282 regulator-ramp-delay = <6001>; 283 284 regulator-state-mem { 285 regulator-off-in-suspend; 286 }; 287 }; 288 289 vcc_ddr: DCDC_REG3 { 290 regulator-name = "vcc_ddr"; 291 regulator-always-on; 292 regulator-boot-on; 293 regulator-initial-mode = <0x2>; 294 295 regulator-state-mem { 296 regulator-on-in-suspend; 297 }; 298 }; 299 300 vdd_npu: DCDC_REG4 { 301 regulator-name = "vdd_npu"; 302 regulator-initial-mode = <0x2>; 303 regulator-min-microvolt = <500000>; 304 regulator-max-microvolt = <1350000>; 305 regulator-ramp-delay = <6001>; 306 307 regulator-state-mem { 308 regulator-off-in-suspend; 309 }; 310 }; 311 312 vcc_1v8: DCDC_REG5 { 313 regulator-name = "vcc_1v8"; 314 regulator-always-on; 315 regulator-boot-on; 316 regulator-min-microvolt = <1800000>; 317 regulator-max-microvolt = <1800000>; 318 319 regulator-state-mem { 320 regulator-off-in-suspend; 321 }; 322 }; 323 324 vdda0v9_image: LDO_REG1 { 325 regulator-name = "vdda0v9_image"; 326 regulator-min-microvolt = <950000>; 327 regulator-max-microvolt = <950000>; 328 329 regulator-state-mem { 330 regulator-off-in-suspend; 331 }; 332 }; 333 334 vdda_0v9: LDO_REG2 { 335 regulator-name = "vdda_0v9"; 336 regulator-always-on; 337 regulator-boot-on; 338 regulator-min-microvolt = <900000>; 339 regulator-max-microvolt = <900000>; 340 341 regulator-state-mem { 342 regulator-off-in-suspend; 343 }; 344 }; 345 346 vdda0v9_pmu: LDO_REG3 { 347 regulator-name = "vdda0v9_pmu"; 348 regulator-always-on; 349 regulator-boot-on; 350 regulator-min-microvolt = <900000>; 351 regulator-max-microvolt = <900000>; 352 353 regulator-state-mem { 354 regulator-on-in-suspend; 355 regulator-suspend-microvolt = <900000>; 356 }; 357 }; 358 359 vccio_acodec: LDO_REG4 { 360 regulator-name = "vccio_acodec"; 361 regulator-min-microvolt = <3300000>; 362 regulator-max-microvolt = <3300000>; 363 364 regulator-state-mem { 365 regulator-off-in-suspend; 366 }; 367 }; 368 369 vccio_sd: LDO_REG5 { 370 regulator-name = "vccio_sd"; 371 regulator-min-microvolt = <1800000>; 372 regulator-max-microvolt = <3300000>; 373 374 regulator-state-mem { 375 regulator-off-in-suspend; 376 }; 377 }; 378 379 vcc3v3_pmu: LDO_REG6 { 380 regulator-name = "vcc3v3_pmu"; 381 regulator-always-on; 382 regulator-boot-on; 383 regulator-min-microvolt = <3300000>; 384 regulator-max-microvolt = <3300000>; 385 386 regulator-state-mem { 387 regulator-on-in-suspend; 388 regulator-suspend-microvolt = <3300000>; 389 }; 390 }; 391 392 vcca_1v8: LDO_REG7 { 393 regulator-name = "vcca_1v8"; 394 regulator-always-on; 395 regulator-boot-on; 396 regulator-min-microvolt = <1800000>; 397 regulator-max-microvolt = <1800000>; 398 399 regulator-state-mem { 400 regulator-off-in-suspend; 401 }; 402 }; 403 404 vcca1v8_pmu: LDO_REG8 { 405 regulator-name = "vcca1v8_pmu"; 406 regulator-always-on; 407 regulator-boot-on; 408 regulator-min-microvolt = <1800000>; 409 regulator-max-microvolt = <1800000>; 410 411 regulator-state-mem { 412 regulator-on-in-suspend; 413 regulator-suspend-microvolt = <1800000>; 414 }; 415 }; 416 417 vcca1v8_image: LDO_REG9 { 418 regulator-name = "vcca1v8_image"; 419 regulator-min-microvolt = <1800000>; 420 regulator-max-microvolt = <1800000>; 421 422 regulator-state-mem { 423 regulator-off-in-suspend; 424 }; 425 }; 426 427 vcc_3v3: SWITCH_REG1 { 428 regulator-name = "vcc_3v3"; 429 regulator-always-on; 430 regulator-boot-on; 431 432 regulator-state-mem { 433 regulator-off-in-suspend; 434 }; 435 }; 436 437 vcc3v3_sd: SWITCH_REG2 { 438 regulator-name = "vcc3v3_sd"; 439 regulator-always-on; 440 regulator-boot-on; 441 442 regulator-state-mem { 443 regulator-off-in-suspend; 444 }; 445 }; 446 }; 447 }; 448}; 449 450&i2s0_8ch { 451 status = "okay"; 452}; 453 454&mdio0 { 455 rgmii_phy0: ethernet-phy@1 { 456 compatible = "ethernet-phy-ieee802.3-c22"; 457 reg = <0x1>; 458 pinctrl-0 = <ð_phy0_reset_pin>; 459 pinctrl-names = "default"; 460 reset-assert-us = <20000>; 461 reset-deassert-us = <100000>; 462 reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; 463 }; 464}; 465 466&mdio1 { 467 rgmii_phy1: ethernet-phy@1 { 468 compatible = "ethernet-phy-ieee802.3-c22"; 469 reg = <0x1>; 470 pinctrl-0 = <ð_phy1_reset_pin>; 471 pinctrl-names = "default"; 472 reset-assert-us = <20000>; 473 reset-deassert-us = <100000>; 474 reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; 475 }; 476}; 477 478/* ETH3 */ 479&pcie2x1 { 480 reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; 481 vpcie3v3-supply = <&vcc3v3_sys>; 482 status = "okay"; 483}; 484 485&pcie30phy { 486 data-lanes = <1 2>; 487 status = "okay"; 488}; 489 490/* ETH2 */ 491&pcie3x1 { 492 num-lanes = <1>; 493 reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; 494 vpcie3v3-supply = <&vcc3v3_sys>; 495 status = "okay"; 496}; 497 498/* M.2 Key for 2280 NVMe */ 499&pcie3x2 { 500 num-lanes = <1>; 501 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; 502 vpcie3v3-supply = <&vcc3v3_nvme>; 503 status = "okay"; 504}; 505 506&pinctrl { 507 gmac0 { 508 eth_phy0_reset_pin: eth-phy0-reset-pin { 509 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 510 }; 511 }; 512 513 gmac1 { 514 eth_phy1_reset_pin: eth-phy1-reset-pin { 515 rockchip,pins = <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>; 516 }; 517 }; 518 519 gpio-leds { 520 status_led_pin: status-led-pin { 521 rockchip,pins = <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>; 522 }; 523 }; 524 525 nvme { 526 vcc3v3_nvme_en: vcc3v3-nvme-en { 527 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 528 }; 529 }; 530 531 pcie-nic { 532 vdd0v95_25glan_en: vdd0v95-25glan-en { 533 rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 534 }; 535 }; 536 537 pmic { 538 pmic_int: pmic-int { 539 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 540 }; 541 }; 542 543}; 544 545&pmu_io_domains { 546 pmuio1-supply = <&vcc3v3_pmu>; 547 pmuio2-supply = <&vcc3v3_pmu>; 548 vccio1-supply = <&vccio_acodec>; 549 vccio3-supply = <&vccio_sd>; 550 vccio4-supply = <&vcc_1v8>; 551 vccio5-supply = <&vcc_3v3>; 552 vccio6-supply = <&vcc_1v8>; 553 vccio7-supply = <&vcc_3v3>; 554 status = "okay"; 555}; 556 557&saradc { 558 vref-supply = <&vcca_1v8>; 559 status = "okay"; 560}; 561 562&sdhci { 563 bus-width = <8>; 564 max-frequency = <200000000>; 565 non-removable; 566 pinctrl-names = "default"; 567 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; 568 status = "okay"; 569}; 570 571&tsadc { 572 rockchip,hw-tshut-mode = <1>; 573 rockchip,hw-tshut-polarity = <0>; 574 status = "okay"; 575}; 576 577&uart2 { 578 status = "okay"; 579}; 580 581/* OTG Only USB2.0, Only device mode */ 582&usb_host0_xhci { 583 dr_mode = "peripheral"; 584 extcon = <&usb2phy0>; 585 maximum-speed = "high-speed"; 586 phys = <&usb2phy0_otg>; 587 phy-names = "usb2-phy"; 588 status = "okay"; 589}; 590 591&usb_host1_xhci { 592 status = "okay"; 593}; 594 595&usb2phy0 { 596 status = "okay"; 597}; 598 599&usb2phy0_host { 600 phy-supply = <&vcc5v0_sys>; 601 status = "okay"; 602}; 603 604&usb2phy0_otg { 605 status = "okay"; 606}; 607 608&vop { 609 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 610 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 611 status = "okay"; 612}; 613 614&vop_mmu { 615 status = "okay"; 616}; 617 618&vp0 { 619 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 620 reg = <ROCKCHIP_VOP2_EP_HDMI0>; 621 remote-endpoint = <&hdmi_in_vp0>; 622 }; 623}; 624