1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the Gray Hawk Single board 4 * 5 * Copyright (C) 2023 Renesas Electronics Corp. 6 * Copyright (C) 2024-2025 Glider bv 7 */ 8/* 9 * [How to use Sound] 10 * 11 * Because R-Car V4M has only 1 SSI, it cannot handle both Playback/Capture 12 * at the same time. You need to switch the direction which is controlled 13 * by the GP0_01 pin via amixer. 14 * 15 * Playback (CN9500) 16 * > amixer set "MUX" "Playback" // for GP0_01 17 * > amixer set "DAC 1" 85% 18 * > aplay xxx.wav 19 * 20 * Capture (CN9501) 21 * > amixer set "MUX" "Capture" // for GP0_01 22 * > amixer set "Mic 1" 80% 23 * > amixer set "ADC 1" on 24 * > amixer set 'ADC 1' 80% 25 * > arecord xxx hoge.wav 26 */ 27 28#include <dt-bindings/gpio/gpio.h> 29#include <dt-bindings/input/input.h> 30#include <dt-bindings/leds/common.h> 31#include <dt-bindings/media/video-interfaces.h> 32 33/ { 34 model = "Renesas Gray Hawk Single board"; 35 compatible = "renesas,gray-hawk-single"; 36 37 aliases { 38 i2c0 = &i2c0; 39 i2c1 = &i2c1; 40 i2c2 = &i2c2; 41 i2c3 = &i2c3; 42 serial0 = &hscif0; 43 serial1 = &hscif2; 44 ethernet0 = &avb0; 45 ethernet1 = &avb1; 46 ethernet2 = &avb2; 47 }; 48 49 can_transceiver0: can-phy0 { 50 compatible = "nxp,tjr1443"; 51 #phy-cells = <0>; 52 enable-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 53 max-bitrate = <5000000>; 54 }; 55 56 chosen { 57 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 58 stdout-path = "serial0:921600n8"; 59 }; 60 61 sn65dsi86_refclk: clk-x6 { 62 compatible = "fixed-clock"; 63 #clock-cells = <0>; 64 clock-frequency = <38400000>; 65 }; 66 67 keys { 68 compatible = "gpio-keys"; 69 70 pinctrl-0 = <&keys_pins>; 71 pinctrl-names = "default"; 72 73 key-1 { 74 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 75 linux,code = <KEY_1>; 76 label = "SW47"; 77 wakeup-source; 78 debounce-interval = <20>; 79 }; 80 81 key-2 { 82 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; 83 linux,code = <KEY_2>; 84 label = "SW48"; 85 wakeup-source; 86 debounce-interval = <20>; 87 }; 88 89 key-3 { 90 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; 91 linux,code = <KEY_3>; 92 label = "SW49"; 93 wakeup-source; 94 debounce-interval = <20>; 95 }; 96 }; 97 98 leds { 99 compatible = "gpio-leds"; 100 101 led-1 { 102 gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; 103 color = <LED_COLOR_ID_GREEN>; 104 function = LED_FUNCTION_INDICATOR; 105 function-enumerator = <1>; 106 }; 107 108 led-2 { 109 gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>; 110 color = <LED_COLOR_ID_GREEN>; 111 function = LED_FUNCTION_INDICATOR; 112 function-enumerator = <2>; 113 }; 114 115 led-3 { 116 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>; 117 color = <LED_COLOR_ID_GREEN>; 118 function = LED_FUNCTION_INDICATOR; 119 function-enumerator = <3>; 120 }; 121 }; 122 123 memory@48000000 { 124 device_type = "memory"; 125 /* first 128MB is reserved for secure area. */ 126 reg = <0x0 0x48000000 0x0 0x78000000>; 127 }; 128 129 memory@480000000 { 130 device_type = "memory"; 131 reg = <0x4 0x80000000 0x1 0x80000000>; 132 }; 133 134 pcie_clk: clk-9fgv0841-pci { 135 compatible = "fixed-clock"; 136 clock-frequency = <100000000>; 137 #clock-cells = <0>; 138 }; 139 140 mini-dp-con { 141 compatible = "dp-connector"; 142 label = "CN5"; 143 type = "mini"; 144 145 port { 146 mini_dp_con_in: endpoint { 147 remote-endpoint = <&sn65dsi86_out0>; 148 }; 149 }; 150 }; 151 152 reg_1p2v: regulator-1p2v { 153 compatible = "regulator-fixed"; 154 regulator-name = "fixed-1.2V"; 155 regulator-min-microvolt = <1200000>; 156 regulator-max-microvolt = <1200000>; 157 regulator-boot-on; 158 regulator-always-on; 159 }; 160 161 reg_1p8v: regulator-1p8v { 162 compatible = "regulator-fixed"; 163 regulator-name = "fixed-1.8V"; 164 regulator-min-microvolt = <1800000>; 165 regulator-max-microvolt = <1800000>; 166 regulator-boot-on; 167 regulator-always-on; 168 }; 169 170 reg_3p3v: regulator-3p3v { 171 compatible = "regulator-fixed"; 172 regulator-name = "fixed-3.3V"; 173 regulator-min-microvolt = <3300000>; 174 regulator-max-microvolt = <3300000>; 175 regulator-boot-on; 176 regulator-always-on; 177 }; 178 179 sound_mux: sound-mux { 180 compatible = "simple-audio-mux"; 181 mux-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; 182 state-labels = "Playback", "Capture"; 183 }; 184 185 sound_card: sound { 186 compatible = "audio-graph-card2"; 187 label = "rcar-sound"; 188 aux-devs = <&sound_mux>; // for GP0_01 189 190 links = <&rsnd_port>; // AK4619 Audio Codec 191 }; 192}; 193 194&audio_clkin { 195 clock-frequency = <24576000>; 196}; 197 198&avb0 { 199 pinctrl-0 = <&avb0_pins>; 200 pinctrl-names = "default"; 201 phy-handle = <&avb0_phy>; 202 tx-internal-delay-ps = <2000>; 203 status = "okay"; 204 205 mdio { 206 #address-cells = <1>; 207 #size-cells = <0>; 208 209 avb0_phy: ethernet-phy@0 { 210 compatible = "ethernet-phy-id0022.1622", 211 "ethernet-phy-ieee802.3-c22"; 212 rxc-skew-ps = <1500>; 213 reg = <0>; 214 interrupts-extended = <&gpio7 5 IRQ_TYPE_LEVEL_LOW>; 215 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>; 216 }; 217 }; 218}; 219 220&avb1 { 221 pinctrl-0 = <&avb1_pins>; 222 pinctrl-names = "default"; 223 phy-handle = <&avb1_phy>; 224 status = "okay"; 225 226 mdio { 227 #address-cells = <1>; 228 #size-cells = <0>; 229 230 reset-gpios = <&gpio6 1 GPIO_ACTIVE_LOW>; 231 reset-post-delay-us = <4000>; 232 233 avb1_phy: ethernet-phy@0 { 234 compatible = "ethernet-phy-ieee802.3-c45"; 235 reg = <0>; 236 interrupts-extended = <&gpio6 3 IRQ_TYPE_LEVEL_LOW>; 237 }; 238 }; 239}; 240 241&avb2 { 242 pinctrl-0 = <&avb2_pins>; 243 pinctrl-names = "default"; 244 phy-handle = <&avb2_phy>; 245 status = "okay"; 246 247 mdio { 248 #address-cells = <1>; 249 #size-cells = <0>; 250 251 reset-gpios = <&gpio5 5 GPIO_ACTIVE_LOW>; 252 reset-post-delay-us = <4000>; 253 254 avb2_phy: ethernet-phy@0 { 255 compatible = "ethernet-phy-ieee802.3-c45"; 256 reg = <0>; 257 interrupts-extended = <&gpio5 4 IRQ_TYPE_LEVEL_LOW>; 258 }; 259 }; 260}; 261 262&can_clk { 263 clock-frequency = <40000000>; 264}; 265 266&canfd { 267 pinctrl-0 = <&canfd0_pins>, <&canfd1_pins>, <&can_clk_pins>; 268 pinctrl-names = "default"; 269 status = "okay"; 270 271 channel0 { 272 status = "okay"; 273 phys = <&can_transceiver0>; 274 }; 275 276 channel1 { 277 status = "okay"; 278 }; 279}; 280 281&csi40 { 282 status = "okay"; 283 284 ports { 285 #address-cells = <1>; 286 #size-cells = <0>; 287 288 port@0 { 289 reg = <0>; 290 291 csi40_in: endpoint { 292 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; 293 clock-lanes = <0>; 294 data-lanes = <1 2 3 4>; 295 remote-endpoint = <&max96724_out0>; 296 }; 297 }; 298 }; 299}; 300 301&csi41 { 302 status = "okay"; 303 304 ports { 305 #address-cells = <1>; 306 #size-cells = <0>; 307 308 port@0 { 309 reg = <0>; 310 311 csi41_in: endpoint { 312 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; 313 clock-lanes = <0>; 314 data-lanes = <1 2 3 4>; 315 remote-endpoint = <&max96724_out1>; 316 }; 317 }; 318 }; 319}; 320 321&dsi0 { 322 status = "okay"; 323 324 ports { 325 port@1 { 326 reg = <1>; 327 328 dsi0_out: endpoint { 329 remote-endpoint = <&sn65dsi86_in0>; 330 data-lanes = <1 2 3 4>; 331 }; 332 }; 333 }; 334}; 335 336&du { 337 status = "okay"; 338}; 339 340&extal_clk { 341 clock-frequency = <16666666>; 342}; 343 344&extalr_clk { 345 clock-frequency = <32768>; 346}; 347 348&gpio1 { 349 audio-power-hog { 350 gpio-hog; 351 gpios = <8 GPIO_ACTIVE_HIGH>; 352 output-high; 353 line-name = "Audio-Power"; 354 }; 355}; 356 357&hscif0 { 358 pinctrl-0 = <&hscif0_pins>; 359 pinctrl-names = "default"; 360 bootph-all; 361 362 uart-has-rtscts; 363 status = "okay"; 364}; 365 366&hscif2 { 367 pinctrl-0 = <&hscif2_pins>; 368 pinctrl-names = "default"; 369 370 uart-has-rtscts; 371 status = "okay"; 372}; 373 374&i2c0 { 375 pinctrl-0 = <&i2c0_pins>; 376 pinctrl-names = "default"; 377 378 status = "okay"; 379 clock-frequency = <400000>; 380 381 io_expander_a: gpio@20 { 382 compatible = "onnn,pca9654"; 383 reg = <0x20>; 384 interrupts-extended = <&gpio0 0 IRQ_TYPE_LEVEL_LOW>; 385 gpio-controller; 386 #gpio-cells = <2>; 387 interrupt-controller; 388 #interrupt-cells = <2>; 389 }; 390 391 io_expander_b: gpio@21 { 392 compatible = "onnn,pca9654"; 393 reg = <0x21>; 394 gpio-controller; 395 #gpio-cells = <2>; 396 }; 397 398 io_expander_c: gpio@22 { 399 compatible = "onnn,pca9654"; 400 reg = <0x22>; 401 gpio-controller; 402 #gpio-cells = <2>; 403 }; 404 405 eeprom@50 { 406 compatible = "rohm,br24g01", "atmel,24c01"; 407 label = "cpu-board"; 408 reg = <0x50>; 409 pagesize = <8>; 410 }; 411 412 eeprom@51 { 413 compatible = "rohm,br24g01", "atmel,24c01"; 414 label = "breakout-board"; 415 reg = <0x51>; 416 pagesize = <8>; 417 }; 418 419 eeprom@52 { 420 compatible = "rohm,br24g01", "atmel,24c01"; 421 label = "csi-dsi-sub-board-id"; 422 reg = <0x52>; 423 pagesize = <8>; 424 }; 425 426 eeprom@53 { 427 compatible = "rohm,br24g01", "atmel,24c01"; 428 label = "ethernet-sub-board-id"; 429 reg = <0x53>; 430 pagesize = <8>; 431 }; 432}; 433 434&i2c1 { 435 pinctrl-0 = <&i2c1_pins>; 436 pinctrl-names = "default"; 437 438 status = "okay"; 439 clock-frequency = <400000>; 440 441 bridge@2c { 442 pinctrl-0 = <&irq0_pins>; 443 pinctrl-names = "default"; 444 445 compatible = "ti,sn65dsi86"; 446 reg = <0x2c>; 447 448 clocks = <&sn65dsi86_refclk>; 449 clock-names = "refclk"; 450 451 interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_HIGH>; 452 453 enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 454 455 vccio-supply = <®_1p8v>; 456 vpll-supply = <®_1p8v>; 457 vcca-supply = <®_1p2v>; 458 vcc-supply = <®_1p2v>; 459 460 ports { 461 #address-cells = <1>; 462 #size-cells = <0>; 463 464 port@0 { 465 reg = <0>; 466 467 sn65dsi86_in0: endpoint { 468 remote-endpoint = <&dsi0_out>; 469 }; 470 }; 471 472 port@1 { 473 reg = <1>; 474 475 sn65dsi86_out0: endpoint { 476 remote-endpoint = <&mini_dp_con_in>; 477 }; 478 }; 479 }; 480 }; 481 482 gmsl0: gmsl-deserializer@4e { 483 compatible = "maxim,max96724"; 484 reg = <0x4e>; 485 enable-gpios = <&io_expander_b 0 GPIO_ACTIVE_HIGH>; 486 487 ports { 488 #address-cells = <1>; 489 #size-cells = <0>; 490 491 port@4 { 492 reg = <4>; 493 max96724_out0: endpoint { 494 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; 495 clock-lanes = <0>; 496 data-lanes = <1 2 3 4>; 497 remote-endpoint = <&csi40_in>; 498 }; 499 }; 500 }; 501 }; 502 503 gmsl1: gmsl-deserializer@4f { 504 compatible = "maxim,max96724"; 505 reg = <0x4f>; 506 enable-gpios = <&io_expander_c 0 GPIO_ACTIVE_HIGH>; 507 508 ports { 509 #address-cells = <1>; 510 #size-cells = <0>; 511 512 port@4 { 513 reg = <4>; 514 max96724_out1: endpoint { 515 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>; 516 clock-lanes = <0>; 517 data-lanes = <1 2 3 4>; 518 remote-endpoint = <&csi41_in>; 519 }; 520 }; 521 }; 522 }; 523}; 524 525&i2c3 { 526 pinctrl-0 = <&i2c3_pins>; 527 pinctrl-names = "default"; 528 529 status = "okay"; 530 clock-frequency = <400000>; 531 532 codec@10 { 533 compatible = "asahi-kasei,ak4619"; 534 reg = <0x10>; 535 536 clocks = <&rcar_sound>; 537 clock-names = "mclk"; 538 539 #sound-dai-cells = <0>; 540 port { 541 ak4619_endpoint: endpoint { 542 remote-endpoint = <&rsnd_endpoint>; 543 }; 544 }; 545 }; 546}; 547 548&isp0 { 549 status = "okay"; 550}; 551 552&isp1 { 553 status = "okay"; 554}; 555 556&mmc0 { 557 pinctrl-0 = <&mmc_pins>; 558 pinctrl-1 = <&mmc_pins>; 559 pinctrl-names = "default", "state_uhs"; 560 561 vmmc-supply = <®_3p3v>; 562 vqmmc-supply = <®_1p8v>; 563 mmc-hs200-1_8v; 564 mmc-hs400-1_8v; 565 bus-width = <8>; 566 no-sd; 567 no-sdio; 568 non-removable; 569 full-pwr-cycle-in-suspend; 570 status = "okay"; 571}; 572 573&pcie0_clkref { 574 compatible = "gpio-gate-clock"; 575 clocks = <&pcie_clk>; 576 enable-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>; 577 /delete-property/ clock-frequency; 578}; 579 580&pciec0 { 581 reset-gpios = <&io_expander_a 0 GPIO_ACTIVE_LOW>; 582 status = "okay"; 583}; 584 585&pfc { 586 pinctrl-0 = <&scif_clk_pins>, <&scif_clk2_pins>; 587 pinctrl-names = "default"; 588 589 avb0_pins: avb0 { 590 mux { 591 groups = "avb0_link", "avb0_mdio", "avb0_rgmii", 592 "avb0_txcrefclk"; 593 function = "avb0"; 594 }; 595 596 pins_mdio { 597 groups = "avb0_mdio"; 598 drive-strength = <21>; 599 }; 600 601 pins_mii { 602 groups = "avb0_rgmii"; 603 drive-strength = <21>; 604 }; 605 }; 606 607 avb1_pins: avb1 { 608 mux { 609 groups = "avb1_link", "avb1_mdio", "avb1_rgmii", 610 "avb1_txcrefclk"; 611 function = "avb1"; 612 }; 613 614 link { 615 groups = "avb1_link"; 616 bias-disable; 617 }; 618 619 mdio { 620 groups = "avb1_mdio"; 621 drive-strength = <24>; 622 bias-disable; 623 }; 624 625 rgmii { 626 groups = "avb1_rgmii"; 627 drive-strength = <24>; 628 bias-disable; 629 }; 630 }; 631 632 avb2_pins: avb2 { 633 mux { 634 groups = "avb2_link", "avb2_mdio", "avb2_rgmii", 635 "avb2_txcrefclk"; 636 function = "avb2"; 637 }; 638 639 link { 640 groups = "avb2_link"; 641 bias-disable; 642 }; 643 644 mdio { 645 groups = "avb2_mdio"; 646 drive-strength = <24>; 647 bias-disable; 648 }; 649 650 rgmii { 651 groups = "avb2_rgmii"; 652 drive-strength = <24>; 653 bias-disable; 654 }; 655 }; 656 657 can_clk_pins: can-clk { 658 groups = "can_clk"; 659 function = "can_clk"; 660 }; 661 662 canfd0_pins: canfd0 { 663 groups = "canfd0_data"; 664 function = "canfd0"; 665 }; 666 667 canfd1_pins: canfd1 { 668 groups = "canfd1_data"; 669 function = "canfd1"; 670 }; 671 672 hscif0_pins: hscif0 { 673 groups = "hscif0_data", "hscif0_ctrl"; 674 function = "hscif0"; 675 }; 676 677 hscif2_pins: hscif2 { 678 groups = "hscif2_data", "hscif2_ctrl"; 679 function = "hscif2"; 680 }; 681 682 i2c0_pins: i2c0 { 683 groups = "i2c0"; 684 function = "i2c0"; 685 }; 686 687 i2c1_pins: i2c1 { 688 groups = "i2c1"; 689 function = "i2c1"; 690 }; 691 692 i2c3_pins: i2c3 { 693 groups = "i2c3"; 694 function = "i2c3"; 695 }; 696 697 irq0_pins: irq0_pins { 698 groups = "intc_ex_irq0_a"; 699 function = "intc_ex"; 700 }; 701 702 keys_pins: keys { 703 pins = "GP_5_0", "GP_5_1", "GP_5_2"; 704 bias-pull-up; 705 }; 706 707 mmc_pins: mmc { 708 groups = "mmc_data8", "mmc_ctrl", "mmc_ds"; 709 function = "mmc"; 710 power-source = <1800>; 711 }; 712 713 qspi0_pins: qspi0 { 714 groups = "qspi0_ctrl", "qspi0_data4"; 715 function = "qspi0"; 716 }; 717 718 scif_clk_pins: scif-clk { 719 groups = "scif_clk"; 720 function = "scif_clk"; 721 }; 722 723 scif_clk2_pins: scif-clk2 { 724 groups = "scif_clk2"; 725 function = "scif_clk2"; 726 }; 727 728 sound_clk_pins: sound_clk { 729 groups = "audio_clkin", "audio_clkout"; 730 function = "audio_clk"; 731 }; 732 733 sound_pins: sound { 734 groups = "ssi_ctrl", "ssi_data"; 735 function = "ssi"; 736 }; 737}; 738 739&rcar_sound { 740 pinctrl-0 = <&sound_clk_pins>, <&sound_pins>; 741 pinctrl-names = "default"; 742 743 status = "okay"; 744 745 /* audio_clkout */ 746 clock-frequency = <12288000>; 747 748 ports { 749 rsnd_port: port { 750 rsnd_endpoint: endpoint { 751 remote-endpoint = <&ak4619_endpoint>; 752 bitclock-master; 753 frame-master; 754 755 /* see above [How to use Sound] */ 756 playback = <&ssi0>; 757 capture = <&ssi0>; 758 }; 759 }; 760 }; 761}; 762 763&rpc { 764 pinctrl-0 = <&qspi0_pins>; 765 pinctrl-names = "default"; 766 767 status = "okay"; 768 769 flash@0 { 770 compatible = "spansion,s25fs512s", "jedec,spi-nor"; 771 reg = <0>; 772 spi-max-frequency = <40000000>; 773 spi-rx-bus-width = <4>; 774 775 partitions { 776 compatible = "fixed-partitions"; 777 #address-cells = <1>; 778 #size-cells = <1>; 779 780 boot@0 { 781 reg = <0x0 0x1200000>; 782 read-only; 783 }; 784 user@1200000 { 785 reg = <0x1200000 0x2e00000>; 786 }; 787 }; 788 }; 789}; 790 791&rwdt { 792 timeout-sec = <60>; 793 status = "okay"; 794}; 795 796&scif_clk { 797 clock-frequency = <24000000>; 798}; 799 800&scif_clk2 { 801 clock-frequency = <24000000>; 802}; 803 804&vin00 { 805 status = "okay"; 806}; 807 808&vin01 { 809 status = "okay"; 810}; 811 812&vin02 { 813 status = "okay"; 814}; 815 816&vin03 { 817 status = "okay"; 818}; 819 820&vin04 { 821 status = "okay"; 822}; 823 824&vin05 { 825 status = "okay"; 826}; 827 828&vin06 { 829 status = "okay"; 830}; 831 832&vin07 { 833 status = "okay"; 834}; 835 836&vin08 { 837 status = "okay"; 838}; 839 840&vin09 { 841 status = "okay"; 842}; 843 844&vin10 { 845 status = "okay"; 846}; 847 848&vin11 { 849 status = "okay"; 850}; 851 852&vin12 { 853 status = "okay"; 854}; 855 856&vin13 { 857 status = "okay"; 858}; 859 860&vin14 { 861 status = "okay"; 862}; 863 864&vin15 { 865 status = "okay"; 866}; 867