1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 * Copyright (c) 2025 Dale Whinham <daleyo@gmail.com> 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/input/gpio-keys.h> 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11 12#include "hamoa-pmics.dtsi" 13 14/ { 15 aliases { 16 serial0 = &uart2; 17 serial1 = &uart14; 18 }; 19 20 gpio-keys { 21 compatible = "gpio-keys"; 22 23 pinctrl-0 = <&hall_int_n_default>; 24 pinctrl-names = "default"; 25 26 switch-lid { 27 gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; 28 linux,input-type = <EV_SW>; 29 linux,code = <SW_LID>; 30 wakeup-source; 31 wakeup-event-action = <EV_ACT_DEASSERTED>; 32 }; 33 }; 34 35 pmic-glink { 36 compatible = "qcom,x1e80100-pmic-glink", 37 "qcom,sm8550-pmic-glink", 38 "qcom,pmic-glink"; 39 #address-cells = <1>; 40 #size-cells = <0>; 41 orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>, 42 <&tlmm 123 GPIO_ACTIVE_HIGH>; 43 44 /* Left-side bottom port */ 45 connector@0 { 46 compatible = "usb-c-connector"; 47 reg = <0>; 48 power-role = "dual"; 49 data-role = "dual"; 50 51 ports { 52 #address-cells = <1>; 53 #size-cells = <0>; 54 55 port@0 { 56 reg = <0>; 57 58 pmic_glink_ss0_hs_in: endpoint { 59 remote-endpoint = <&usb_1_ss0_dwc3_hs>; 60 }; 61 }; 62 63 port@1 { 64 reg = <1>; 65 66 pmic_glink_ss0_ss_in: endpoint { 67 remote-endpoint = <&retimer_ss0_ss_out>; 68 }; 69 }; 70 71 port@2 { 72 reg = <2>; 73 74 pmic_glink_ss0_con_sbu_in: endpoint { 75 remote-endpoint = <&retimer_ss0_con_sbu_out>; 76 }; 77 }; 78 }; 79 }; 80 81 /* Left-side top port */ 82 connector@1 { 83 compatible = "usb-c-connector"; 84 reg = <1>; 85 power-role = "dual"; 86 data-role = "dual"; 87 88 ports { 89 #address-cells = <1>; 90 #size-cells = <0>; 91 92 port@0 { 93 reg = <0>; 94 95 pmic_glink_ss1_hs_in: endpoint { 96 remote-endpoint = <&usb_1_ss1_dwc3_hs>; 97 }; 98 }; 99 100 port@1 { 101 reg = <1>; 102 103 pmic_glink_ss1_ss_in: endpoint { 104 remote-endpoint = <&retimer_ss1_ss_out>; 105 }; 106 }; 107 108 port@2 { 109 reg = <2>; 110 111 pmic_glink_ss1_con_sbu_in: endpoint { 112 remote-endpoint = <&retimer_ss1_con_sbu_out>; 113 }; 114 }; 115 }; 116 }; 117 }; 118 119 reserved-memory { 120 linux,cma { 121 compatible = "shared-dma-pool"; 122 size = <0x0 0x8000000>; 123 reusable; 124 linux,cma-default; 125 }; 126 }; 127 128 vreg_edp_3p3: regulator-edp-3p3 { 129 compatible = "regulator-fixed"; 130 131 regulator-name = "VREG_EDP_3P3"; 132 regulator-min-microvolt = <3300000>; 133 regulator-max-microvolt = <3300000>; 134 135 gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>; 136 enable-active-high; 137 138 pinctrl-0 = <&edp_reg_en>; 139 pinctrl-names = "default"; 140 141 regulator-boot-on; 142 }; 143 144 vreg_rtmr0_1p15: regulator-rtmr0-1p15 { 145 compatible = "regulator-fixed"; 146 147 regulator-name = "VREG_RTMR0_1P15"; 148 149 regulator-min-microvolt = <1150000>; 150 regulator-max-microvolt = <1150000>; 151 152 gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; 153 enable-active-high; 154 155 pinctrl-0 = <&rtmr0_1p15_reg_en>; 156 pinctrl-names = "default"; 157 158 regulator-boot-on; 159 }; 160 161 vreg_rtmr0_1p8: regulator-rtmr0-1p8 { 162 compatible = "regulator-fixed"; 163 164 regulator-name = "VREG_RTMR0_1P8"; 165 166 regulator-min-microvolt = <1800000>; 167 regulator-max-microvolt = <1800000>; 168 169 gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; 170 enable-active-high; 171 172 pinctrl-0 = <&rtmr0_1p8_reg_en>; 173 pinctrl-names = "default"; 174 175 regulator-boot-on; 176 }; 177 178 vreg_rtmr0_3p3: regulator-rtmr0-3p3 { 179 compatible = "regulator-fixed"; 180 181 regulator-name = "VREG_RTMR0_3P3"; 182 183 regulator-min-microvolt = <3300000>; 184 regulator-max-microvolt = <3300000>; 185 186 gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; 187 enable-active-high; 188 189 pinctrl-0 = <&rtmr0_3p3_reg_en>; 190 pinctrl-names = "default"; 191 192 regulator-boot-on; 193 }; 194 195 vreg_rtmr1_1p15: regulator-rtmr1-1p15 { 196 compatible = "regulator-fixed"; 197 198 regulator-name = "VREG_RTMR1_1P15"; 199 200 regulator-min-microvolt = <1150000>; 201 regulator-max-microvolt = <1150000>; 202 203 gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>; 204 enable-active-high; 205 206 pinctrl-0 = <&rtmr1_1p15_reg_en>; 207 pinctrl-names = "default"; 208 209 regulator-boot-on; 210 }; 211 212 vreg_rtmr1_1p8: regulator-rtmr1-1p8 { 213 compatible = "regulator-fixed"; 214 215 regulator-name = "VREG_RTMR1_1P8"; 216 217 regulator-min-microvolt = <1800000>; 218 regulator-max-microvolt = <1800000>; 219 220 gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>; 221 enable-active-high; 222 223 pinctrl-0 = <&rtmr1_1p8_reg_en>; 224 pinctrl-names = "default"; 225 226 regulator-boot-on; 227 }; 228 229 vreg_rtmr1_3p3: regulator-rtmr1-3p3 { 230 compatible = "regulator-fixed"; 231 232 regulator-name = "VREG_RTMR1_3P3"; 233 234 regulator-min-microvolt = <3300000>; 235 regulator-max-microvolt = <3300000>; 236 237 gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>; 238 enable-active-high; 239 240 pinctrl-0 = <&rtmr1_3p3_reg_en>; 241 pinctrl-names = "default"; 242 243 regulator-boot-on; 244 }; 245 246 vreg_nvme: regulator-nvme { 247 compatible = "regulator-fixed"; 248 249 regulator-name = "VREG_NVME_3P3"; 250 regulator-min-microvolt = <3300000>; 251 regulator-max-microvolt = <3300000>; 252 253 gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>; 254 enable-active-high; 255 256 pinctrl-0 = <&nvme_reg_en>; 257 pinctrl-names = "default"; 258 259 regulator-boot-on; 260 }; 261 262 vph_pwr: regulator-vph-pwr { 263 compatible = "regulator-fixed"; 264 265 regulator-name = "vph_pwr"; 266 regulator-min-microvolt = <3700000>; 267 regulator-max-microvolt = <3700000>; 268 269 regulator-always-on; 270 regulator-boot-on; 271 }; 272 273 vreg_wcn_3p3: regulator-wcn-3p3 { 274 compatible = "regulator-fixed"; 275 276 regulator-name = "VREG_WCN_3P3"; 277 regulator-min-microvolt = <3300000>; 278 regulator-max-microvolt = <3300000>; 279 280 gpio = <&tlmm 214 GPIO_ACTIVE_HIGH>; 281 enable-active-high; 282 283 pinctrl-0 = <&wcn_sw_en>; 284 pinctrl-names = "default"; 285 286 regulator-boot-on; 287 }; 288 289 vreg_wcn_0p95: regulator-wcn-0p95 { 290 compatible = "regulator-fixed"; 291 292 regulator-name = "VREG_WCN_0P95"; 293 regulator-min-microvolt = <950000>; 294 regulator-max-microvolt = <950000>; 295 296 vin-supply = <&vreg_wcn_3p3>; 297 }; 298 299 vreg_wcn_1p9: regulator-wcn-1p9 { 300 compatible = "regulator-fixed"; 301 302 regulator-name = "VREG_WCN_1P9"; 303 regulator-min-microvolt = <1900000>; 304 regulator-max-microvolt = <1900000>; 305 306 vin-supply = <&vreg_wcn_3p3>; 307 }; 308 309 sound { 310 compatible = "qcom,x1e80100-sndcard"; 311 model = "X1E80100-Microsoft-Surface-Pro-11"; 312 audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT", 313 "SpkrRight IN", "WSA WSA_SPK2 OUT", 314 "VA DMIC0", "vdd-micb", 315 "VA DMIC1", "vdd-micb"; 316 317 wsa-dai-link { 318 link-name = "WSA Playback"; 319 320 codec { 321 sound-dai = <&left_spkr>, <&right_spkr>, 322 <&swr0 0>, <&lpass_wsamacro 0>; 323 }; 324 325 cpu { 326 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; 327 }; 328 329 platform { 330 sound-dai = <&q6apm>; 331 }; 332 }; 333 334 va-dai-link { 335 link-name = "VA Capture"; 336 337 codec { 338 sound-dai = <&lpass_vamacro 0>; 339 }; 340 341 cpu { 342 sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>; 343 }; 344 345 platform { 346 sound-dai = <&q6apm>; 347 }; 348 }; 349 }; 350 351 wcn7850-pmu { 352 compatible = "qcom,wcn7850-pmu"; 353 354 vdd-supply = <&vreg_wcn_0p95>; 355 vddio-supply = <&vreg_l15b_1p8>; 356 vddaon-supply = <&vreg_wcn_0p95>; 357 vdddig-supply = <&vreg_wcn_0p95>; 358 vddrfa1p2-supply = <&vreg_wcn_1p9>; 359 vddrfa1p8-supply = <&vreg_wcn_1p9>; 360 361 wlan-enable-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>; 362 bt-enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>; 363 364 pinctrl-0 = <&wcn_wlan_bt_en>; 365 pinctrl-names = "default"; 366 367 regulators { 368 vreg_pmu_rfa_cmn: ldo0 { 369 regulator-name = "vreg_pmu_rfa_cmn"; 370 }; 371 372 vreg_pmu_aon_0p59: ldo1 { 373 regulator-name = "vreg_pmu_aon_0p59"; 374 }; 375 376 vreg_pmu_wlcx_0p8: ldo2 { 377 regulator-name = "vreg_pmu_wlcx_0p8"; 378 }; 379 380 vreg_pmu_wlmx_0p85: ldo3 { 381 regulator-name = "vreg_pmu_wlmx_0p85"; 382 }; 383 384 vreg_pmu_btcmx_0p85: ldo4 { 385 regulator-name = "vreg_pmu_btcmx_0p85"; 386 }; 387 388 vreg_pmu_rfa_0p8: ldo5 { 389 regulator-name = "vreg_pmu_rfa_0p8"; 390 }; 391 392 vreg_pmu_rfa_1p2: ldo6 { 393 regulator-name = "vreg_pmu_rfa_1p2"; 394 }; 395 396 vreg_pmu_rfa_1p8: ldo7 { 397 regulator-name = "vreg_pmu_rfa_1p8"; 398 }; 399 400 vreg_pmu_pcie_0p9: ldo8 { 401 regulator-name = "vreg_pmu_pcie_0p9"; 402 }; 403 404 vreg_pmu_pcie_1p8: ldo9 { 405 regulator-name = "vreg_pmu_pcie_1p8"; 406 }; 407 }; 408 }; 409}; 410 411&apps_rsc { 412 regulators-0 { 413 compatible = "qcom,pm8550-rpmh-regulators"; 414 qcom,pmic-id = "b"; 415 416 vdd-bob1-supply = <&vph_pwr>; 417 vdd-bob2-supply = <&vph_pwr>; 418 vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>; 419 vdd-l2-l13-l14-supply = <&vreg_bob1>; 420 vdd-l5-l16-supply = <&vreg_bob1>; 421 vdd-l6-l7-supply = <&vreg_bob2>; 422 vdd-l8-l9-supply = <&vreg_bob1>; 423 vdd-l12-supply = <&vreg_s5j_1p2>; 424 vdd-l15-supply = <&vreg_s4c_1p8>; 425 vdd-l17-supply = <&vreg_bob2>; 426 427 vreg_bob1: bob1 { 428 regulator-name = "vreg_bob1"; 429 regulator-min-microvolt = <3008000>; 430 regulator-max-microvolt = <3960000>; 431 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 432 }; 433 434 vreg_bob2: bob2 { 435 regulator-name = "vreg_bob2"; 436 regulator-min-microvolt = <2504000>; 437 regulator-max-microvolt = <3008000>; 438 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 439 }; 440 441 vreg_l1b_1p8: ldo1 { 442 regulator-name = "vreg_l1b_1p8"; 443 regulator-min-microvolt = <1800000>; 444 regulator-max-microvolt = <1800000>; 445 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 446 }; 447 448 vreg_l2b_3p0: ldo2 { 449 regulator-name = "vreg_l2b_3p0"; 450 regulator-min-microvolt = <3072000>; 451 regulator-max-microvolt = <3072000>; 452 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 453 }; 454 455 vreg_l4b_1p8: ldo4 { 456 regulator-name = "vreg_l4b_1p8"; 457 regulator-min-microvolt = <1800000>; 458 regulator-max-microvolt = <1800000>; 459 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 460 }; 461 462 vreg_l6b_1p8: ldo6 { 463 regulator-name = "vreg_l6b_1p8"; 464 regulator-min-microvolt = <1800000>; 465 regulator-max-microvolt = <2960000>; 466 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 467 }; 468 469 vreg_l8b_3p0: ldo8 { 470 regulator-name = "vreg_l8b_3p0"; 471 regulator-min-microvolt = <3072000>; 472 regulator-max-microvolt = <3072000>; 473 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 474 }; 475 476 vreg_l9b_2p9: ldo9 { 477 regulator-name = "vreg_l9b_2p9"; 478 regulator-min-microvolt = <2960000>; 479 regulator-max-microvolt = <2960000>; 480 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 481 }; 482 483 vreg_l10b_1p8: ldo10 { 484 regulator-name = "vreg_l10b_1p8"; 485 regulator-min-microvolt = <1800000>; 486 regulator-max-microvolt = <1800000>; 487 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 488 }; 489 490 vreg_l12b_1p2: ldo12 { 491 regulator-name = "vreg_l12b_1p2"; 492 regulator-min-microvolt = <1200000>; 493 regulator-max-microvolt = <1200000>; 494 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 495 }; 496 497 vreg_l13b_3p0: ldo13 { 498 regulator-name = "vreg_l13b_3p0"; 499 regulator-min-microvolt = <3072000>; 500 regulator-max-microvolt = <3072000>; 501 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 502 }; 503 504 vreg_l14b_3p0: ldo14 { 505 regulator-name = "vreg_l14b_3p0"; 506 regulator-min-microvolt = <3072000>; 507 regulator-max-microvolt = <3072000>; 508 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 509 }; 510 511 vreg_l15b_1p8: ldo15 { 512 regulator-name = "vreg_l15b_1p8"; 513 regulator-min-microvolt = <1800000>; 514 regulator-max-microvolt = <1800000>; 515 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 516 }; 517 518 vreg_l17b_2p5: ldo17 { 519 regulator-name = "vreg_l17b_2p5"; 520 regulator-min-microvolt = <2504000>; 521 regulator-max-microvolt = <2504000>; 522 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 523 }; 524 }; 525 526 regulators-1 { 527 compatible = "qcom,pm8550ve-rpmh-regulators"; 528 qcom,pmic-id = "c"; 529 530 vdd-l1-supply = <&vreg_s5j_1p2>; 531 vdd-l2-supply = <&vreg_s1f_0p7>; 532 vdd-l3-supply = <&vreg_s1f_0p7>; 533 vdd-s4-supply = <&vph_pwr>; 534 535 vreg_s4c_1p8: smps4 { 536 regulator-name = "vreg_s4c_1p8"; 537 regulator-min-microvolt = <1856000>; 538 regulator-max-microvolt = <2000000>; 539 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 540 }; 541 542 vreg_l1c_1p2: ldo1 { 543 regulator-name = "vreg_l1c_1p2"; 544 regulator-min-microvolt = <1200000>; 545 regulator-max-microvolt = <1200000>; 546 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 547 }; 548 549 vreg_l2c_0p8: ldo2 { 550 regulator-name = "vreg_l2c_0p8"; 551 regulator-min-microvolt = <880000>; 552 regulator-max-microvolt = <880000>; 553 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 554 }; 555 556 vreg_l3c_0p8: ldo3 { 557 regulator-name = "vreg_l3c_0p8"; 558 regulator-min-microvolt = <912000>; 559 regulator-max-microvolt = <912000>; 560 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 561 }; 562 }; 563 564 regulators-2 { 565 compatible = "qcom,pmc8380-rpmh-regulators"; 566 qcom,pmic-id = "d"; 567 568 vdd-l1-supply = <&vreg_s1f_0p7>; 569 vdd-l2-supply = <&vreg_s1f_0p7>; 570 vdd-l3-supply = <&vreg_s4c_1p8>; 571 vdd-s1-supply = <&vph_pwr>; 572 573 vreg_l1d_0p8: ldo1 { 574 regulator-name = "vreg_l1d_0p8"; 575 regulator-min-microvolt = <880000>; 576 regulator-max-microvolt = <880000>; 577 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 578 }; 579 580 vreg_l2d_0p9: ldo2 { 581 regulator-name = "vreg_l2d_0p9"; 582 regulator-min-microvolt = <912000>; 583 regulator-max-microvolt = <912000>; 584 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 585 }; 586 587 vreg_l3d_1p8: ldo3 { 588 regulator-name = "vreg_l3d_1p8"; 589 regulator-min-microvolt = <1800000>; 590 regulator-max-microvolt = <1800000>; 591 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 592 }; 593 }; 594 595 regulators-3 { 596 compatible = "qcom,pmc8380-rpmh-regulators"; 597 qcom,pmic-id = "e"; 598 599 vdd-l2-supply = <&vreg_s1f_0p7>; 600 vdd-l3-supply = <&vreg_s5j_1p2>; 601 602 vreg_l2e_0p8: ldo2 { 603 regulator-name = "vreg_l2e_0p8"; 604 regulator-min-microvolt = <880000>; 605 regulator-max-microvolt = <880000>; 606 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 607 }; 608 609 vreg_l3e_1p2: ldo3 { 610 regulator-name = "vreg_l3e_1p2"; 611 regulator-min-microvolt = <1200000>; 612 regulator-max-microvolt = <1200000>; 613 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 614 }; 615 }; 616 617 regulators-4 { 618 compatible = "qcom,pmc8380-rpmh-regulators"; 619 qcom,pmic-id = "f"; 620 621 vdd-l1-supply = <&vreg_s5j_1p2>; 622 vdd-l2-supply = <&vreg_s5j_1p2>; 623 vdd-l3-supply = <&vreg_s5j_1p2>; 624 vdd-s1-supply = <&vph_pwr>; 625 626 vreg_s1f_0p7: smps1 { 627 regulator-name = "vreg_s1f_0p7"; 628 regulator-min-microvolt = <700000>; 629 regulator-max-microvolt = <1100000>; 630 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 631 }; 632 }; 633 634 regulators-6 { 635 compatible = "qcom,pm8550ve-rpmh-regulators"; 636 qcom,pmic-id = "i"; 637 638 vdd-l1-supply = <&vreg_s4c_1p8>; 639 vdd-l2-supply = <&vreg_s5j_1p2>; 640 vdd-l3-supply = <&vreg_s1f_0p7>; 641 vdd-s1-supply = <&vph_pwr>; 642 vdd-s2-supply = <&vph_pwr>; 643 644 vreg_s1i_0p9: smps1 { 645 regulator-name = "vreg_s1i_0p9"; 646 regulator-min-microvolt = <900000>; 647 regulator-max-microvolt = <920000>; 648 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 649 }; 650 651 vreg_s2i_1p0: smps2 { 652 regulator-name = "vreg_s2i_1p0"; 653 regulator-min-microvolt = <1000000>; 654 regulator-max-microvolt = <1100000>; 655 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 656 }; 657 658 vreg_l1i_1p8: ldo1 { 659 regulator-name = "vreg_l1i_1p8"; 660 regulator-min-microvolt = <1800000>; 661 regulator-max-microvolt = <1800000>; 662 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 663 }; 664 665 vreg_l2i_1p2: ldo2 { 666 regulator-name = "vreg_l2i_1p2"; 667 regulator-min-microvolt = <1200000>; 668 regulator-max-microvolt = <1200000>; 669 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 670 }; 671 672 vreg_l3i_0p8: ldo3 { 673 regulator-name = "vreg_l3i_0p8"; 674 regulator-min-microvolt = <880000>; 675 regulator-max-microvolt = <880000>; 676 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 677 }; 678 }; 679 680 regulators-7 { 681 compatible = "qcom,pm8550ve-rpmh-regulators"; 682 qcom,pmic-id = "j"; 683 684 vdd-l1-supply = <&vreg_s1f_0p7>; 685 vdd-l2-supply = <&vreg_s5j_1p2>; 686 vdd-l3-supply = <&vreg_s1f_0p7>; 687 vdd-s5-supply = <&vph_pwr>; 688 689 vreg_s5j_1p2: smps5 { 690 regulator-name = "vreg_s5j_1p2"; 691 regulator-min-microvolt = <1256000>; 692 regulator-max-microvolt = <1304000>; 693 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 694 }; 695 696 vreg_l1j_0p8: ldo1 { 697 regulator-name = "vreg_l1j_0p8"; 698 regulator-min-microvolt = <912000>; 699 regulator-max-microvolt = <912000>; 700 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 701 }; 702 703 vreg_l2j_1p2: ldo2 { 704 regulator-name = "vreg_l2j_1p2"; 705 regulator-min-microvolt = <1256000>; 706 regulator-max-microvolt = <1256000>; 707 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 708 }; 709 710 vreg_l3j_0p8: ldo3 { 711 regulator-name = "vreg_l3j_0p8"; 712 regulator-min-microvolt = <880000>; 713 regulator-max-microvolt = <880000>; 714 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 715 }; 716 }; 717}; 718 719&gpu { 720 status = "okay"; 721 722 zap-shader { 723 memory-region = <&gpu_microcode_mem>; 724 firmware-name = "qcom/x1e80100/microsoft/qcdxkmsuc8380.mbn"; 725 }; 726}; 727 728&i2c0 { 729 clock-frequency = <100000>; 730 731 status = "okay"; 732 733 /* Something @39, @3e, @44 */ 734}; 735 736&i2c3 { 737 clock-frequency = <400000>; 738 739 status = "okay"; 740 741 /* Left-side bottom port */ 742 typec-mux@8 { 743 compatible = "parade,ps8830"; 744 reg = <0x8>; 745 746 reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>; 747 748 clocks = <&rpmhcc RPMH_RF_CLK3>; 749 750 vdd-supply = <&vreg_rtmr0_1p15>; 751 vdd33-supply = <&vreg_rtmr0_3p3>; 752 vdd33-cap-supply = <&vreg_rtmr0_3p3>; 753 vddar-supply = <&vreg_rtmr0_1p15>; 754 vddat-supply = <&vreg_rtmr0_1p15>; 755 vddio-supply = <&vreg_rtmr0_1p8>; 756 757 pinctrl-0 = <&rtmr0_default>; 758 pinctrl-names = "default"; 759 760 retimer-switch; 761 orientation-switch; 762 763 ports { 764 #address-cells = <1>; 765 #size-cells = <0>; 766 767 port@0 { 768 reg = <0>; 769 770 retimer_ss0_ss_out: endpoint { 771 remote-endpoint = <&pmic_glink_ss0_ss_in>; 772 }; 773 }; 774 775 port@1 { 776 reg = <1>; 777 778 retimer_ss0_ss_in: endpoint { 779 remote-endpoint = <&usb_1_ss0_qmpphy_out>; 780 }; 781 }; 782 783 port@2 { 784 reg = <2>; 785 786 retimer_ss0_con_sbu_out: endpoint { 787 remote-endpoint = <&pmic_glink_ss0_con_sbu_in>; 788 }; 789 }; 790 }; 791 }; 792}; 793 794&i2c4 { 795 clock-frequency = <400000>; 796 797 status = "okay"; 798 799 /* Something @12, @14, @16, @18, @1a */ 800}; 801 802&i2c7 { 803 clock-frequency = <400000>; 804 805 status = "okay"; 806 807 /* Left-side top port */ 808 typec-mux@8 { 809 compatible = "parade,ps8830"; 810 reg = <0x8>; 811 812 reset-gpios = <&tlmm 176 GPIO_ACTIVE_LOW>; 813 814 clocks = <&rpmhcc RPMH_RF_CLK4>; 815 816 vdd-supply = <&vreg_rtmr1_1p15>; 817 vdd33-supply = <&vreg_rtmr1_3p3>; 818 vdd33-cap-supply = <&vreg_rtmr1_3p3>; 819 vddar-supply = <&vreg_rtmr1_1p15>; 820 vddat-supply = <&vreg_rtmr1_1p15>; 821 vddio-supply = <&vreg_rtmr1_1p8>; 822 823 retimer-switch; 824 orientation-switch; 825 826 ports { 827 #address-cells = <1>; 828 #size-cells = <0>; 829 830 port@0 { 831 reg = <0>; 832 833 retimer_ss1_ss_out: endpoint { 834 remote-endpoint = <&pmic_glink_ss1_ss_in>; 835 }; 836 }; 837 838 port@1 { 839 reg = <1>; 840 841 retimer_ss1_ss_in: endpoint { 842 remote-endpoint = <&usb_1_ss1_qmpphy_out>; 843 }; 844 }; 845 846 port@2 { 847 reg = <2>; 848 849 retimer_ss1_con_sbu_out: endpoint { 850 remote-endpoint = <&pmic_glink_ss1_con_sbu_in>; 851 }; 852 }; 853 }; 854 }; 855}; 856 857&lpass_tlmm { 858 spkr_01_sd_n_active: spkr-01-sd-n-active-state { 859 pins = "gpio12"; 860 function = "gpio"; 861 drive-strength = <16>; 862 bias-disable; 863 }; 864}; 865 866&lpass_vamacro { 867 pinctrl-0 = <&dmic01_default>, <&dmic23_default>; 868 pinctrl-names = "default"; 869 870 vdd-micb-supply = <&vreg_l1b_1p8>; 871 qcom,dmic-sample-rate = <4800000>; 872}; 873 874&mdss { 875 status = "okay"; 876}; 877 878&mdss_dp0 { 879 status = "okay"; 880}; 881 882&mdss_dp0_out { 883 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 884}; 885 886&mdss_dp1 { 887 status = "okay"; 888}; 889 890&mdss_dp1_out { 891 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 892}; 893 894&mdss_dp3 { 895 compatible = "qcom,x1e80100-dp"; 896 /delete-property/ #sound-dai-cells; 897 898 status = "okay"; 899 900 aux-bus { 901 panel: panel { 902 compatible = "edp-panel"; 903 enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>; 904 power-supply = <&vreg_edp_3p3>; 905 906 pinctrl-0 = <&edp_bl_en>; 907 pinctrl-names = "default"; 908 909 port { 910 edp_panel_in: endpoint { 911 remote-endpoint = <&mdss_dp3_out>; 912 }; 913 }; 914 }; 915 }; 916 917 ports { 918 port@1 { 919 reg = <1>; 920 921 mdss_dp3_out: endpoint { 922 data-lanes = <0 1 2 3>; 923 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 924 925 remote-endpoint = <&edp_panel_in>; 926 }; 927 }; 928 }; 929}; 930 931&mdss_dp3_phy { 932 vdda-phy-supply = <&vreg_l3j_0p8>; 933 vdda-pll-supply = <&vreg_l2j_1p2>; 934 935 status = "okay"; 936}; 937 938&pcie4 { 939 status = "okay"; 940}; 941 942&pcie4_phy { 943 vdda-phy-supply = <&vreg_l3i_0p8>; 944 vdda-pll-supply = <&vreg_l3e_1p2>; 945 946 status = "okay"; 947}; 948 949&pcie4_port0 { 950 wifi@0 { 951 compatible = "pci17cb,1107"; 952 reg = <0x10000 0x0 0x0 0x0 0x0>; 953 954 vddaon-supply = <&vreg_pmu_aon_0p59>; 955 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 956 vddwlmx-supply = <&vreg_pmu_wlmx_0p85>; 957 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; 958 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 959 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 960 vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>; 961 vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>; 962 vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>; 963 }; 964}; 965 966&pcie6a { 967 perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; 968 wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; 969 970 vddpe-3v3-supply = <&vreg_nvme>; 971 972 pinctrl-0 = <&pcie6a_default>; 973 pinctrl-names = "default"; 974 975 status = "okay"; 976}; 977 978&pcie6a_phy { 979 vdda-phy-supply = <&vreg_l1d_0p8>; 980 vdda-pll-supply = <&vreg_l2j_1p2>; 981 982 status = "okay"; 983}; 984 985&pm8550_gpios { 986 rtmr0_default: rtmr0-reset-n-active-state { 987 pins = "gpio10"; 988 function = "normal"; 989 power-source = <1>; /* 1.8V */ 990 }; 991 992 rtmr0_3p3_reg_en: rtmr0-3p3-reg-en-state { 993 pins = "gpio11"; 994 function = "normal"; 995 power-source = <1>; /* 1.8V */ 996 }; 997}; 998 999&pm8550ve_9_gpios { 1000 rtmr0_1p8_reg_en: rtmr0-1p8-reg-en-state { 1001 pins = "gpio8"; 1002 function = "normal"; 1003 power-source = <1>; /* 1.8V */ 1004 }; 1005}; 1006 1007&pmc8380_3_gpios { 1008 edp_bl_en: edp-bl-en-state { 1009 pins = "gpio4"; 1010 function = "normal"; 1011 power-source = <1>; /* 1.8V */ 1012 input-disable; 1013 output-enable; 1014 }; 1015}; 1016 1017&pmc8380_5_gpios { 1018 rtmr0_1p15_reg_en: rtmr0-1p15-reg-en-state { 1019 pins = "gpio8"; 1020 function = "normal"; 1021 power-source = <1>; /* 1.8V */ 1022 }; 1023}; 1024 1025&qupv3_0 { 1026 status = "okay"; 1027}; 1028 1029&qupv3_1 { 1030 status = "okay"; 1031}; 1032 1033&qupv3_2 { 1034 status = "okay"; 1035}; 1036 1037&remoteproc_adsp { 1038 firmware-name = "qcom/x1e80100/microsoft/Denali/qcadsp8380.mbn", 1039 "qcom/x1e80100/microsoft/Denali/adsp_dtb.mbn"; 1040 1041 status = "okay"; 1042}; 1043 1044&remoteproc_cdsp { 1045 firmware-name = "qcom/x1e80100/microsoft/Denali/qccdsp8380.mbn", 1046 "qcom/x1e80100/microsoft/Denali/cdsp_dtb.mbn"; 1047 1048 status = "okay"; 1049}; 1050 1051&smb2360_0 { 1052 status = "okay"; 1053}; 1054 1055&smb2360_0_eusb2_repeater { 1056 vdd18-supply = <&vreg_l3d_1p8>; 1057 vdd3-supply = <&vreg_l2b_3p0>; 1058}; 1059 1060&smb2360_1 { 1061 status = "okay"; 1062}; 1063 1064&smb2360_1_eusb2_repeater { 1065 vdd18-supply = <&vreg_l3d_1p8>; 1066 vdd3-supply = <&vreg_l14b_3p0>; 1067}; 1068 1069&smb2360_2 { 1070 status = "okay"; 1071}; 1072 1073&smb2360_2_eusb2_repeater { 1074 vdd18-supply = <&vreg_l3d_1p8>; 1075 vdd3-supply = <&vreg_l8b_3p0>; 1076}; 1077 1078&swr0 { 1079 status = "okay"; 1080 1081 pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>; 1082 pinctrl-names = "default"; 1083 1084 /* WSA8845, Left Speaker */ 1085 left_spkr: speaker@0,0 { 1086 compatible = "sdw20217020400"; 1087 reg = <0 0>; 1088 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 1089 #sound-dai-cells = <0>; 1090 sound-name-prefix = "SpkrLeft"; 1091 vdd-1p8-supply = <&vreg_l15b_1p8>; 1092 vdd-io-supply = <&vreg_l12b_1p2>; 1093 qcom,port-mapping = <1 2 3 7 10 13>; 1094 }; 1095 1096 /* WSA8845, Right Speaker */ 1097 right_spkr: speaker@0,1 { 1098 compatible = "sdw20217020400"; 1099 reg = <0 1>; 1100 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 1101 #sound-dai-cells = <0>; 1102 sound-name-prefix = "SpkrRight"; 1103 vdd-1p8-supply = <&vreg_l15b_1p8>; 1104 vdd-io-supply = <&vreg_l12b_1p2>; 1105 qcom,port-mapping = <4 5 6 7 11 13>; 1106 }; 1107}; 1108 1109&tlmm { 1110 gpio-reserved-ranges = <44 4>, /* SPI (TPM) */ 1111 <238 1>; /* UFS Reset */ 1112 1113 hall_int_n_default: hall-int-n-state { 1114 pins = "gpio2"; 1115 function = "gpio"; 1116 bias-disable; 1117 }; 1118 1119 nvme_reg_en: nvme-reg-en-state { 1120 pins = "gpio18"; 1121 function = "gpio"; 1122 drive-strength = <2>; 1123 bias-disable; 1124 }; 1125 1126 edp_reg_en: edp-reg-en-state { 1127 pins = "gpio70"; 1128 function = "gpio"; 1129 drive-strength = <16>; 1130 bias-disable; 1131 }; 1132 1133 ssam_state: ssam-state-state { 1134 pins = "gpio91"; 1135 function = "gpio"; 1136 bias-disable; 1137 }; 1138 1139 wcn_wlan_bt_en: wcn-wlan-bt-en-state { 1140 pins = "gpio116", "gpio117"; 1141 function = "gpio"; 1142 drive-strength = <2>; 1143 bias-disable; 1144 }; 1145 1146 pcie4_default: pcie4-default-state { 1147 clkreq-n-pins { 1148 pins = "gpio147"; 1149 function = "pcie4_clk"; 1150 drive-strength = <2>; 1151 bias-pull-up; 1152 }; 1153 1154 perst-n-pins { 1155 pins = "gpio146"; 1156 function = "gpio"; 1157 drive-strength = <2>; 1158 bias-disable; 1159 }; 1160 1161 wake-n-pins { 1162 pins = "gpio148"; 1163 function = "gpio"; 1164 drive-strength = <2>; 1165 bias-pull-up; 1166 }; 1167 }; 1168 1169 pcie6a_default: pcie6a-default-state { 1170 perst-n-pins { 1171 pins = "gpio152"; 1172 function = "gpio"; 1173 drive-strength = <2>; 1174 bias-disable; 1175 }; 1176 1177 clkreq-n-pins { 1178 pins = "gpio153"; 1179 function = "pcie6a_clk"; 1180 drive-strength = <2>; 1181 bias-pull-up; 1182 }; 1183 1184 wake-n-pins { 1185 pins = "gpio154"; 1186 function = "gpio"; 1187 drive-strength = <2>; 1188 bias-pull-up; 1189 }; 1190 }; 1191 1192 rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state { 1193 pins = "gpio175"; 1194 function = "gpio"; 1195 drive-strength = <2>; 1196 bias-disable; 1197 }; 1198 1199 rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state { 1200 pins = "gpio186"; 1201 function = "gpio"; 1202 drive-strength = <2>; 1203 bias-disable; 1204 }; 1205 1206 rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state { 1207 pins = "gpio188"; 1208 function = "gpio"; 1209 drive-strength = <2>; 1210 bias-disable; 1211 }; 1212 1213 wcn_sw_en: wcn-sw-en-state { 1214 pins = "gpio214"; 1215 function = "gpio"; 1216 drive-strength = <2>; 1217 bias-disable; 1218 }; 1219 1220 cam_indicator_en: cam-indicator-en-state { 1221 pins = "gpio225"; 1222 function = "gpio"; 1223 drive-strength = <2>; 1224 bias-disable; 1225 }; 1226}; 1227 1228&uart2 { 1229 status = "okay"; 1230 1231 embedded-controller { 1232 compatible = "microsoft,surface-sam"; 1233 1234 interrupts-extended = <&tlmm 91 IRQ_TYPE_EDGE_RISING>; 1235 1236 current-speed = <4000000>; 1237 1238 pinctrl-0 = <&ssam_state>; 1239 pinctrl-names = "default"; 1240 }; 1241}; 1242 1243&uart14 { 1244 status = "okay"; 1245 1246 bluetooth { 1247 compatible = "qcom,wcn7850-bt"; 1248 max-speed = <3200000>; 1249 1250 vddaon-supply = <&vreg_pmu_aon_0p59>; 1251 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 1252 vddwlmx-supply = <&vreg_pmu_wlmx_0p85>; 1253 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; 1254 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 1255 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 1256 vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>; 1257 }; 1258}; 1259 1260&usb_1_ss0_hsphy { 1261 vdd-supply = <&vreg_l3j_0p8>; 1262 vdda12-supply = <&vreg_l2j_1p2>; 1263 1264 phys = <&smb2360_0_eusb2_repeater>; 1265 1266 status = "okay"; 1267}; 1268 1269&usb_1_ss0_qmpphy { 1270 vdda-phy-supply = <&vreg_l2j_1p2>; 1271 vdda-pll-supply = <&vreg_l1j_0p8>; 1272 1273 status = "okay"; 1274}; 1275 1276&usb_1_ss0 { 1277 status = "okay"; 1278}; 1279 1280&usb_1_ss0_dwc3 { 1281 dr_mode = "host"; 1282}; 1283 1284&usb_1_ss0_dwc3_hs { 1285 remote-endpoint = <&pmic_glink_ss0_hs_in>; 1286}; 1287 1288&usb_1_ss0_qmpphy_out { 1289 remote-endpoint = <&retimer_ss0_ss_in>; 1290}; 1291 1292&usb_1_ss1_hsphy { 1293 vdd-supply = <&vreg_l3j_0p8>; 1294 vdda12-supply = <&vreg_l2j_1p2>; 1295 1296 phys = <&smb2360_1_eusb2_repeater>; 1297 1298 status = "okay"; 1299}; 1300 1301&usb_1_ss1_qmpphy { 1302 vdda-phy-supply = <&vreg_l2j_1p2>; 1303 vdda-pll-supply = <&vreg_l2d_0p9>; 1304 1305 status = "okay"; 1306}; 1307 1308&usb_1_ss1 { 1309 status = "okay"; 1310}; 1311 1312&usb_1_ss1_dwc3 { 1313 dr_mode = "host"; 1314}; 1315 1316&usb_1_ss1_dwc3_hs { 1317 remote-endpoint = <&pmic_glink_ss1_hs_in>; 1318}; 1319 1320&usb_1_ss1_qmpphy_out { 1321 remote-endpoint = <&retimer_ss1_ss_in>; 1322}; 1323