1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2024 Linaro Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/leds/common.h> 9#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 10#include "sm8550.dtsi" 11#include "pm8010.dtsi" 12#include "pm8550.dtsi" 13#include "pm8550b.dtsi" 14#define PMK8550VE_SID 5 15#include "pm8550ve.dtsi" 16#include "pm8550vs.dtsi" 17#include "pmk8550.dtsi" 18#include "pmr735d_a.dtsi" 19 20/ { 21 model = "Qualcomm Technologies, Inc. SM8550 HDK"; 22 compatible = "qcom,sm8550-hdk", "qcom,sm8550"; 23 chassis-type = "embedded"; 24 25 aliases { 26 serial0 = &uart7; 27 serial1 = &uart14; 28 }; 29 30 wcd938x: audio-codec { 31 compatible = "qcom,wcd9385-codec"; 32 33 pinctrl-names = "default"; 34 pinctrl-0 = <&wcd_default>; 35 36 qcom,micbias1-microvolt = <1800000>; 37 qcom,micbias2-microvolt = <1800000>; 38 qcom,micbias3-microvolt = <1800000>; 39 qcom,micbias4-microvolt = <1800000>; 40 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; 41 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 42 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 43 qcom,rx-device = <&wcd_rx>; 44 qcom,tx-device = <&wcd_tx>; 45 46 reset-gpios = <&tlmm 108 GPIO_ACTIVE_LOW>; 47 48 vdd-buck-supply = <&vreg_l15b_1p8>; 49 vdd-rxtx-supply = <&vreg_l15b_1p8>; 50 vdd-io-supply = <&vreg_l15b_1p8>; 51 vdd-mic-bias-supply = <&vreg_bob1>; 52 53 #sound-dai-cells = <1>; 54 }; 55 56 chosen { 57 stdout-path = "serial0:115200n8"; 58 }; 59 60 hdmi-out { 61 compatible = "hdmi-connector"; 62 type = "a"; 63 64 port { 65 hdmi_connector_out: endpoint { 66 remote-endpoint = <<9611_out>; 67 }; 68 }; 69 }; 70 71 gpio-keys { 72 compatible = "gpio-keys"; 73 74 pinctrl-0 = <&volume_up_n>; 75 pinctrl-names = "default"; 76 77 key-volume-up { 78 label = "Volume Up"; 79 linux,code = <KEY_VOLUMEUP>; 80 gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>; 81 debounce-interval = <15>; 82 linux,can-disable; 83 wakeup-source; 84 }; 85 }; 86 87 leds { 88 compatible = "gpio-leds"; 89 90 led-0 { 91 function = LED_FUNCTION_BLUETOOTH; 92 color = <LED_COLOR_ID_BLUE>; 93 gpios = <&tlmm 159 GPIO_ACTIVE_HIGH>; 94 linux,default-trigger = "bluetooth-power"; 95 default-state = "off"; 96 }; 97 98 led-1 { 99 function = LED_FUNCTION_INDICATOR; 100 color = <LED_COLOR_ID_GREEN>; 101 gpios = <&tlmm 160 GPIO_ACTIVE_HIGH>; 102 default-state = "off"; 103 panic-indicator; 104 }; 105 106 led-2 { 107 function = LED_FUNCTION_WLAN; 108 color = <LED_COLOR_ID_ORANGE>; 109 gpios = <&tlmm 162 GPIO_ACTIVE_HIGH>; 110 linux,default-trigger = "phy0tx"; 111 default-state = "off"; 112 }; 113 }; 114 115 pmic-glink { 116 compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink"; 117 #address-cells = <1>; 118 #size-cells = <0>; 119 orientation-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>; 120 121 connector@0 { 122 compatible = "usb-c-connector"; 123 reg = <0>; 124 power-role = "dual"; 125 data-role = "dual"; 126 127 ports { 128 #address-cells = <1>; 129 #size-cells = <0>; 130 131 port@0 { 132 reg = <0>; 133 134 pmic_glink_hs_in: endpoint { 135 remote-endpoint = <&usb_1_dwc3_hs>; 136 }; 137 }; 138 139 port@1 { 140 reg = <1>; 141 142 pmic_glink_ss_in: endpoint { 143 remote-endpoint = <&usb_dp_qmpphy_out>; 144 }; 145 }; 146 147 port@2 { 148 reg = <2>; 149 150 pmic_glink_sbu: endpoint { 151 remote-endpoint = <&fsa4480_sbu_mux>; 152 }; 153 }; 154 }; 155 }; 156 }; 157 158 lt9611_1v2: regulator-lt9611-1v2 { 159 compatible = "regulator-fixed"; 160 161 regulator-name = "LT9611_1V2"; 162 regulator-min-microvolt = <1200000>; 163 regulator-max-microvolt = <1200000>; 164 165 vin-supply = <&vph_pwr>; 166 gpio = <&tlmm 152 GPIO_ACTIVE_HIGH>; 167 168 enable-active-high; 169 }; 170 171 lt9611_3v3: regulator-lt9611-3v3 { 172 compatible = "regulator-fixed"; 173 174 regulator-name = "LT9611_3V3"; 175 regulator-min-microvolt = <3300000>; 176 regulator-max-microvolt = <3300000>; 177 178 vin-supply = <&vreg_bob_3v3>; 179 gpio = <&tlmm 6 GPIO_ACTIVE_HIGH>; 180 181 enable-active-high; 182 }; 183 184 vph_pwr: regulator-vph-pwr { 185 compatible = "regulator-fixed"; 186 187 regulator-name = "vph_pwr"; 188 regulator-min-microvolt = <3700000>; 189 regulator-max-microvolt = <3700000>; 190 regulator-always-on; 191 regulator-boot-on; 192 }; 193 194 vreg_bob_3v3: regulator-vreg-bob-3v3 { 195 compatible = "regulator-fixed"; 196 197 regulator-name = "VREG_BOB_3P3"; 198 regulator-min-microvolt = <3300000>; 199 regulator-max-microvolt = <3300000>; 200 201 vin-supply = <&vph_pwr>; 202 }; 203 204 sound { 205 compatible = "qcom,sm8550-sndcard", "qcom,sm8450-sndcard"; 206 model = "SM8550-HDK"; 207 audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT", 208 "SpkrRight IN", "WSA_SPK2 OUT", 209 "IN1_HPHL", "HPHL_OUT", 210 "IN2_HPHR", "HPHR_OUT", 211 "AMIC1", "MIC BIAS1", 212 "AMIC2", "MIC BIAS2", 213 "AMIC5", "MIC BIAS4", 214 "TX SWR_INPUT0", "ADC1_OUTPUT", 215 "TX SWR_INPUT1", "ADC2_OUTPUT", 216 "TX SWR_INPUT1", "ADC4_OUTPUT"; 217 218 wcd-playback-dai-link { 219 link-name = "WCD Playback"; 220 221 cpu { 222 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; 223 }; 224 225 codec { 226 sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>; 227 }; 228 229 platform { 230 sound-dai = <&q6apm>; 231 }; 232 }; 233 234 wcd-capture-dai-link { 235 link-name = "WCD Capture"; 236 237 cpu { 238 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 239 }; 240 241 codec { 242 sound-dai = <&wcd938x 1>, <&swr2 0>, <&lpass_txmacro 0>; 243 }; 244 245 platform { 246 sound-dai = <&q6apm>; 247 }; 248 }; 249 250 wsa-dai-link { 251 link-name = "WSA Playback"; 252 253 cpu { 254 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; 255 }; 256 257 codec { 258 sound-dai = <&north_spkr>, <&south_spkr>, <&swr0 0>, <&lpass_wsamacro 0>; 259 }; 260 261 platform { 262 sound-dai = <&q6apm>; 263 }; 264 }; 265 266 va-dai-link { 267 link-name = "VA Capture"; 268 269 cpu { 270 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 271 }; 272 273 codec { 274 sound-dai = <&lpass_vamacro 0>; 275 }; 276 277 platform { 278 sound-dai = <&q6apm>; 279 }; 280 }; 281 }; 282 283 wcn7850-pmu { 284 compatible = "qcom,wcn7850-pmu"; 285 286 pinctrl-names = "default"; 287 pinctrl-0 = <&wlan_en>, <&bt_default>, <&pmk8550_sleep_clk>; 288 289 wlan-enable-gpios = <&tlmm 80 GPIO_ACTIVE_HIGH>; 290 bt-enable-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; 291 292 vdd-supply = <&vreg_s5g_0p85>; 293 vddio-supply = <&vreg_l15b_1p8>; 294 vddaon-supply = <&vreg_s2g_0p85>; 295 vdddig-supply = <&vreg_s4e_0p95>; 296 vddrfa1p2-supply = <&vreg_s4g_1p25>; 297 vddrfa1p8-supply = <&vreg_s6g_1p86>; 298 299 regulators { 300 vreg_pmu_rfa_cmn: ldo0 { 301 regulator-name = "vreg_pmu_rfa_cmn"; 302 }; 303 304 vreg_pmu_aon_0p59: ldo1 { 305 regulator-name = "vreg_pmu_aon_0p59"; 306 }; 307 308 vreg_pmu_wlcx_0p8: ldo2 { 309 regulator-name = "vreg_pmu_wlcx_0p8"; 310 }; 311 312 vreg_pmu_wlmx_0p85: ldo3 { 313 regulator-name = "vreg_pmu_wlmx_0p85"; 314 }; 315 316 vreg_pmu_btcmx_0p85: ldo4 { 317 regulator-name = "vreg_pmu_btcmx_0p85"; 318 }; 319 320 vreg_pmu_rfa_0p8: ldo5 { 321 regulator-name = "vreg_pmu_rfa_0p8"; 322 }; 323 324 vreg_pmu_rfa_1p2: ldo6 { 325 regulator-name = "vreg_pmu_rfa_1p2"; 326 }; 327 328 vreg_pmu_rfa_1p8: ldo7 { 329 regulator-name = "vreg_pmu_rfa_1p8"; 330 }; 331 332 vreg_pmu_pcie_0p9: ldo8 { 333 regulator-name = "vreg_pmu_pcie_0p9"; 334 }; 335 336 vreg_pmu_pcie_1p8: ldo9 { 337 regulator-name = "vreg_pmu_pcie_1p8"; 338 }; 339 }; 340 }; 341}; 342 343&apps_rsc { 344 regulators-0 { 345 compatible = "qcom,pm8550-rpmh-regulators"; 346 347 vdd-bob1-supply = <&vph_pwr>; 348 vdd-bob2-supply = <&vph_pwr>; 349 vdd-l1-l4-l10-supply = <&vreg_s6g_1p86>; 350 vdd-l2-l13-l14-supply = <&vreg_bob1>; 351 vdd-l3-supply = <&vreg_s4g_1p25>; 352 vdd-l5-l16-supply = <&vreg_bob1>; 353 vdd-l6-l7-supply = <&vreg_bob1>; 354 vdd-l8-l9-supply = <&vreg_bob1>; 355 vdd-l11-supply = <&vreg_s4g_1p25>; 356 vdd-l12-supply = <&vreg_s6g_1p86>; 357 vdd-l15-supply = <&vreg_s6g_1p86>; 358 vdd-l17-supply = <&vreg_bob2>; 359 360 qcom,pmic-id = "b"; 361 362 vreg_bob1: bob1 { 363 regulator-name = "vreg_bob1"; 364 regulator-min-microvolt = <3296000>; 365 regulator-max-microvolt = <3960000>; 366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 367 }; 368 369 vreg_bob2: bob2 { 370 regulator-name = "vreg_bob2"; 371 regulator-min-microvolt = <2720000>; 372 regulator-max-microvolt = <3960000>; 373 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 374 }; 375 376 vreg_l1b_1p8: ldo1 { 377 regulator-name = "vreg_l1b_1p8"; 378 regulator-min-microvolt = <1800000>; 379 regulator-max-microvolt = <1800000>; 380 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 381 regulator-allow-set-load; 382 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 383 RPMH_REGULATOR_MODE_HPM>; 384 }; 385 386 vreg_l2b_3p0: ldo2 { 387 regulator-name = "vreg_l2b_3p0"; 388 regulator-min-microvolt = <3008000>; 389 regulator-max-microvolt = <3008000>; 390 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 391 regulator-allow-set-load; 392 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 393 RPMH_REGULATOR_MODE_HPM>; 394 }; 395 396 vreg_l5b_3p1: ldo5 { 397 regulator-name = "vreg_l5b_3p1"; 398 regulator-min-microvolt = <3104000>; 399 regulator-max-microvolt = <3104000>; 400 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 401 regulator-allow-set-load; 402 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 403 RPMH_REGULATOR_MODE_HPM>; 404 }; 405 406 vreg_l6b_1p8: ldo6 { 407 regulator-name = "vreg_l6b_1p8"; 408 regulator-min-microvolt = <1800000>; 409 regulator-max-microvolt = <3008000>; 410 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 411 regulator-allow-set-load; 412 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 413 RPMH_REGULATOR_MODE_HPM>; 414 }; 415 416 vreg_l7b_1p8: ldo7 { 417 regulator-name = "vreg_l7b_1p8"; 418 regulator-min-microvolt = <1800000>; 419 regulator-max-microvolt = <3008000>; 420 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 421 regulator-allow-set-load; 422 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 423 RPMH_REGULATOR_MODE_HPM>; 424 }; 425 426 vreg_l8b_1p8: ldo8 { 427 regulator-name = "vreg_l8b_1p8"; 428 regulator-min-microvolt = <1800000>; 429 regulator-max-microvolt = <3008000>; 430 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 431 regulator-allow-set-load; 432 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 433 RPMH_REGULATOR_MODE_HPM>; 434 }; 435 436 vreg_l9b_2p9: ldo9 { 437 regulator-name = "vreg_l9b_2p9"; 438 regulator-min-microvolt = <2960000>; 439 regulator-max-microvolt = <3008000>; 440 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 441 regulator-allow-set-load; 442 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 443 RPMH_REGULATOR_MODE_HPM>; 444 }; 445 446 vreg_l11b_1p2: ldo11 { 447 regulator-name = "vreg_l11b_1p2"; 448 regulator-min-microvolt = <1200000>; 449 regulator-max-microvolt = <1504000>; 450 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 451 regulator-allow-set-load; 452 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 453 RPMH_REGULATOR_MODE_HPM>; 454 }; 455 456 vreg_l12b_1p8: ldo12 { 457 regulator-name = "vreg_l12b_1p8"; 458 regulator-min-microvolt = <1800000>; 459 regulator-max-microvolt = <1800000>; 460 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 461 regulator-allow-set-load; 462 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 463 RPMH_REGULATOR_MODE_HPM>; 464 }; 465 466 vreg_l13b_3p0: ldo13 { 467 regulator-name = "vreg_l13b_3p0"; 468 regulator-min-microvolt = <3000000>; 469 regulator-max-microvolt = <3000000>; 470 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 471 regulator-allow-set-load; 472 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 473 RPMH_REGULATOR_MODE_HPM>; 474 }; 475 476 vreg_l14b_3p2: ldo14 { 477 regulator-name = "vreg_l14b_3p2"; 478 regulator-min-microvolt = <3200000>; 479 regulator-max-microvolt = <3200000>; 480 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 481 regulator-allow-set-load; 482 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 483 RPMH_REGULATOR_MODE_HPM>; 484 }; 485 486 vreg_l15b_1p8: ldo15 { 487 regulator-name = "vreg_l15b_1p8"; 488 regulator-min-microvolt = <1800000>; 489 regulator-max-microvolt = <1800000>; 490 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 491 regulator-allow-set-load; 492 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 493 RPMH_REGULATOR_MODE_HPM>; 494 }; 495 496 vreg_l16b_2p8: ldo16 { 497 regulator-name = "vreg_l16b_2p8"; 498 regulator-min-microvolt = <2800000>; 499 regulator-max-microvolt = <2800000>; 500 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 501 regulator-allow-set-load; 502 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 503 RPMH_REGULATOR_MODE_HPM>; 504 }; 505 506 vreg_l17b_2p5: ldo17 { 507 regulator-name = "vreg_l17b_2p5"; 508 regulator-min-microvolt = <2504000>; 509 regulator-max-microvolt = <2504000>; 510 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 511 regulator-allow-set-load; 512 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 513 RPMH_REGULATOR_MODE_HPM>; 514 }; 515 }; 516 517 regulators-1 { 518 compatible = "qcom,pm8550vs-rpmh-regulators"; 519 520 vdd-l1-supply = <&vreg_s4g_1p25>; 521 vdd-l2-supply = <&vreg_s4e_0p95>; 522 vdd-l3-supply = <&vreg_s4e_0p95>; 523 524 qcom,pmic-id = "c"; 525 526 vreg_l3c_0p9: ldo3 { 527 regulator-name = "vreg_l3c_0p9"; 528 regulator-min-microvolt = <880000>; 529 regulator-max-microvolt = <912000>; 530 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 531 regulator-allow-set-load; 532 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 533 RPMH_REGULATOR_MODE_HPM>; 534 }; 535 }; 536 537 regulators-2 { 538 compatible = "qcom,pm8550vs-rpmh-regulators"; 539 540 vdd-l1-supply = <&vreg_s4e_0p95>; 541 vdd-l2-supply = <&vreg_s4e_0p95>; 542 vdd-l3-supply = <&vreg_s4e_0p95>; 543 544 qcom,pmic-id = "d"; 545 546 vreg_l1d_0p88: ldo1 { 547 regulator-name = "vreg_l1d_0p88"; 548 regulator-min-microvolt = <880000>; 549 regulator-max-microvolt = <920000>; 550 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 551 regulator-allow-set-load; 552 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 553 RPMH_REGULATOR_MODE_HPM>; 554 }; 555 556 /* ldo2 supplies SM8550 VDD_LPI_MX */ 557 }; 558 559 regulators-3 { 560 compatible = "qcom,pm8550vs-rpmh-regulators"; 561 562 vdd-l1-supply = <&vreg_s4e_0p95>; 563 vdd-l2-supply = <&vreg_s4e_0p95>; 564 vdd-l3-supply = <&vreg_s4g_1p25>; 565 vdd-s4-supply = <&vph_pwr>; 566 vdd-s5-supply = <&vph_pwr>; 567 568 qcom,pmic-id = "e"; 569 570 vreg_s4e_0p95: smps4 { 571 regulator-name = "vreg_s4e_0p95"; 572 regulator-min-microvolt = <904000>; 573 regulator-max-microvolt = <984000>; 574 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 575 }; 576 577 vreg_s5e_1p08: smps5 { 578 regulator-name = "vreg_s5e_1p08"; 579 regulator-min-microvolt = <1080000>; 580 regulator-max-microvolt = <1120000>; 581 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 582 }; 583 584 vreg_l1e_0p88: ldo1 { 585 regulator-name = "vreg_l1e_0p88"; 586 regulator-min-microvolt = <880000>; 587 regulator-max-microvolt = <880000>; 588 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 589 regulator-allow-set-load; 590 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 591 RPMH_REGULATOR_MODE_HPM>; 592 }; 593 594 vreg_l2e_0p9: ldo2 { 595 regulator-name = "vreg_l2e_0p9"; 596 regulator-min-microvolt = <904000>; 597 regulator-max-microvolt = <970000>; 598 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 599 regulator-allow-set-load; 600 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 601 RPMH_REGULATOR_MODE_HPM>; 602 }; 603 604 vreg_l3e_1p2: ldo3 { 605 regulator-name = "vreg_l3e_1p2"; 606 regulator-min-microvolt = <1200000>; 607 regulator-max-microvolt = <1200000>; 608 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 609 regulator-allow-set-load; 610 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 611 RPMH_REGULATOR_MODE_HPM>; 612 }; 613 }; 614 615 regulators-4 { 616 compatible = "qcom,pm8550ve-rpmh-regulators"; 617 618 vdd-l1-supply = <&vreg_s4e_0p95>; 619 vdd-l2-supply = <&vreg_s4e_0p95>; 620 vdd-l3-supply = <&vreg_s4e_0p95>; 621 vdd-s4-supply = <&vph_pwr>; 622 623 qcom,pmic-id = "f"; 624 625 vreg_s4f_0p5: smps4 { 626 regulator-name = "vreg_s4f_0p5"; 627 regulator-min-microvolt = <500000>; 628 regulator-max-microvolt = <700000>; 629 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 630 }; 631 632 vreg_l1f_0p9: ldo1 { 633 regulator-name = "vreg_l1f_0p9"; 634 regulator-min-microvolt = <912000>; 635 regulator-max-microvolt = <912000>; 636 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 637 regulator-allow-set-load; 638 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 639 RPMH_REGULATOR_MODE_HPM>; 640 }; 641 642 vreg_l2f_0p88: ldo2 { 643 regulator-name = "vreg_l2f_0p88"; 644 regulator-min-microvolt = <880000>; 645 regulator-max-microvolt = <912000>; 646 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 647 regulator-allow-set-load; 648 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 649 RPMH_REGULATOR_MODE_HPM>; 650 }; 651 652 vreg_l3f_0p88: ldo3 { 653 regulator-name = "vreg_l3f_0p88"; 654 regulator-min-microvolt = <880000>; 655 regulator-max-microvolt = <912000>; 656 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 657 regulator-allow-set-load; 658 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 659 RPMH_REGULATOR_MODE_HPM>; 660 }; 661 }; 662 663 regulators-5 { 664 compatible = "qcom,pm8550vs-rpmh-regulators"; 665 666 vdd-l1-supply = <&vreg_s4g_1p25>; 667 vdd-l2-supply = <&vreg_s4g_1p25>; 668 vdd-l3-supply = <&vreg_s4g_1p25>; 669 vdd-s1-supply = <&vph_pwr>; 670 vdd-s2-supply = <&vph_pwr>; 671 vdd-s3-supply = <&vph_pwr>; 672 vdd-s4-supply = <&vph_pwr>; 673 vdd-s5-supply = <&vph_pwr>; 674 vdd-s6-supply = <&vph_pwr>; 675 676 qcom,pmic-id = "g"; 677 678 vreg_s1g_1p25: smps1 { 679 regulator-name = "vreg_s1g_1p25"; 680 regulator-min-microvolt = <1200000>; 681 regulator-max-microvolt = <1300000>; 682 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 683 }; 684 685 vreg_s2g_0p85: smps2 { 686 regulator-name = "vreg_s2g_0p85"; 687 regulator-min-microvolt = <800000>; 688 regulator-max-microvolt = <1000000>; 689 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 690 }; 691 692 vreg_s3g_0p8: smps3 { 693 regulator-name = "vreg_s3g_0p8"; 694 regulator-min-microvolt = <300000>; 695 regulator-max-microvolt = <1004000>; 696 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 697 }; 698 699 vreg_s4g_1p25: smps4 { 700 regulator-name = "vreg_s4g_1p25"; 701 regulator-min-microvolt = <1200000>; 702 regulator-max-microvolt = <1352000>; 703 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 704 }; 705 706 vreg_s5g_0p85: smps5 { 707 regulator-name = "vreg_s5g_0p85"; 708 regulator-min-microvolt = <500000>; 709 regulator-max-microvolt = <1004000>; 710 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 711 }; 712 713 vreg_s6g_1p86: smps6 { 714 regulator-name = "vreg_s6g_1p86"; 715 regulator-min-microvolt = <1800000>; 716 regulator-max-microvolt = <2000000>; 717 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 718 }; 719 720 vreg_l1g_1p2: ldo1 { 721 regulator-name = "vreg_l1g_1p2"; 722 regulator-min-microvolt = <1200000>; 723 regulator-max-microvolt = <1200000>; 724 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 725 regulator-allow-set-load; 726 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 727 RPMH_REGULATOR_MODE_HPM>; 728 }; 729 730 vreg_l3g_1p2: ldo3 { 731 regulator-name = "vreg_l3g_1p2"; 732 regulator-min-microvolt = <1200000>; 733 regulator-max-microvolt = <1200000>; 734 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 735 regulator-allow-set-load; 736 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 737 RPMH_REGULATOR_MODE_HPM>; 738 }; 739 }; 740 741 regulators-6 { 742 compatible = "qcom,pm8010-rpmh-regulators"; 743 744 vdd-l1-l2-supply = <&vreg_s4g_1p25>; 745 vdd-l3-l4-supply = <&vreg_bob2>; 746 vdd-l5-supply = <&vreg_s6g_1p86>; 747 vdd-l6-supply = <&vreg_s6g_1p86>; 748 vdd-l7-supply = <&vreg_bob1>; 749 750 qcom,pmic-id = "m"; 751 752 vreg_l1m_1p056: ldo1 { 753 regulator-name = "vreg_l1m_1p056"; 754 regulator-min-microvolt = <1056000>; 755 regulator-max-microvolt = <1056000>; 756 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 757 regulator-allow-set-load; 758 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 759 RPMH_REGULATOR_MODE_HPM>; 760 }; 761 762 vreg_l2m_1p056: ldo2 { 763 regulator-name = "vreg_l2m_1p056"; 764 regulator-min-microvolt = <1056000>; 765 regulator-max-microvolt = <1056000>; 766 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 767 regulator-allow-set-load; 768 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 769 RPMH_REGULATOR_MODE_HPM>; 770 }; 771 772 vreg_l3m_2p8: ldo3 { 773 regulator-name = "vreg_l3m_2p8"; 774 regulator-min-microvolt = <2800000>; 775 regulator-max-microvolt = <2800000>; 776 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 777 }; 778 779 vreg_l4m_2p8: ldo4 { 780 regulator-name = "vreg_l4m_2p8"; 781 regulator-min-microvolt = <2800000>; 782 regulator-max-microvolt = <2800000>; 783 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 784 }; 785 786 vreg_l5m_1p8: ldo5 { 787 regulator-name = "vreg_l5m_1p8"; 788 regulator-min-microvolt = <1800000>; 789 regulator-max-microvolt = <1800000>; 790 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 791 }; 792 793 vreg_l6m_1p8: ldo6 { 794 regulator-name = "vreg_l6m_1p8"; 795 regulator-min-microvolt = <1800000>; 796 regulator-max-microvolt = <1800000>; 797 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 798 }; 799 800 vreg_l7m_2p9: ldo7 { 801 regulator-name = "vreg_l7m_2p9"; 802 regulator-min-microvolt = <2800000>; 803 regulator-max-microvolt = <2904000>; 804 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 805 }; 806 }; 807 808 regulators-7 { 809 compatible = "qcom,pm8010-rpmh-regulators"; 810 811 vdd-l1-l2-supply = <&vreg_s4g_1p25>; 812 vdd-l3-l4-supply = <&vreg_bob2>; 813 vdd-l5-supply = <&vreg_s6g_1p86>; 814 vdd-l6-supply = <&vreg_bob1>; 815 vdd-l7-supply = <&vreg_bob1>; 816 817 qcom,pmic-id = "n"; 818 819 vreg_l1n_1p1: ldo1 { 820 regulator-name = "vreg_l1n_1p1"; 821 regulator-min-microvolt = <1104000>; 822 regulator-max-microvolt = <1200000>; 823 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 824 regulator-allow-set-load; 825 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 826 RPMH_REGULATOR_MODE_HPM>; 827 }; 828 829 vreg_l2n_1p1: ldo2 { 830 regulator-name = "vreg_l2n_1p1"; 831 regulator-min-microvolt = <1104000>; 832 regulator-max-microvolt = <1200000>; 833 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 834 regulator-allow-set-load; 835 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 836 RPMH_REGULATOR_MODE_HPM>; 837 }; 838 839 vreg_l3n_2p8: ldo3 { 840 regulator-name = "vreg_l3n_2p8"; 841 regulator-min-microvolt = <2800000>; 842 regulator-max-microvolt = <3000000>; 843 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 844 }; 845 846 vreg_l4n_2p8: ldo4 { 847 regulator-name = "vreg_l4n_2p8"; 848 regulator-min-microvolt = <2800000>; 849 regulator-max-microvolt = <3300000>; 850 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 851 }; 852 853 vreg_l5n_1p8: ldo5 { 854 regulator-name = "vreg_l5n_1p8"; 855 regulator-min-microvolt = <1800000>; 856 regulator-max-microvolt = <1800000>; 857 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 858 }; 859 860 vreg_l6n_3p3: ldo6 { 861 regulator-name = "vreg_l6n_3p3"; 862 regulator-min-microvolt = <2800000>; 863 regulator-max-microvolt = <3304000>; 864 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 865 }; 866 867 vreg_l7n_2p96: ldo7 { 868 regulator-name = "vreg_l7n_2p96"; 869 regulator-min-microvolt = <2800000>; 870 regulator-max-microvolt = <2960000>; 871 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 872 }; 873 }; 874}; 875 876&i2c0 { 877 clock-frequency = <400000>; 878 status = "okay"; 879 880 lt9611_codec: hdmi-bridge@2b { 881 compatible = "lontium,lt9611uxc"; 882 reg = <0x2b>; 883 884 interrupts-extended = <&tlmm 8 IRQ_TYPE_EDGE_FALLING>; 885 886 reset-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>; 887 888 vdd-supply = <<9611_1v2>; 889 vcc-supply = <<9611_3v3>; 890 891 pinctrl-0 = <<9611_irq_pin>, <<9611_rst_pin>; 892 pinctrl-names = "default"; 893 894 ports { 895 #address-cells = <1>; 896 #size-cells = <0>; 897 898 port@0 { 899 reg = <0>; 900 901 lt9611_a: endpoint { 902 remote-endpoint = <&mdss_dsi0_out>; 903 }; 904 }; 905 906 port@2 { 907 reg = <2>; 908 909 lt9611_out: endpoint { 910 remote-endpoint = <&hdmi_connector_out>; 911 }; 912 }; 913 }; 914 }; 915}; 916 917&i2c_hub_2 { 918 status = "okay"; 919 920 typec-mux@42 { 921 compatible = "fcs,fsa4480"; 922 reg = <0x42>; 923 924 vcc-supply = <&vreg_bob1>; 925 926 mode-switch; 927 orientation-switch; 928 929 port { 930 fsa4480_sbu_mux: endpoint { 931 remote-endpoint = <&pmic_glink_sbu>; 932 }; 933 }; 934 }; 935}; 936 937&i2c_master_hub_0 { 938 status = "okay"; 939}; 940 941&ipa { 942 qcom,gsi-loader = "self"; 943 memory-region = <&ipa_fw_mem>; 944 firmware-name = "qcom/sm8550/ipa_fws.mbn"; 945 status = "okay"; 946}; 947 948&iris { 949 status = "okay"; 950}; 951 952&gpi_dma1 { 953 status = "okay"; 954}; 955 956&gpu { 957 status = "okay"; 958 959 zap-shader { 960 firmware-name = "qcom/sm8550/a740_zap.mbn"; 961 }; 962}; 963 964&lpass_tlmm { 965 spkr_1_sd_n_active: spkr-1-sd-n-active-state { 966 pins = "gpio17"; 967 function = "gpio"; 968 drive-strength = <16>; 969 bias-disable; 970 output-low; 971 }; 972 973 spkr_2_sd_n_active: spkr-2-sd-n-active-state { 974 pins = "gpio18"; 975 function = "gpio"; 976 drive-strength = <16>; 977 bias-disable; 978 output-low; 979 }; 980}; 981 982&mdss { 983 status = "okay"; 984}; 985 986&mdss_dsi0 { 987 vdda-supply = <&vreg_l3e_1p2>; 988 status = "okay"; 989}; 990 991&mdss_dsi0_out { 992 remote-endpoint = <<9611_a>; 993 data-lanes = <0 1 2 3>; 994}; 995 996&mdss_dsi0_phy { 997 vdds-supply = <&vreg_l1e_0p88>; 998 status = "okay"; 999}; 1000 1001&mdss_dp0 { 1002 status = "okay"; 1003}; 1004 1005&mdss_dp0_out { 1006 data-lanes = <0 1>; 1007}; 1008 1009&pcie0 { 1010 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; 1011 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; 1012 1013 pinctrl-0 = <&pcie0_default_state>; 1014 pinctrl-names = "default"; 1015 1016 status = "okay"; 1017}; 1018 1019&pcieport0 { 1020 wifi@0 { 1021 compatible = "pci17cb,1107"; 1022 reg = <0x10000 0x0 0x0 0x0 0x0>; 1023 1024 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; 1025 vddaon-supply = <&vreg_pmu_aon_0p59>; 1026 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 1027 vddwlmx-supply = <&vreg_pmu_wlmx_0p85>; 1028 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 1029 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 1030 vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>; 1031 vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>; 1032 vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>; 1033 }; 1034}; 1035 1036&pcie0_phy { 1037 vdda-phy-supply = <&vreg_l1e_0p88>; 1038 vdda-pll-supply = <&vreg_l3e_1p2>; 1039 1040 status = "okay"; 1041}; 1042 1043&pcie1 { 1044 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>; 1045 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; 1046 1047 pinctrl-0 = <&pcie1_default_state>; 1048 pinctrl-names = "default"; 1049 1050 status = "okay"; 1051}; 1052 1053&pcie1_phy { 1054 vdda-phy-supply = <&vreg_l3c_0p9>; 1055 vdda-pll-supply = <&vreg_l3e_1p2>; 1056 vdda-qref-supply = <&vreg_l1e_0p88>; 1057 1058 status = "okay"; 1059}; 1060 1061&pm8550_gpios { 1062 sdc2_card_det_n: sdc2-card-det-state { 1063 pins = "gpio12"; 1064 function = "normal"; 1065 input-enable; 1066 output-disable; 1067 bias-pull-up; 1068 power-source = <1>; /* 1.8 V */ 1069 }; 1070 1071 volume_up_n: volume-up-n-state { 1072 pins = "gpio6"; 1073 function = "normal"; 1074 power-source = <1>; 1075 bias-pull-up; 1076 input-enable; 1077 }; 1078}; 1079 1080/* The RGB signals are routed to 3 separate LEDs on the HDK8550 */ 1081&pm8550_pwm { 1082 #address-cells = <1>; 1083 #size-cells = <0>; 1084 1085 status = "okay"; 1086 1087 led@1 { 1088 reg = <1>; 1089 function = LED_FUNCTION_STATUS; 1090 color = <LED_COLOR_ID_RED>; 1091 default-state = "off"; 1092 }; 1093 1094 led@2 { 1095 reg = <2>; 1096 function = LED_FUNCTION_STATUS; 1097 color = <LED_COLOR_ID_GREEN>; 1098 default-state = "off"; 1099 }; 1100 1101 led@3 { 1102 reg = <3>; 1103 function = LED_FUNCTION_STATUS; 1104 color = <LED_COLOR_ID_BLUE>; 1105 default-state = "off"; 1106 }; 1107}; 1108 1109&pm8550b_eusb2_repeater { 1110 vdd18-supply = <&vreg_l15b_1p8>; 1111 vdd3-supply = <&vreg_l5b_3p1>; 1112}; 1113 1114&pon_pwrkey { 1115 status = "okay"; 1116}; 1117 1118&pon_resin { 1119 linux,code = <KEY_VOLUMEDOWN>; 1120 1121 status = "okay"; 1122}; 1123 1124&pmk8550_gpios { 1125 pmk8550_sleep_clk: sleep-clk-state { 1126 pins = "gpio3"; 1127 function = "func1"; 1128 input-disable; 1129 output-enable; 1130 bias-disable; 1131 power-source = <0>; 1132 }; 1133}; 1134 1135&qupv3_id_0 { 1136 status = "okay"; 1137}; 1138 1139&qupv3_id_1 { 1140 status = "okay"; 1141}; 1142 1143&remoteproc_adsp { 1144 firmware-name = "qcom/sm8550/adsp.mbn", 1145 "qcom/sm8550/adsp_dtb.mbn"; 1146 status = "okay"; 1147}; 1148 1149&remoteproc_cdsp { 1150 firmware-name = "qcom/sm8550/cdsp.mbn", 1151 "qcom/sm8550/cdsp_dtb.mbn"; 1152 status = "okay"; 1153}; 1154 1155&remoteproc_mpss { 1156 firmware-name = "qcom/sm8550/modem.mbn", 1157 "qcom/sm8550/modem_dtb.mbn"; 1158 status = "okay"; 1159}; 1160 1161&sdhc_2 { 1162 cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_HIGH>; 1163 1164 pinctrl-0 = <&sdc2_default>, <&sdc2_card_det_n>; 1165 pinctrl-1 = <&sdc2_sleep>, <&sdc2_card_det_n>; 1166 pinctrl-names = "default", "sleep"; 1167 1168 vmmc-supply = <&vreg_l9b_2p9>; 1169 vqmmc-supply = <&vreg_l8b_1p8>; 1170 1171 bus-width = <4>; 1172 no-sdio; 1173 no-mmc; 1174 1175 status = "okay"; 1176}; 1177 1178&sleep_clk { 1179 clock-frequency = <32764>; 1180}; 1181 1182&swr0 { 1183 status = "okay"; 1184 1185 /* WSA8845, Speaker North */ 1186 north_spkr: speaker@0,0 { 1187 compatible = "sdw20217020400"; 1188 reg = <0 0>; 1189 1190 pinctrl-0 = <&spkr_1_sd_n_active>; 1191 pinctrl-names = "default"; 1192 1193 powerdown-gpios = <&lpass_tlmm 17 GPIO_ACTIVE_LOW>; 1194 1195 vdd-1p8-supply = <&vreg_l15b_1p8>; 1196 vdd-io-supply = <&vreg_l15b_1p8>; 1197 1198 #sound-dai-cells = <0>; 1199 sound-name-prefix = "SpkrLeft"; 1200 qcom,port-mapping = <1 2 3 7 10 13>; 1201 }; 1202 1203 /* WSA8845, Speaker South */ 1204 south_spkr: speaker@0,1 { 1205 compatible = "sdw20217020400"; 1206 reg = <0 1>; 1207 1208 pinctrl-0 = <&spkr_2_sd_n_active>; 1209 pinctrl-names = "default"; 1210 1211 powerdown-gpios = <&lpass_tlmm 18 GPIO_ACTIVE_LOW>; 1212 1213 vdd-1p8-supply = <&vreg_l15b_1p8>; 1214 vdd-io-supply = <&vreg_l15b_1p8>; 1215 1216 #sound-dai-cells = <0>; 1217 sound-name-prefix = "SpkrRight"; 1218 qcom,port-mapping = <4 5 6 7 11 13>; 1219 }; 1220}; 1221 1222&swr1 { 1223 status = "okay"; 1224 1225 /* WCD9385 RX */ 1226 wcd_rx: codec@0,4 { 1227 compatible = "sdw20217010d00"; 1228 reg = <0 4>; 1229 1230 /* 1231 * WCD9385 RX Port 1 (HPH_L/R) <=> SWR1 Port 1 (HPH_L/R) 1232 * WCD9385 RX Port 2 (CLSH) <=> SWR1 Port 2 (CLSH) 1233 * WCD9385 RX Port 3 (COMP_L/R) <=> SWR1 Port 3 (COMP_L/R) 1234 * WCD9385 RX Port 4 (LO) <=> SWR1 Port 4 (LO) 1235 * WCD9385 RX Port 5 (DSD_L/R) <=> SWR1 Port 5 (DSD_L/R) 1236 */ 1237 qcom,rx-port-mapping = <1 2 3 4 5>; 1238 }; 1239}; 1240 1241&swr2 { 1242 status = "okay"; 1243 1244 /* WCD9385 TX */ 1245 wcd_tx: codec@0,3 { 1246 compatible = "sdw20217010d00"; 1247 reg = <0 3>; 1248 1249 /* 1250 * WCD9385 TX Port 1 (ADC1,2) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3) 1251 * WCD9385 TX Port 2 (ADC3,4) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3) 1252 * WCD9385 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3 (TX SWR_INPUT 4,5,6,7) 1253 * WCD9385 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4 (TX SWR_INPUT 8,9,10,11) 1254 */ 1255 qcom,tx-port-mapping = <2 2 3 4>; 1256 }; 1257}; 1258 1259&tlmm { 1260 /* Reserved I/Os for NFC */ 1261 gpio-reserved-ranges = <32 8>; 1262 1263 bt_default: bt-default-state { 1264 bt-en-pins { 1265 pins = "gpio81"; 1266 function = "gpio"; 1267 drive-strength = <16>; 1268 bias-disable; 1269 }; 1270 1271 sw-ctrl-pins { 1272 pins = "gpio82"; 1273 function = "gpio"; 1274 bias-pull-down; 1275 }; 1276 }; 1277 1278 lt9611_irq_pin: lt9611-irq-state { 1279 pins = "gpio8"; 1280 function = "gpio"; 1281 bias-disable; 1282 }; 1283 1284 lt9611_rst_pin: lt9611-rst-state { 1285 pins = "gpio7"; 1286 function = "gpio"; 1287 output-high; 1288 }; 1289 1290 wcd_default: wcd-reset-n-active-state { 1291 pins = "gpio108"; 1292 function = "gpio"; 1293 drive-strength = <16>; 1294 bias-disable; 1295 output-low; 1296 }; 1297 1298 wlan_en: wlan-en-state { 1299 pins = "gpio80"; 1300 function = "gpio"; 1301 drive-strength = <8>; 1302 bias-pull-down; 1303 }; 1304}; 1305 1306&uart7 { 1307 status = "okay"; 1308}; 1309 1310&uart14 { 1311 status = "okay"; 1312 1313 bluetooth { 1314 compatible = "qcom,wcn7850-bt"; 1315 1316 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; 1317 vddaon-supply = <&vreg_pmu_aon_0p59>; 1318 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 1319 vddwlmx-supply = <&vreg_pmu_wlmx_0p85>; 1320 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 1321 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 1322 vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>; 1323 1324 max-speed = <3200000>; 1325 }; 1326}; 1327 1328&ufs_mem_hc { 1329 reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>; 1330 1331 vcc-supply = <&vreg_l17b_2p5>; 1332 vcc-max-microamp = <1300000>; 1333 vccq-supply = <&vreg_l1g_1p2>; 1334 vccq-max-microamp = <1200000>; 1335 vdd-hba-supply = <&vreg_l3g_1p2>; 1336 1337 status = "okay"; 1338}; 1339 1340&ufs_mem_phy { 1341 vdda-phy-supply = <&vreg_l1d_0p88>; 1342 vdda-pll-supply = <&vreg_l3e_1p2>; 1343 1344 status = "okay"; 1345}; 1346 1347&usb_1 { 1348 status = "okay"; 1349}; 1350 1351&usb_1_dwc3_hs { 1352 remote-endpoint = <&pmic_glink_hs_in>; 1353}; 1354 1355&usb_1_hsphy { 1356 vdd-supply = <&vreg_l1e_0p88>; 1357 vdda12-supply = <&vreg_l3e_1p2>; 1358 1359 phys = <&pm8550b_eusb2_repeater>; 1360 1361 status = "okay"; 1362}; 1363 1364&usb_dp_qmpphy { 1365 vdda-phy-supply = <&vreg_l3e_1p2>; 1366 vdda-pll-supply = <&vreg_l3f_0p88>; 1367 1368 status = "okay"; 1369}; 1370 1371&usb_dp_qmpphy_out { 1372 remote-endpoint = <&pmic_glink_ss_in>; 1373}; 1374 1375&xo_board { 1376 clock-frequency = <76800000>; 1377}; 1378