xref: /linux/scripts/dtc/include-prefixes/arm64/qcom/sda660-inforce-ifc6560.dts (revision ec71f661a572a770d7c861cd52a50cbbb0e1a8d1)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2021, Linaro Ltd.
4 * Copyright (c) 2020, Konrad Dybcio <konrad.dybcio@somainline.org>
5 * Copyright (c) 2020, AngeloGioacchino Del Regno
6 *                     <angelogioacchino.delregno@somainline.org>
7 */
8
9/dts-v1/;
10
11#include "sdm660.dtsi"
12#include "pm660.dtsi"
13#include "pm660l.dtsi"
14
15/ {
16	model = "Inforce 6560 Single Board Computer";
17	compatible = "inforce,ifc6560", "qcom,sda660";
18	chassis-type = "embedded"; /* SBC */
19
20	aliases {
21		serial0 = &blsp1_uart2;
22		serial1 = &blsp2_uart1;
23	};
24
25	chosen {
26		stdout-path = "serial0:115200n8";
27	};
28
29	gpio-keys {
30		compatible = "gpio-keys";
31
32		key-volup {
33			label = "Volume Up";
34			gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>;
35			linux,code = <KEY_VOLUMEUP>;
36			debounce-interval = <15>;
37		};
38	};
39
40	/*
41	 * Until we hook up type-c detection, we
42	 * have to stick with this. But it works.
43	 */
44	extcon_usb: extcon-usb {
45		compatible = "linux,extcon-usb-gpio";
46		id-gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
47	};
48
49	hdmi-out {
50		compatible = "hdmi-connector";
51		type = "a";
52
53		port {
54			hdmi_con: endpoint {
55				remote-endpoint = <&adv7533_out>;
56			};
57		};
58	};
59
60	vph_pwr: vph-pwr-regulator {
61		compatible = "regulator-fixed";
62		regulator-name = "vph_pwr";
63		regulator-min-microvolt = <3800000>;
64		regulator-max-microvolt = <3800000>;
65
66		regulator-always-on;
67		regulator-boot-on;
68	};
69
70	v3p3_bck_bst: v3p3-bck-bst-regulator {
71		compatible = "regulator-fixed";
72		regulator-name = "v3p3_bck_bst";
73
74		regulator-min-microvolt = <3300000>;
75		regulator-max-microvolt = <3300000>;
76
77		vin-supply = <&vph_pwr>;
78	};
79
80	v1p2_ldo: v1p2-ldo-regulator {
81		compatible = "regulator-fixed";
82		regulator-name = "v1p2_ldo";
83
84		regulator-min-microvolt = <1200000>;
85		regulator-max-microvolt = <1200000>;
86
87		vin-supply = <&vph_pwr>;
88	};
89
90	v5p0_boost: v5p0-boost-regulator {
91		compatible = "regulator-fixed";
92		regulator-name = "v5p0_boost";
93
94		regulator-min-microvolt = <5000000>;
95		regulator-max-microvolt = <5000000>;
96
97		vin-supply = <&vph_pwr>;
98	};
99
100	/*
101	 * this is also used for APC1 CPU power, touching it resets the board
102	 */
103	vreg_l10a_1p8: vreg-l10a-regulator {
104		compatible = "regulator-fixed";
105		regulator-name = "vreg_l10a_1p8";
106		regulator-min-microvolt = <1804000>;
107		regulator-max-microvolt = <1804000>;
108		regulator-always-on;
109		regulator-boot-on;
110	};
111};
112
113&adreno_gpu {
114	status = "okay";
115};
116
117&adreno_gpu_zap {
118	firmware-name = "qcom/sda660/a512_zap.mbn";
119};
120
121&adsp_pil {
122	firmware-name = "qcom/sda660/adsp.mbn";
123};
124
125&blsp_i2c6 {
126	status = "okay";
127
128	adv7533: hdmi@39 {
129		compatible = "adi,adv7535";
130		reg = <0x39>, <0x66>;
131		reg-names = "main", "edid";
132
133		interrupt-parent = <&pm660l_gpios>;
134		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
135
136		clocks = <&rpmcc RPM_SMD_BB_CLK2>;
137		clock-names = "cec";
138		/*
139		 * Limit to 3 lanes to prevent the bridge from changing amount
140		 * of lanes in the fly. MSM DSI host doesn't like that.
141		 */
142		adi,dsi-lanes = <3>;
143		avdd-supply = <&vreg_l13a_1p8>;
144		dvdd-supply = <&vreg_l13a_1p8>;
145		pvdd-supply = <&vreg_l13a_1p8>;
146		a2vdd-supply = <&vreg_l13a_1p8>;
147		v3p3-supply = <&v3p3_bck_bst>;
148
149		ports {
150			#address-cells = <1>;
151			#size-cells = <0>;
152
153			port@0 {
154				reg = <0>;
155
156				adv7533_in: endpoint {
157					remote-endpoint = <&mdss_dsi0_out>;
158				};
159			};
160
161			port@1 {
162				reg = <1>;
163
164				adv7533_out: endpoint {
165					remote-endpoint = <&hdmi_con>;
166				};
167			};
168		};
169	};
170};
171
172&blsp1_dma {
173	/*
174	 * The board will lock up if we toggle the BLSP clock, unless the
175	 * BAM DMA interconnects support is in place.
176	 */
177	/delete-property/ clocks;
178	/delete-property/ clock-names;
179};
180
181&blsp1_uart2 {
182	status = "okay";
183};
184
185&blsp2_dma {
186	/*
187	 * The board will lock up if we toggle the BLSP clock, unless the
188	 * BAM DMA interconnects support is in place.
189	 */
190	/delete-property/ clocks;
191	/delete-property/ clock-names;
192};
193
194&blsp2_uart1 {
195	status = "okay";
196
197	bluetooth {
198		compatible = "qcom,wcn3990-bt";
199
200		vddio-supply = <&vreg_l13a_1p8>;
201		vddxo-supply = <&vreg_l9a_1p8>;
202		vddrf-supply = <&vreg_l6a_1p3>;
203		vddch0-supply = <&vreg_l19a_3p3>;
204		max-speed = <3200000>;
205	};
206};
207
208&mdss {
209	status = "okay";
210};
211
212&mdss_dsi0 {
213	status = "okay";
214	vdda-supply = <&vreg_l1a_1p225>;
215};
216
217&mdss_dsi0_out {
218	remote-endpoint = <&adv7533_in>;
219	data-lanes = <0 1 2 3>;
220};
221
222&mdss_dsi0_phy {
223	status = "okay";
224	vcca-supply = <&vreg_l1b_0p925>;
225};
226
227&mmss_smmu {
228	status = "okay";
229};
230
231&pon_pwrkey {
232	status = "okay";
233};
234
235&pon_resin {
236	status = "okay";
237
238	linux,code = <KEY_VOLUMEUP>;
239};
240
241&qusb2phy0 {
242	status = "okay";
243
244	vdd-supply = <&vreg_l1b_0p925>;
245	vdda-pll-supply = <&vreg_l10a_1p8>;
246	vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
247};
248
249&qusb2phy1 {
250	status = "okay";
251
252	vdd-supply = <&vreg_l1b_0p925>;
253	vdda-pll-supply = <&vreg_l10a_1p8>;
254	vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
255};
256
257&remoteproc_mss {
258	firmware-name = "qcom/sda660/mba.mbn", "qcom/sda660/modem.mbn";
259	status = "okay";
260};
261
262&rpm_requests {
263	regulators-0 {
264		compatible = "qcom,rpm-pm660-regulators";
265
266		vdd_s1-supply = <&vph_pwr>;
267		vdd_s2-supply = <&vph_pwr>;
268		vdd_s3-supply = <&vph_pwr>;
269		vdd_s4-supply = <&vph_pwr>;
270		vdd_s5-supply = <&vph_pwr>;
271		vdd_s6-supply = <&vph_pwr>;
272
273		vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>;
274		vdd_l2_l3-supply = <&vreg_s2b_1p05>;
275		vdd_l5-supply = <&vreg_s2b_1p05>;
276		vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>;
277		vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>;
278
279		vreg_s4a_2p04: s4 {
280			regulator-min-microvolt = <1805000>;
281			regulator-max-microvolt = <2040000>;
282			regulator-enable-ramp-delay = <200>;
283			regulator-ramp-delay = <0>;
284			regulator-always-on;
285		};
286
287		vreg_s5a_1p35: s5 {
288			regulator-min-microvolt = <1224000>;
289			regulator-max-microvolt = <1350000>;
290			regulator-enable-ramp-delay = <200>;
291			regulator-ramp-delay = <0>;
292		};
293
294		vreg_l1a_1p225: l1 {
295			regulator-min-microvolt = <1150000>;
296			regulator-max-microvolt = <1250000>;
297			regulator-enable-ramp-delay = <250>;
298			regulator-allow-set-load;
299		};
300
301		vreg_l5a_0p8: l5 {
302			regulator-min-microvolt = <848000>;
303			regulator-max-microvolt = <848000>;
304		};
305
306		vreg_l6a_1p3: l6 {
307			regulator-min-microvolt = <1304000>;
308			regulator-max-microvolt = <1368000>;
309			regulator-enable-ramp-delay = <250>;
310			regulator-ramp-delay = <0>;
311			regulator-allow-set-load;
312		};
313
314		vreg_l8a_1p8: l8 {
315			regulator-min-microvolt = <1800000>;
316			regulator-max-microvolt = <1800000>;
317			regulator-enable-ramp-delay = <250>;
318			regulator-ramp-delay = <0>;
319			regulator-system-load = <325000>;
320			regulator-allow-set-load;
321		};
322
323		vreg_l9a_1p8: l9 {
324			regulator-min-microvolt = <1804000>;
325			regulator-max-microvolt = <1896000>;
326			regulator-enable-ramp-delay = <250>;
327			regulator-ramp-delay = <0>;
328			regulator-allow-set-load;
329		};
330
331		vreg_l13a_1p8: l13 {
332			/* This gives power to the LPDDR4: never turn it off! */
333			regulator-min-microvolt = <1800000>;
334			regulator-max-microvolt = <1944000>;
335			regulator-enable-ramp-delay = <250>;
336			regulator-ramp-delay = <0>;
337			regulator-always-on;
338			regulator-boot-on;
339		};
340
341		vreg_l19a_3p3: l19 {
342			regulator-min-microvolt = <3312000>;
343			regulator-max-microvolt = <3400000>;
344			regulator-enable-ramp-delay = <250>;
345			regulator-ramp-delay = <0>;
346			regulator-allow-set-load;
347		};
348	};
349
350	regulators-1 {
351		compatible = "qcom,rpm-pm660l-regulators";
352
353		vdd_s1-supply = <&vph_pwr>;
354		vdd_s2-supply = <&vph_pwr>;
355		vdd_s3_s4-supply = <&vph_pwr>;
356		vdd_s5-supply = <&vph_pwr>;
357		vdd_s6-supply = <&vph_pwr>;
358
359		vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>;
360		vdd_l2-supply = <&vreg_bob>;
361		vdd_l3_l5_l7_l8-supply = <&vreg_bob>;
362		vdd_l4_l6-supply = <&vreg_bob>;
363		vdd_bob-supply = <&vph_pwr>;
364
365		vreg_s2b_1p05: s2 {
366			regulator-min-microvolt = <1050000>;
367			regulator-max-microvolt = <1050000>;
368			regulator-enable-ramp-delay = <200>;
369			regulator-ramp-delay = <0>;
370		};
371
372		vreg_l1b_0p925: l1 {
373			regulator-min-microvolt = <800000>;
374			regulator-max-microvolt = <925000>;
375			regulator-enable-ramp-delay = <250>;
376			regulator-allow-set-load;
377		};
378
379		vreg_l2b_2p95: l2 {
380			regulator-min-microvolt = <1648000>;
381			regulator-max-microvolt = <3100000>;
382			regulator-enable-ramp-delay = <250>;
383			regulator-ramp-delay = <0>;
384			regulator-allow-set-load;
385		};
386
387		vreg_l4b_2p95: l4 {
388			regulator-min-microvolt = <2944000>;
389			regulator-max-microvolt = <2952000>;
390			regulator-enable-ramp-delay = <250>;
391			regulator-ramp-delay = <0>;
392
393			regulator-min-microamp = <200>;
394			regulator-max-microamp = <600000>;
395			regulator-system-load = <570000>;
396			regulator-allow-set-load;
397		};
398
399		/*
400		 * Downstream specifies a range of 1721-3600mV,
401		 * but the only assigned consumers are SDHCI2 VMMC
402		 * and Coresight QPDI that both request pinned 2.95V.
403		 * Tighten the range to 1.8-3.328 (closest to 3.3) to
404		 * make the mmc driver happy.
405		 */
406		vreg_l5b_2p95: l5 {
407			regulator-min-microvolt = <1800000>;
408			regulator-max-microvolt = <3328000>;
409			regulator-enable-ramp-delay = <250>;
410			regulator-system-load = <800000>;
411			regulator-ramp-delay = <0>;
412			regulator-allow-set-load;
413		};
414
415		vreg_l7b_3p125: l7 {
416			regulator-min-microvolt = <2700000>;
417			regulator-max-microvolt = <3125000>;
418			regulator-enable-ramp-delay = <250>;
419		};
420
421		vreg_l8b_3p3: l8 {
422			regulator-min-microvolt = <2800000>;
423			regulator-max-microvolt = <3400000>;
424			regulator-enable-ramp-delay = <250>;
425			regulator-ramp-delay = <0>;
426		};
427
428		vreg_bob: bob {
429			regulator-min-microvolt = <3300000>;
430			regulator-max-microvolt = <3624000>;
431			regulator-enable-ramp-delay = <500>;
432			regulator-ramp-delay = <0>;
433		};
434	};
435};
436
437&sdc2_state_on {
438	sd-cd-pins {
439		pins = "gpio54";
440		function = "gpio";
441		bias-pull-up;
442		drive-strength = <2>;
443	};
444};
445
446&sdc2_state_off {
447	sd-cd-pins {
448		pins = "gpio54";
449		function = "gpio";
450		bias-disable;
451		drive-strength = <2>;
452	};
453};
454
455&sdhc_1 {
456	status = "okay";
457	supports-cqe;
458
459	vmmc-supply = <&vreg_l4b_2p95>;
460	vqmmc-supply = <&vreg_l8a_1p8>;
461
462	mmc-ddr-1_8v;
463	mmc-hs400-1_8v;
464	mmc-hs400-enhanced-strobe;
465};
466
467&sdhc_2 {
468	status = "okay";
469
470	vmmc-supply = <&vreg_l5b_2p95>;
471	vqmmc-supply = <&vreg_l2b_2p95>;
472
473	cd-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
474	no-sdio;
475	no-mmc;
476};
477
478&tlmm {
479	gpio-reserved-ranges = <0 4>, <8 4>;
480};
481
482&usb2 {
483	status = "okay";
484};
485
486&usb2_dwc3 {
487	dr_mode = "host";
488};
489
490&usb3 {
491	status = "okay";
492};
493
494&usb3_dwc3 {
495	dr_mode = "peripheral";
496	extcon = <&extcon_usb>;
497};
498
499&usb3_qmpphy {
500	vdda-phy-supply = <&vreg_l1b_0p925>;
501	vdda-pll-supply = <&vreg_l10a_1p8>;
502	status = "okay";
503};
504
505&wifi {
506	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
507	vdd-1.8-xo-supply = <&vreg_l9a_1p8>;
508	vdd-1.3-rfa-supply = <&vreg_l6a_1p3>;
509	vdd-3.3-ch0-supply = <&vreg_l19a_3p3>;
510	vdd-3.3-ch1-supply = <&vreg_l8b_3p3>;
511
512	qcom,calibration-variant = "Inforce_IFC6560";
513
514	status = "okay";
515};
516