1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2023, Linaro Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 10 11#include "sa8775p.dtsi" 12#include "sa8775p-pmics.dtsi" 13 14/ { 15 aliases { 16 ethernet0 = ðernet0; 17 ethernet1 = ðernet1; 18 i2c11 = &i2c11; 19 i2c18 = &i2c18; 20 serial0 = &uart10; 21 serial1 = &uart12; 22 serial2 = &uart17; 23 spi16 = &spi16; 24 ufshc1 = &ufs_mem_hc; 25 }; 26 27 chosen { 28 stdout-path = "serial0:115200n8"; 29 }; 30 31 vreg_12p0: vreg-12p0-regulator { 32 compatible = "regulator-fixed"; 33 regulator-name = "VREG_12P0"; 34 35 regulator-always-on; 36 regulator-boot-on; 37 regulator-min-microvolt = <12000000>; 38 regulator-max-microvolt = <12000000>; 39 }; 40 41 vreg_5p0: vreg-5p0-regulator { 42 compatible = "regulator-fixed"; 43 regulator-name = "VREG_5P0"; 44 45 regulator-always-on; 46 regulator-boot-on; 47 regulator-min-microvolt = <5000000>; 48 regulator-max-microvolt = <5000000>; 49 50 vin-supply = <&vreg_12p0>; 51 }; 52 53 vreg_1p8: vreg-1p8-regulator { 54 compatible = "regulator-fixed"; 55 regulator-name = "VREG_1P8"; 56 57 regulator-always-on; 58 regulator-boot-on; 59 regulator-min-microvolt = <1800000>; 60 regulator-max-microvolt = <1800000>; 61 62 vin-supply = <&vreg_5p0>; 63 }; 64 65 vreg_1p0: vreg-1p0-regulator { 66 compatible = "regulator-fixed"; 67 regulator-name = "VREG_1P0"; 68 69 regulator-always-on; 70 regulator-boot-on; 71 regulator-min-microvolt = <1000000>; 72 regulator-max-microvolt = <1000000>; 73 74 vin-supply = <&vreg_1p8>; 75 }; 76 77 vreg_3p0: vreg-3p0-regulator { 78 compatible = "regulator-fixed"; 79 regulator-name = "VREG_3P0"; 80 81 regulator-always-on; 82 regulator-boot-on; 83 regulator-min-microvolt = <3000000>; 84 regulator-max-microvolt = <3000000>; 85 86 vin-supply = <&vreg_12p0>; 87 }; 88 89 vreg_conn_1p8: vreg_conn_1p8 { 90 compatible = "regulator-fixed"; 91 regulator-name = "vreg_conn_1p8"; 92 startup-delay-us = <4000>; 93 enable-active-high; 94 gpio = <&pmm8654au_1_gpios 4 GPIO_ACTIVE_HIGH>; 95 }; 96 97 vreg_conn_pa: vreg_conn_pa { 98 compatible = "regulator-fixed"; 99 regulator-name = "vreg_conn_pa"; 100 startup-delay-us = <4000>; 101 enable-active-high; 102 gpio = <&pmm8654au_1_gpios 6 GPIO_ACTIVE_HIGH>; 103 }; 104 105 wcn6855-pmu { 106 compatible = "qcom,wcn6855-pmu"; 107 108 pinctrl-names = "default"; 109 pinctrl-0 = <&bt_en_state>, <&wlan_en_state>; 110 111 vddio-supply = <&vreg_conn_pa>; 112 vddaon-supply = <&vreg_l2c>; 113 vddpmu-supply = <&vreg_conn_1p8>; 114 vddrfa0p95-supply = <&vreg_l2c>; 115 vddrfa1p3-supply = <&vreg_l6e>; 116 vddrfa1p9-supply = <&vreg_s5a>; 117 vddpcie1p3-supply = <&vreg_l6e>; 118 vddpcie1p9-supply = <&vreg_s5a>; 119 120 bt-enable-gpios = <&pmm8654au_1_gpios 8 GPIO_ACTIVE_HIGH>; 121 wlan-enable-gpios = <&pmm8654au_1_gpios 7 GPIO_ACTIVE_HIGH>; 122 123 regulators { 124 vreg_pmu_rfa_cmn: ldo0 { 125 regulator-name = "vreg_pmu_rfa_cmn"; 126 }; 127 128 vreg_pmu_aon_0p59: ldo1 { 129 regulator-name = "vreg_pmu_aon_0p59"; 130 }; 131 132 vreg_pmu_wlcx_0p8: ldo2 { 133 regulator-name = "vreg_pmu_wlcx_0p8"; 134 }; 135 136 vreg_pmu_wlmx_0p85: ldo3 { 137 regulator-name = "vreg_pmu_wlmx_0p85"; 138 }; 139 140 vreg_pmu_btcmx_0p85: ldo4 { 141 regulator-name = "vreg_pmu_btcmx_0p85"; 142 }; 143 144 vreg_pmu_rfa_0p8: ldo5 { 145 regulator-name = "vreg_pmu_rfa_0p8"; 146 }; 147 148 vreg_pmu_rfa_1p2: ldo6 { 149 regulator-name = "vreg_pmu_rfa_1p2"; 150 }; 151 152 vreg_pmu_rfa_1p7: ldo7 { 153 regulator-name = "vreg_pmu_rfa_1p7"; 154 }; 155 156 vreg_pmu_pcie_0p9: ldo8 { 157 regulator-name = "vreg_pmu_pcie_0p9"; 158 }; 159 160 vreg_pmu_pcie_1p8: ldo9 { 161 regulator-name = "vreg_pmu_pcie_1p8"; 162 }; 163 }; 164 }; 165 166 dp0-connector { 167 compatible = "dp-connector"; 168 label = "eDP0"; 169 type = "full-size"; 170 171 port { 172 dp0_connector_in: endpoint { 173 remote-endpoint = <&mdss0_dp0_out>; 174 }; 175 }; 176 }; 177 178 dp1-connector { 179 compatible = "dp-connector"; 180 label = "eDP1"; 181 type = "full-size"; 182 183 port { 184 dp1_connector_in: endpoint { 185 remote-endpoint = <&mdss0_dp1_out>; 186 }; 187 }; 188 }; 189 190 dp-dsi0-connector { 191 compatible = "dp-connector"; 192 label = "DSI0"; 193 type = "full-size"; 194 195 port { 196 dp_dsi0_connector_in: endpoint { 197 remote-endpoint = <&dsi2dp_bridge0_out>; 198 }; 199 }; 200 }; 201 202 dp-dsi1-connector { 203 compatible = "dp-connector"; 204 label = "DSI1"; 205 type = "full-size"; 206 207 port { 208 dp_dsi1_connector_in: endpoint { 209 remote-endpoint = <&dsi2dp_bridge1_out>; 210 }; 211 }; 212 }; 213}; 214 215&apps_rsc { 216 regulators-0 { 217 compatible = "qcom,pmm8654au-rpmh-regulators"; 218 qcom,pmic-id = "a"; 219 220 vreg_s4a: smps4 { 221 regulator-name = "vreg_s4a"; 222 regulator-min-microvolt = <1800000>; 223 regulator-max-microvolt = <1816000>; 224 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 225 }; 226 227 vreg_s5a: smps5 { 228 regulator-name = "vreg_s5a"; 229 regulator-min-microvolt = <1850000>; 230 regulator-max-microvolt = <1996000>; 231 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 232 }; 233 234 vreg_s9a: smps9 { 235 regulator-name = "vreg_s9a"; 236 regulator-min-microvolt = <535000>; 237 regulator-max-microvolt = <1120000>; 238 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 239 }; 240 241 vreg_l4a: ldo4 { 242 regulator-name = "vreg_l4a"; 243 regulator-min-microvolt = <788000>; 244 regulator-max-microvolt = <1050000>; 245 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 246 regulator-allow-set-load; 247 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 248 RPMH_REGULATOR_MODE_HPM>; 249 }; 250 251 vreg_l5a: ldo5 { 252 regulator-name = "vreg_l5a"; 253 regulator-min-microvolt = <870000>; 254 regulator-max-microvolt = <950000>; 255 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 256 regulator-allow-set-load; 257 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 258 RPMH_REGULATOR_MODE_HPM>; 259 }; 260 261 vreg_l6a: ldo6 { 262 regulator-name = "vreg_l6a"; 263 regulator-min-microvolt = <870000>; 264 regulator-max-microvolt = <970000>; 265 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 266 regulator-allow-set-load; 267 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 268 RPMH_REGULATOR_MODE_HPM>; 269 }; 270 271 vreg_l7a: ldo7 { 272 regulator-name = "vreg_l7a"; 273 regulator-min-microvolt = <720000>; 274 regulator-max-microvolt = <950000>; 275 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 276 regulator-allow-set-load; 277 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 278 RPMH_REGULATOR_MODE_HPM>; 279 }; 280 281 vreg_l8a: ldo8 { 282 regulator-name = "vreg_l8a"; 283 regulator-min-microvolt = <2504000>; 284 regulator-max-microvolt = <3300000>; 285 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 286 regulator-allow-set-load; 287 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 288 RPMH_REGULATOR_MODE_HPM>; 289 }; 290 291 vreg_l9a: ldo9 { 292 regulator-name = "vreg_l9a"; 293 regulator-min-microvolt = <2970000>; 294 regulator-max-microvolt = <3544000>; 295 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 296 regulator-allow-set-load; 297 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 298 RPMH_REGULATOR_MODE_HPM>; 299 }; 300 }; 301 302 regulators-1 { 303 compatible = "qcom,pmm8654au-rpmh-regulators"; 304 qcom,pmic-id = "c"; 305 306 vreg_l1c: ldo1 { 307 regulator-name = "vreg_l1c"; 308 regulator-min-microvolt = <1140000>; 309 regulator-max-microvolt = <1260000>; 310 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 311 regulator-allow-set-load; 312 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 313 RPMH_REGULATOR_MODE_HPM>; 314 }; 315 316 vreg_l2c: ldo2 { 317 regulator-name = "vreg_l2c"; 318 regulator-min-microvolt = <900000>; 319 regulator-max-microvolt = <1100000>; 320 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 321 regulator-allow-set-load; 322 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 323 RPMH_REGULATOR_MODE_HPM>; 324 }; 325 326 vreg_l3c: ldo3 { 327 regulator-name = "vreg_l3c"; 328 regulator-min-microvolt = <1100000>; 329 regulator-max-microvolt = <1300000>; 330 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 331 regulator-allow-set-load; 332 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 333 RPMH_REGULATOR_MODE_HPM>; 334 }; 335 336 vreg_l4c: ldo4 { 337 regulator-name = "vreg_l4c"; 338 regulator-min-microvolt = <1200000>; 339 regulator-max-microvolt = <1200000>; 340 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 341 /* 342 * FIXME: This should have regulator-allow-set-load but 343 * we're getting an over-current fault from the PMIC 344 * when switching to LPM. 345 */ 346 }; 347 348 vreg_l5c: ldo5 { 349 regulator-name = "vreg_l5c"; 350 regulator-min-microvolt = <1100000>; 351 regulator-max-microvolt = <1300000>; 352 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 353 regulator-allow-set-load; 354 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 355 RPMH_REGULATOR_MODE_HPM>; 356 }; 357 358 vreg_l6c: ldo6 { 359 regulator-name = "vreg_l6c"; 360 regulator-min-microvolt = <1620000>; 361 regulator-max-microvolt = <1980000>; 362 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 363 regulator-allow-set-load; 364 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 365 RPMH_REGULATOR_MODE_HPM>; 366 }; 367 368 vreg_l7c: ldo7 { 369 regulator-name = "vreg_l7c"; 370 regulator-min-microvolt = <1620000>; 371 regulator-max-microvolt = <2000000>; 372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 373 regulator-allow-set-load; 374 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 375 RPMH_REGULATOR_MODE_HPM>; 376 }; 377 378 vreg_l8c: ldo8 { 379 regulator-name = "vreg_l8c"; 380 regulator-min-microvolt = <2400000>; 381 regulator-max-microvolt = <3300000>; 382 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 383 regulator-allow-set-load; 384 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 385 RPMH_REGULATOR_MODE_HPM>; 386 }; 387 388 vreg_l9c: ldo9 { 389 regulator-name = "vreg_l9c"; 390 regulator-min-microvolt = <1650000>; 391 regulator-max-microvolt = <2700000>; 392 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 393 regulator-allow-set-load; 394 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 395 RPMH_REGULATOR_MODE_HPM>; 396 }; 397 }; 398 399 regulators-2 { 400 compatible = "qcom,pmm8654au-rpmh-regulators"; 401 qcom,pmic-id = "e"; 402 403 vreg_s4e: smps4 { 404 regulator-name = "vreg_s4e"; 405 regulator-min-microvolt = <970000>; 406 regulator-max-microvolt = <1520000>; 407 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 408 }; 409 410 vreg_s7e: smps7 { 411 regulator-name = "vreg_s7e"; 412 regulator-min-microvolt = <1010000>; 413 regulator-max-microvolt = <1170000>; 414 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 415 }; 416 417 vreg_s9e: smps9 { 418 regulator-name = "vreg_s9e"; 419 regulator-min-microvolt = <300000>; 420 regulator-max-microvolt = <570000>; 421 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 422 }; 423 424 vreg_l6e: ldo6 { 425 regulator-name = "vreg_l6e"; 426 regulator-min-microvolt = <1280000>; 427 regulator-max-microvolt = <1450000>; 428 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 429 regulator-allow-set-load; 430 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 431 RPMH_REGULATOR_MODE_HPM>; 432 }; 433 434 vreg_l8e: ldo8 { 435 regulator-name = "vreg_l8e"; 436 regulator-min-microvolt = <1800000>; 437 regulator-max-microvolt = <1950000>; 438 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 439 regulator-allow-set-load; 440 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 441 RPMH_REGULATOR_MODE_HPM>; 442 }; 443 }; 444}; 445 446ðernet0 { 447 phy-handle = <&sgmii_phy0>; 448 449 pinctrl-0 = <ðernet0_default>; 450 pinctrl-names = "default"; 451 452 snps,mtl-rx-config = <&mtl_rx_setup>; 453 snps,mtl-tx-config = <&mtl_tx_setup>; 454 snps,ps-speed = <1000>; 455 456 status = "okay"; 457 458 mdio: mdio { 459 compatible = "snps,dwmac-mdio"; 460 #address-cells = <1>; 461 #size-cells = <0>; 462 }; 463 464 mtl_rx_setup: rx-queues-config { 465 snps,rx-queues-to-use = <4>; 466 snps,rx-sched-sp; 467 468 queue0 { 469 snps,dcb-algorithm; 470 snps,map-to-dma-channel = <0x0>; 471 snps,route-up; 472 snps,priority = <0x1>; 473 }; 474 475 queue1 { 476 snps,dcb-algorithm; 477 snps,map-to-dma-channel = <0x1>; 478 snps,route-ptp; 479 }; 480 481 queue2 { 482 snps,avb-algorithm; 483 snps,map-to-dma-channel = <0x2>; 484 snps,route-avcp; 485 }; 486 487 queue3 { 488 snps,avb-algorithm; 489 snps,map-to-dma-channel = <0x3>; 490 snps,priority = <0xc>; 491 }; 492 }; 493 494 mtl_tx_setup: tx-queues-config { 495 snps,tx-queues-to-use = <4>; 496 497 queue0 { 498 snps,dcb-algorithm; 499 }; 500 501 queue1 { 502 snps,dcb-algorithm; 503 }; 504 505 queue2 { 506 snps,avb-algorithm; 507 snps,send_slope = <0x1000>; 508 snps,idle_slope = <0x1000>; 509 snps,high_credit = <0x3e800>; 510 snps,low_credit = <0xffc18000>; 511 }; 512 513 queue3 { 514 snps,avb-algorithm; 515 snps,send_slope = <0x1000>; 516 snps,idle_slope = <0x1000>; 517 snps,high_credit = <0x3e800>; 518 snps,low_credit = <0xffc18000>; 519 }; 520 }; 521}; 522 523ðernet1 { 524 phy-handle = <&sgmii_phy1>; 525 526 snps,mtl-rx-config = <&mtl_rx_setup1>; 527 snps,mtl-tx-config = <&mtl_tx_setup1>; 528 snps,ps-speed = <1000>; 529 530 status = "okay"; 531 532 mtl_rx_setup1: rx-queues-config { 533 snps,rx-queues-to-use = <4>; 534 snps,rx-sched-sp; 535 536 queue0 { 537 snps,dcb-algorithm; 538 snps,map-to-dma-channel = <0x0>; 539 snps,route-up; 540 snps,priority = <0x1>; 541 }; 542 543 queue1 { 544 snps,dcb-algorithm; 545 snps,map-to-dma-channel = <0x1>; 546 snps,route-ptp; 547 }; 548 549 queue2 { 550 snps,avb-algorithm; 551 snps,map-to-dma-channel = <0x2>; 552 snps,route-avcp; 553 }; 554 555 queue3 { 556 snps,avb-algorithm; 557 snps,map-to-dma-channel = <0x3>; 558 snps,priority = <0xc>; 559 }; 560 }; 561 562 mtl_tx_setup1: tx-queues-config { 563 snps,tx-queues-to-use = <4>; 564 565 queue0 { 566 snps,dcb-algorithm; 567 }; 568 569 queue1 { 570 snps,dcb-algorithm; 571 }; 572 573 queue2 { 574 snps,avb-algorithm; 575 snps,send_slope = <0x1000>; 576 snps,idle_slope = <0x1000>; 577 snps,high_credit = <0x3e800>; 578 snps,low_credit = <0xffc18000>; 579 }; 580 581 queue3 { 582 snps,avb-algorithm; 583 snps,send_slope = <0x1000>; 584 snps,idle_slope = <0x1000>; 585 snps,high_credit = <0x3e800>; 586 snps,low_credit = <0xffc18000>; 587 }; 588 }; 589}; 590 591&i2c11 { 592 clock-frequency = <400000>; 593 status = "okay"; 594}; 595 596&i2c18 { 597 clock-frequency = <400000>; 598 599 status = "okay"; 600 601 io_expander: gpio@74 { 602 compatible = "ti,tca9539"; 603 reg = <0x74>; 604 interrupts-extended = <&tlmm 98 IRQ_TYPE_EDGE_BOTH>; 605 gpio-controller; 606 #gpio-cells = <2>; 607 interrupt-controller; 608 #interrupt-cells = <2>; 609 reset-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; 610 611 pinctrl-0 = <&io_expander_intr_active>, 612 <&io_expander_reset_active>; 613 pinctrl-names = "default"; 614 }; 615 616 i2c-mux@70 { 617 compatible = "nxp,pca9543"; 618 #address-cells = <1>; 619 620 #size-cells = <0>; 621 reg = <0x70>; 622 623 i2c@0 { 624 reg = <0>; 625 #address-cells = <1>; 626 #size-cells = <0>; 627 628 bridge@58 { 629 compatible = "analogix,anx7625"; 630 reg = <0x58>; 631 interrupts-extended = <&io_expander 2 IRQ_TYPE_EDGE_FALLING>; 632 enable-gpios = <&io_expander 1 GPIO_ACTIVE_HIGH>; 633 reset-gpios = <&io_expander 0 GPIO_ACTIVE_HIGH>; 634 vdd10-supply = <&vreg_1p0>; 635 vdd18-supply = <&vreg_1p8>; 636 vdd33-supply = <&vreg_3p0>; 637 638 ports { 639 #address-cells = <1>; 640 #size-cells = <0>; 641 642 port@0 { 643 reg = <0>; 644 645 dsi2dp_bridge0_in: endpoint { 646 remote-endpoint = <&mdss0_dsi0_out>; 647 }; 648 }; 649 650 port@1 { 651 reg = <1>; 652 653 dsi2dp_bridge0_out: endpoint { 654 remote-endpoint = <&dp_dsi0_connector_in>; 655 }; 656 }; 657 }; 658 }; 659 }; 660 661 i2c@1 { 662 reg = <1>; 663 #address-cells = <1>; 664 #size-cells = <0>; 665 666 bridge@58 { 667 compatible = "analogix,anx7625"; 668 reg = <0x58>; 669 interrupts-extended = <&io_expander 10 IRQ_TYPE_EDGE_FALLING>; 670 enable-gpios = <&io_expander 9 GPIO_ACTIVE_HIGH>; 671 reset-gpios = <&io_expander 8 GPIO_ACTIVE_HIGH>; 672 vdd10-supply = <&vreg_1p0>; 673 vdd18-supply = <&vreg_1p8>; 674 vdd33-supply = <&vreg_3p0>; 675 676 ports { 677 #address-cells = <1>; 678 #size-cells = <0>; 679 680 port@0 { 681 reg = <0>; 682 683 dsi2dp_bridge1_in: endpoint { 684 remote-endpoint = <&mdss0_dsi1_out>; 685 }; 686 }; 687 688 port@1 { 689 reg = <1>; 690 691 dsi2dp_bridge1_out: endpoint { 692 remote-endpoint = <&dp_dsi1_connector_in>; 693 }; 694 }; 695 }; 696 }; 697 }; 698 }; 699 700}; 701 702&iris { 703 firmware-name = "qcom/vpu/vpu30_p4_s6.mbn"; 704 705 status = "okay"; 706}; 707 708&mdss0 { 709 status = "okay"; 710}; 711 712&mdss0_dp0 { 713 pinctrl-0 = <&dp0_hot_plug_det>; 714 pinctrl-names = "default"; 715 716 status = "okay"; 717}; 718 719&mdss0_dp0_out { 720 data-lanes = <0 1 2 3>; 721 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 722 remote-endpoint = <&dp0_connector_in>; 723}; 724 725&mdss0_dp0_phy { 726 vdda-phy-supply = <&vreg_l1c>; 727 vdda-pll-supply = <&vreg_l4a>; 728 729 status = "okay"; 730}; 731 732&mdss0_dp1 { 733 pinctrl-0 = <&dp1_hot_plug_det>; 734 pinctrl-names = "default"; 735 736 status = "okay"; 737}; 738 739&mdss0_dp1_out { 740 data-lanes = <0 1 2 3>; 741 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 742 remote-endpoint = <&dp1_connector_in>; 743}; 744 745&mdss0_dp1_phy { 746 vdda-phy-supply = <&vreg_l1c>; 747 vdda-pll-supply = <&vreg_l4a>; 748 749 status = "okay"; 750}; 751 752&mdss0_dsi0 { 753 vdda-supply = <&vreg_l1c>; 754 755 status = "okay"; 756}; 757 758&mdss0_dsi0_out { 759 data-lanes = <0 1 2 3>; 760 remote-endpoint = <&dsi2dp_bridge0_in>; 761}; 762 763&mdss0_dsi0_phy { 764 vdds-supply = <&vreg_l4a>; 765 766 status = "okay"; 767}; 768 769&mdss0_dsi1 { 770 vdda-supply = <&vreg_l1c>; 771 772 status = "okay"; 773}; 774 775&mdss0_dsi1_out { 776 data-lanes = <0 1 2 3>; 777 remote-endpoint = <&dsi2dp_bridge1_in>; 778}; 779 780&mdss0_dsi1_phy { 781 vdds-supply = <&vreg_l4a>; 782 783 status = "okay"; 784}; 785 786&pmm8654au_0_gpios { 787 gpio-line-names = "DS_EN", 788 "POFF_COMPLETE", 789 "UFS0_VER_ID", 790 "FAST_POFF", 791 "DBU1_PON_DONE", 792 "AOSS_SLEEP", 793 "CAM_DES0_EN", 794 "CAM_DES1_EN", 795 "CAM_DES2_EN", 796 "CAM_DES3_EN", 797 "UEFI", 798 "ANALOG_PON_OPT"; 799}; 800 801&pmm8654au_0_pon_resin { 802 linux,code = <KEY_VOLUMEDOWN>; 803 status = "okay"; 804}; 805 806&pmm8654au_1_gpios { 807 gpio-line-names = "PMIC_C_ID0", 808 "PMIC_C_ID1", 809 "UFS1_VER_ID", 810 "IPA_PWR", 811 "", 812 "WLAN_DBU4_EN", 813 "WLAN_EN", 814 "BT_EN", 815 "USB2_PWR_EN", 816 "USB2_FAULT"; 817 818 wlan_en_state: wlan-en-state { 819 pins = "gpio7"; 820 function = "normal"; 821 output-low; 822 bias-pull-down; 823 }; 824 825 bt_en_state: bt-en-state { 826 pins = "gpio8"; 827 function = "normal"; 828 output-low; 829 bias-pull-down; 830 }; 831 832 usb2_en_state: usb2-en-state { 833 pins = "gpio9"; 834 function = "normal"; 835 output-high; 836 power-source = <0>; 837 }; 838}; 839 840&pmm8654au_2_gpios { 841 gpio-line-names = "PMIC_E_ID0", 842 "PMIC_E_ID1", 843 "USB0_PWR_EN", 844 "USB0_FAULT", 845 "SENSOR_IRQ_1", 846 "SENSOR_IRQ_2", 847 "SENSOR_RST", 848 "SGMIIO0_RST", 849 "SGMIIO1_RST", 850 "USB1_PWR_ENABLE", 851 "USB1_FAULT", 852 "VMON_SPX8"; 853 854 usb0_en_state: usb0-en-state { 855 pins = "gpio3"; 856 function = "normal"; 857 output-high; 858 power-source = <0>; 859 }; 860 861 usb1_en_state: usb1-en-state { 862 pins = "gpio10"; 863 function = "normal"; 864 output-high; 865 power-source = <0>; 866 }; 867}; 868 869&pmm8654au_3_gpios { 870 gpio-line-names = "PMIC_G_ID0", 871 "PMIC_G_ID1", 872 "GNSS_RST", 873 "GNSS_EN", 874 "GNSS_BOOT_MODE"; 875}; 876 877&qupv3_id_1 { 878 status = "okay"; 879}; 880 881&qupv3_id_2 { 882 status = "okay"; 883}; 884 885&qup_spi16_default { 886 drive-strength = <6>; 887 bias-disable; 888}; 889 890&qup_i2c11_default { 891 drive-strength = <2>; 892 bias-pull-up; 893}; 894 895&qup_i2c18_default { 896 drive-strength = <2>; 897 bias-pull-up; 898}; 899 900&qup_uart12_cts { 901 bias-disable; 902}; 903 904&qup_uart12_rts { 905 bias-pull-down; 906}; 907 908&qup_uart12_tx { 909 bias-pull-up; 910}; 911 912&qup_uart12_rx { 913 bias-pull-down; 914}; 915 916&qup_uart17_cts { 917 bias-disable; 918}; 919 920&qup_uart17_rts { 921 bias-pull-down; 922}; 923 924&qup_uart17_tx { 925 bias-pull-up; 926}; 927 928&qup_uart17_rx { 929 bias-pull-down; 930}; 931 932&serdes0 { 933 phy-supply = <&vreg_l5a>; 934 status = "okay"; 935}; 936 937&serdes1 { 938 phy-supply = <&vreg_l5a>; 939 status = "okay"; 940}; 941 942&sleep_clk { 943 clock-frequency = <32000>; 944}; 945 946&spi16 { 947 status = "okay"; 948}; 949 950&tlmm { 951 dp0_hot_plug_det: dp0-hot-plug-det-state { 952 pins = "gpio101"; 953 function = "edp0_hot"; 954 bias-disable; 955 }; 956 957 dp1_hot_plug_det: dp1-hot-plug-det-state { 958 pins = "gpio102"; 959 function = "edp1_hot"; 960 bias-disable; 961 }; 962 963 ethernet0_default: ethernet0-default-state { 964 ethernet0_mdc: ethernet0-mdc-pins { 965 pins = "gpio8"; 966 function = "emac0_mdc"; 967 drive-strength = <16>; 968 bias-pull-up; 969 }; 970 971 ethernet0_mdio: ethernet0-mdio-pins { 972 pins = "gpio9"; 973 function = "emac0_mdio"; 974 drive-strength = <16>; 975 bias-pull-up; 976 }; 977 }; 978 979 io_expander_intr_active: io-expander-intr-active-state { 980 pins = "gpio98"; 981 function = "gpio"; 982 drive-strength = <2>; 983 bias-disable; 984 }; 985 986 io_expander_reset_active: io-expander-reset-active-state { 987 pins = "gpio97"; 988 function = "gpio"; 989 drive-strength = <2>; 990 bias-disable; 991 output-high; 992 }; 993 994 pcie0_default_state: pcie0-default-state { 995 perst-pins { 996 pins = "gpio2"; 997 function = "gpio"; 998 drive-strength = <2>; 999 bias-pull-down; 1000 }; 1001 1002 clkreq-pins { 1003 pins = "gpio1"; 1004 function = "pcie0_clkreq"; 1005 drive-strength = <2>; 1006 bias-pull-up; 1007 }; 1008 1009 wake-pins { 1010 pins = "gpio0"; 1011 function = "gpio"; 1012 drive-strength = <2>; 1013 bias-pull-up; 1014 }; 1015 }; 1016 1017 pcie1_default_state: pcie1-default-state { 1018 perst-pins { 1019 pins = "gpio4"; 1020 function = "gpio"; 1021 drive-strength = <2>; 1022 bias-pull-down; 1023 }; 1024 1025 clkreq-pins { 1026 pins = "gpio3"; 1027 function = "pcie1_clkreq"; 1028 drive-strength = <2>; 1029 bias-pull-up; 1030 }; 1031 1032 wake-pins { 1033 pins = "gpio5"; 1034 function = "gpio"; 1035 drive-strength = <2>; 1036 bias-pull-up; 1037 }; 1038 }; 1039}; 1040 1041&pcie0 { 1042 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; 1043 wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>; 1044 1045 pinctrl-names = "default"; 1046 pinctrl-0 = <&pcie0_default_state>; 1047 1048 status = "okay"; 1049}; 1050 1051&pcie1 { 1052 perst-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>; 1053 wake-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>; 1054 1055 pinctrl-names = "default"; 1056 pinctrl-0 = <&pcie1_default_state>; 1057 1058 status = "okay"; 1059}; 1060 1061&pcie0_phy { 1062 vdda-phy-supply = <&vreg_l5a>; 1063 vdda-pll-supply = <&vreg_l1c>; 1064 1065 status = "okay"; 1066}; 1067 1068&pcie1_phy { 1069 vdda-phy-supply = <&vreg_l5a>; 1070 vdda-pll-supply = <&vreg_l1c>; 1071 1072 status = "okay"; 1073}; 1074 1075&pcieport0 { 1076 wifi@0 { 1077 compatible = "pci17cb,1101"; 1078 reg = <0x10000 0x0 0x0 0x0 0x0>; 1079 1080 qcom,calibration-variant = "QC_SA8775P_Ride"; 1081 1082 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; 1083 vddaon-supply = <&vreg_pmu_aon_0p59>; 1084 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 1085 vddwlmx-supply = <&vreg_pmu_wlmx_0p85>; 1086 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 1087 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 1088 vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>; 1089 vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>; 1090 vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>; 1091 }; 1092}; 1093 1094&remoteproc_adsp { 1095 firmware-name = "qcom/sa8775p/adsp.mbn"; 1096 status = "okay"; 1097}; 1098 1099&remoteproc_cdsp0 { 1100 firmware-name = "qcom/sa8775p/cdsp0.mbn"; 1101 status = "okay"; 1102}; 1103 1104&remoteproc_cdsp1 { 1105 firmware-name = "qcom/sa8775p/cdsp1.mbn"; 1106 status = "okay"; 1107}; 1108 1109&remoteproc_gpdsp0 { 1110 firmware-name = "qcom/sa8775p/gpdsp0.mbn"; 1111 status = "okay"; 1112}; 1113 1114&remoteproc_gpdsp1 { 1115 firmware-name = "qcom/sa8775p/gpdsp1.mbn"; 1116 status = "okay"; 1117}; 1118 1119&uart10 { 1120 compatible = "qcom,geni-debug-uart"; 1121 status = "okay"; 1122}; 1123 1124&uart12 { 1125 pinctrl-0 = <&qup_uart12_default>; 1126 pinctrl-names = "default"; 1127 status = "okay"; 1128}; 1129 1130&uart17 { 1131 pinctrl-0 = <&qup_uart17_default>; 1132 pinctrl-names = "default"; 1133 status = "okay"; 1134 1135 bluetooth { 1136 compatible = "qcom,wcn6855-bt"; 1137 firmware-name = "QCA6698/hpnv21", "QCA6698/hpbtfw21.tlv"; 1138 1139 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>; 1140 vddaon-supply = <&vreg_pmu_aon_0p59>; 1141 vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>; 1142 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 1143 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 1144 vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>; 1145 }; 1146}; 1147 1148&ufs_mem_hc { 1149 reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; 1150 vcc-supply = <&vreg_l8a>; 1151 vcc-max-microamp = <1100000>; 1152 vccq-supply = <&vreg_l4c>; 1153 vccq-max-microamp = <1200000>; 1154 1155 status = "okay"; 1156}; 1157 1158&ufs_mem_phy { 1159 vdda-phy-supply = <&vreg_l4a>; 1160 vdda-pll-supply = <&vreg_l1c>; 1161 1162 status = "okay"; 1163}; 1164 1165&usb_0 { 1166 pinctrl-names = "default"; 1167 pinctrl-0 = <&usb0_en_state>; 1168 1169 status = "okay"; 1170}; 1171 1172&usb_0_dwc3 { 1173 dr_mode = "peripheral"; 1174}; 1175 1176&usb_0_hsphy { 1177 vdda-pll-supply = <&vreg_l7a>; 1178 vdda18-supply = <&vreg_l6c>; 1179 vdda33-supply = <&vreg_l9a>; 1180 1181 status = "okay"; 1182}; 1183 1184&usb_0_qmpphy { 1185 vdda-phy-supply = <&vreg_l1c>; 1186 vdda-pll-supply = <&vreg_l7a>; 1187 1188 status = "okay"; 1189}; 1190 1191&usb_1 { 1192 pinctrl-names = "default"; 1193 pinctrl-0 = <&usb1_en_state>; 1194 1195 status = "okay"; 1196}; 1197 1198&usb_1_dwc3 { 1199 dr_mode = "host"; 1200}; 1201 1202&usb_1_hsphy { 1203 vdda-pll-supply = <&vreg_l7a>; 1204 vdda18-supply = <&vreg_l6c>; 1205 vdda33-supply = <&vreg_l9a>; 1206 1207 status = "okay"; 1208}; 1209 1210&usb_1_qmpphy { 1211 vdda-phy-supply = <&vreg_l1c>; 1212 vdda-pll-supply = <&vreg_l7a>; 1213 1214 status = "okay"; 1215}; 1216 1217&usb_2 { 1218 pinctrl-names = "default"; 1219 pinctrl-0 = <&usb2_en_state>; 1220 1221 status = "okay"; 1222}; 1223 1224&usb_2_dwc3 { 1225 dr_mode = "host"; 1226}; 1227 1228&usb_2_hsphy { 1229 vdda-pll-supply = <&vreg_l7a>; 1230 vdda18-supply = <&vreg_l6c>; 1231 vdda33-supply = <&vreg_l9a>; 1232 1233 status = "okay"; 1234}; 1235 1236&xo_board_clk { 1237 clock-frequency = <38400000>; 1238}; 1239