1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6/dts-v1/; 7 8/* PM7250B is configured to use SID8/9 */ 9#define PM7250B_SID 8 10#define PM7250B_SID1 9 11 12#include <dt-bindings/input/linux-event-codes.h> 13#include <dt-bindings/leds/common.h> 14#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 15#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 16#include "sc7280.dtsi" 17#include "pm7250b.dtsi" 18#include "pm7325.dtsi" 19#include "pm8350c.dtsi" 20#include "pmk8350.dtsi" 21 22/delete-node/ &ipa_fw_mem; 23/delete-node/ &rmtfs_mem; 24/delete-node/ &adsp_mem; 25/delete-node/ &cdsp_mem; 26/delete-node/ &video_mem; 27/delete-node/ &wlan_ce_mem; 28/delete-node/ &wpss_mem; 29/delete-node/ &xbl_mem; 30 31/ { 32 model = "Qualcomm Technologies, Inc. QCM6490 IDP"; 33 compatible = "qcom,qcm6490-idp", "qcom,qcm6490"; 34 chassis-type = "embedded"; 35 36 aliases { 37 serial0 = &uart5; 38 }; 39 40 pm8350c_pwm_backlight: backlight { 41 compatible = "pwm-backlight"; 42 pwms = <&pm8350c_pwm 3 65535>; 43 enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>; 44 pinctrl-0 = <&pmic_lcd_bl_en>; 45 pinctrl-names = "default"; 46 }; 47 48 chosen { 49 stdout-path = "serial0:115200n8"; 50 }; 51 52 lcd_disp_bias: regulator-lcd-disp-bias { 53 compatible = "regulator-fixed"; 54 regulator-name = "lcd_disp_bias"; 55 regulator-min-microvolt = <5500000>; 56 regulator-max-microvolt = <5500000>; 57 gpio = <&pm7250b_gpios 2 GPIO_ACTIVE_HIGH>; 58 enable-active-high; 59 pinctrl-0 = <&lcd_disp_bias_en>; 60 pinctrl-names = "default"; 61 }; 62 63 gpio-keys { 64 compatible = "gpio-keys"; 65 66 pinctrl-0 = <&key_vol_up_default>; 67 pinctrl-names = "default"; 68 69 key-volume-up { 70 label = "Volume_up"; 71 gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; 72 linux,code = <KEY_VOLUMEUP>; 73 wakeup-source; 74 debounce-interval = <15>; 75 linux,can-disable; 76 }; 77 }; 78 79 reserved-memory { 80 xbl_mem: xbl@80700000 { 81 reg = <0x0 0x80700000 0x0 0x100000>; 82 no-map; 83 }; 84 85 cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { 86 reg = <0x0 0x81800000 0x0 0x1e00000>; 87 no-map; 88 }; 89 90 camera_mem: camera@84300000 { 91 reg = <0x0 0x84300000 0x0 0x500000>; 92 no-map; 93 }; 94 95 wpss_mem: wpss@84800000 { 96 reg = <0x0 0x84800000 0x0 0x1900000>; 97 no-map; 98 }; 99 100 adsp_mem: adsp@86100000 { 101 reg = <0x0 0x86100000 0x0 0x2800000>; 102 no-map; 103 }; 104 105 cdsp_mem: cdsp@88900000 { 106 reg = <0x0 0x88900000 0x0 0x1e00000>; 107 no-map; 108 }; 109 110 video_mem: video@8a700000 { 111 reg = <0x0 0x8a700000 0x0 0x700000>; 112 no-map; 113 }; 114 115 cvp_mem: cvp@8ae00000 { 116 reg = <0x0 0x8ae00000 0x0 0x500000>; 117 no-map; 118 }; 119 120 ipa_fw_mem: ipa-fw@8b300000 { 121 reg = <0x0 0x8b300000 0x0 0x10000>; 122 no-map; 123 }; 124 125 ipa_gsi_mem: ipa-gsi@8b310000 { 126 reg = <0x0 0x8b310000 0x0 0xa000>; 127 no-map; 128 }; 129 130 gpu_microcode_mem: gpu-microcode@8b31a000 { 131 reg = <0x0 0x8b31a000 0x0 0x2000>; 132 no-map; 133 }; 134 135 mpss_mem: mpss@8b800000 { 136 reg = <0x0 0x8b800000 0x0 0xf600000>; 137 no-map; 138 }; 139 140 tz_stat_mem: tz-stat@c0000000 { 141 reg = <0x0 0xc0000000 0x0 0x100000>; 142 no-map; 143 }; 144 145 tags_mem: tags@c0100000 { 146 reg = <0x0 0xc0100000 0x0 0x1200000>; 147 no-map; 148 }; 149 150 qtee_mem: qtee@c1300000 { 151 reg = <0x0 0xc1300000 0x0 0x500000>; 152 no-map; 153 }; 154 155 trusted_apps_mem: trusted-apps@c1800000 { 156 reg = <0x0 0xc1800000 0x0 0x1c00000>; 157 no-map; 158 }; 159 160 debug_vm_mem: debug-vm@d0600000 { 161 reg = <0x0 0xd0600000 0x0 0x100000>; 162 no-map; 163 }; 164 }; 165 166 vph_pwr: vph-pwr-regulator { 167 compatible = "regulator-fixed"; 168 regulator-name = "vph_pwr"; 169 regulator-min-microvolt = <3700000>; 170 regulator-max-microvolt = <3700000>; 171 }; 172}; 173 174&apps_rsc { 175 regulators-0 { 176 compatible = "qcom,pm7325-rpmh-regulators"; 177 qcom,pmic-id = "b"; 178 179 vdd-s1-supply = <&vph_pwr>; 180 vdd-s2-supply = <&vph_pwr>; 181 vdd-s3-supply = <&vph_pwr>; 182 vdd-s4-supply = <&vph_pwr>; 183 vdd-s5-supply = <&vph_pwr>; 184 vdd-s6-supply = <&vph_pwr>; 185 vdd-s7-supply = <&vph_pwr>; 186 vdd-s8-supply = <&vph_pwr>; 187 vdd-l1-l4-l12-l15-supply = <&vreg_s7b_0p972>; 188 vdd-l2-l7-supply = <&vreg_bob_3p296>; 189 vdd-l3-supply = <&vreg_s2b_0p876>; 190 vdd-l5-supply = <&vreg_s2b_0p876>; 191 vdd-l6-l9-l10-supply = <&vreg_s8b_1p272>; 192 vdd-l8-supply = <&vreg_s7b_0p972>; 193 vdd-l11-l17-l18-l19-supply = <&vreg_s1b_1p872>; 194 vdd-l13-supply = <&vreg_s7b_0p972>; 195 vdd-l14-l16-supply = <&vreg_s8b_1p272>; 196 197 vreg_s1b_1p872: smps1 { 198 regulator-name = "vreg_s1b_1p872"; 199 regulator-min-microvolt = <1840000>; 200 regulator-max-microvolt = <2040000>; 201 }; 202 203 vreg_s2b_0p876: smps2 { 204 regulator-name = "vreg_s2b_0p876"; 205 regulator-min-microvolt = <570070>; 206 regulator-max-microvolt = <1050000>; 207 }; 208 209 vreg_s7b_0p972: smps7 { 210 regulator-name = "vreg_s7b_0p972"; 211 regulator-min-microvolt = <535000>; 212 regulator-max-microvolt = <1120000>; 213 }; 214 215 vreg_s8b_1p272: smps8 { 216 regulator-name = "vreg_s8b_1p272"; 217 regulator-min-microvolt = <1200000>; 218 regulator-max-microvolt = <1500000>; 219 regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>; 220 }; 221 222 vreg_l1b_0p912: ldo1 { 223 regulator-name = "vreg_l1b_0p912"; 224 regulator-min-microvolt = <825000>; 225 regulator-max-microvolt = <925000>; 226 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 227 }; 228 229 vreg_l2b_3p072: ldo2 { 230 regulator-name = "vreg_l2b_3p072"; 231 regulator-min-microvolt = <2700000>; 232 regulator-max-microvolt = <3544000>; 233 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 234 }; 235 236 vreg_l3b_0p504: ldo3 { 237 regulator-name = "vreg_l3b_0p504"; 238 regulator-min-microvolt = <312000>; 239 regulator-max-microvolt = <910000>; 240 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 241 }; 242 243 vreg_l4b_0p752: ldo4 { 244 regulator-name = "vreg_l4b_0p752"; 245 regulator-min-microvolt = <752000>; 246 regulator-max-microvolt = <820000>; 247 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 248 }; 249 250 reg_l5b_0p752: ldo5 { 251 regulator-name = "reg_l5b_0p752"; 252 regulator-min-microvolt = <552000>; 253 regulator-max-microvolt = <832000>; 254 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 255 }; 256 257 vreg_l6b_1p2: ldo6 { 258 regulator-name = "vreg_l6b_1p2"; 259 regulator-min-microvolt = <1140000>; 260 regulator-max-microvolt = <1260000>; 261 regulator-allow-set-load; 262 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; 263 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 264 }; 265 266 vreg_l7b_2p952: ldo7 { 267 regulator-name = "vreg_l7b_2p952"; 268 regulator-min-microvolt = <2400000>; 269 regulator-max-microvolt = <3544000>; 270 regulator-allow-set-load; 271 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; 272 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 273 }; 274 275 vreg_l8b_0p904: ldo8 { 276 regulator-name = "vreg_l8b_0p904"; 277 regulator-min-microvolt = <870000>; 278 regulator-max-microvolt = <970000>; 279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 280 }; 281 282 vreg_l9b_1p2: ldo9 { 283 regulator-name = "vreg_l9b_1p2"; 284 regulator-min-microvolt = <1200000>; 285 regulator-max-microvolt = <1304000>; 286 regulator-allow-set-load; 287 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; 288 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 289 }; 290 291 vreg_l11b_1p504: ldo11 { 292 regulator-name = "vreg_l11b_1p504"; 293 regulator-min-microvolt = <1504000>; 294 regulator-max-microvolt = <2000000>; 295 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 296 }; 297 298 vreg_l12b_0p751: ldo12 { 299 regulator-name = "vreg_l12b_0p751"; 300 regulator-min-microvolt = <751000>; 301 regulator-max-microvolt = <824000>; 302 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 303 }; 304 305 vreg_l13b_0p53: ldo13 { 306 regulator-name = "vreg_l13b_0p53"; 307 regulator-min-microvolt = <530000>; 308 regulator-max-microvolt = <824000>; 309 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 310 }; 311 312 vreg_l14b_1p08: ldo14 { 313 regulator-name = "vreg_l14b_1p08"; 314 regulator-min-microvolt = <1080000>; 315 regulator-max-microvolt = <1304000>; 316 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 317 }; 318 319 vreg_l15b_0p765: ldo15 { 320 regulator-name = "vreg_l15b_0p765"; 321 regulator-min-microvolt = <765000>; 322 regulator-max-microvolt = <1020000>; 323 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 324 }; 325 326 vreg_l16b_1p1: ldo16 { 327 regulator-name = "vreg_l16b_1p1"; 328 regulator-min-microvolt = <1100000>; 329 regulator-max-microvolt = <1300000>; 330 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 331 }; 332 333 vreg_l17b_1p7: ldo17 { 334 regulator-name = "vreg_l17b_1p7"; 335 regulator-min-microvolt = <1700000>; 336 regulator-max-microvolt = <1900000>; 337 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 338 }; 339 340 vreg_l18b_1p8: ldo18 { 341 regulator-name = "vreg_l18b_1p8"; 342 regulator-min-microvolt = <1800000>; 343 regulator-max-microvolt = <2000000>; 344 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 345 }; 346 347 vreg_l19b_1p8: ldo19 { 348 regulator-name = "vreg_l19b_1p8"; 349 regulator-min-microvolt = <1800000>; 350 regulator-max-microvolt = <2000000>; 351 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 352 regulator-allow-set-load; 353 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 354 RPMH_REGULATOR_MODE_HPM>; 355 }; 356 }; 357 358 regulators-1 { 359 compatible = "qcom,pm8350c-rpmh-regulators"; 360 qcom,pmic-id = "c"; 361 362 vdd-s1-supply = <&vph_pwr>; 363 vdd-s2-supply = <&vph_pwr>; 364 vdd-s3-supply = <&vph_pwr>; 365 vdd-s4-supply = <&vph_pwr>; 366 vdd-s5-supply = <&vph_pwr>; 367 vdd-s6-supply = <&vph_pwr>; 368 vdd-s7-supply = <&vph_pwr>; 369 vdd-s8-supply = <&vph_pwr>; 370 vdd-s9-supply = <&vph_pwr>; 371 vdd-s10-supply = <&vph_pwr>; 372 vdd-l1-l12-supply = <&vreg_s1b_1p872>; 373 vdd-l2-l8-supply = <&vreg_s1b_1p872>; 374 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob_3p296>; 375 vdd-l6-l9-l11-supply = <&vreg_bob_3p296>; 376 vdd-l10-supply = <&vreg_s7b_0p972>; 377 vdd-bob-supply = <&vph_pwr>; 378 379 vreg_s1c_2p19: smps1 { 380 regulator-name = "vreg_s1c_2p19"; 381 regulator-min-microvolt = <2190000>; 382 regulator-max-microvolt = <2210000>; 383 }; 384 385 vreg_s2c_0p752: smps2 { 386 regulator-name = "vreg_s2c_0p752"; 387 regulator-min-microvolt = <750000>; 388 regulator-max-microvolt = <800000>; 389 }; 390 391 vreg_s5c_0p752: smps5 { 392 regulator-name = "vreg_s5c_0p752"; 393 regulator-min-microvolt = <465000>; 394 regulator-max-microvolt = <1050000>; 395 }; 396 397 vreg_s7c_0p752: smps7 { 398 regulator-name = "vreg_s7c_0p752"; 399 regulator-min-microvolt = <465000>; 400 regulator-max-microvolt = <800000>; 401 }; 402 403 vreg_s9c_1p084: smps9 { 404 regulator-name = "vreg_s9c_1p084"; 405 regulator-min-microvolt = <1010000>; 406 regulator-max-microvolt = <1170000>; 407 }; 408 409 vreg_l1c_1p8: ldo1 { 410 regulator-name = "vreg_l1c_1p8"; 411 regulator-min-microvolt = <1800000>; 412 regulator-max-microvolt = <1980000>; 413 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 414 }; 415 416 vreg_l2c_1p62: ldo2 { 417 regulator-name = "vreg_l2c_1p62"; 418 regulator-min-microvolt = <1620000>; 419 regulator-max-microvolt = <1980000>; 420 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 421 }; 422 423 vreg_l3c_2p8: ldo3 { 424 regulator-name = "vreg_l3c_2p8"; 425 regulator-min-microvolt = <2800000>; 426 regulator-max-microvolt = <3540000>; 427 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 428 }; 429 430 vreg_l4c_1p62: ldo4 { 431 regulator-name = "vreg_l4c_1p62"; 432 regulator-min-microvolt = <1620000>; 433 regulator-max-microvolt = <3300000>; 434 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 435 }; 436 437 vreg_l5c_1p62: ldo5 { 438 regulator-name = "vreg_l5c_1p62"; 439 regulator-min-microvolt = <1620000>; 440 regulator-max-microvolt = <3300000>; 441 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 442 }; 443 444 vreg_l6c_2p96: ldo6 { 445 regulator-name = "vreg_l6c_2p96"; 446 regulator-min-microvolt = <1650000>; 447 regulator-max-microvolt = <3544000>; 448 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 449 }; 450 451 vreg_l7c_3p0: ldo7 { 452 regulator-name = "vreg_l7c_3p0"; 453 regulator-min-microvolt = <3000000>; 454 regulator-max-microvolt = <3544000>; 455 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 456 }; 457 458 vreg_l8c_1p62: ldo8 { 459 regulator-name = "vreg_l8c_1p62"; 460 regulator-min-microvolt = <1620000>; 461 regulator-max-microvolt = <2000000>; 462 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 463 }; 464 465 vreg_l9c_2p96: ldo9 { 466 regulator-name = "vreg_l9c_2p96"; 467 regulator-min-microvolt = <2700000>; 468 regulator-max-microvolt = <35440000>; 469 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 470 }; 471 472 vreg_l10c_0p88: ldo10 { 473 regulator-name = "vreg_l10c_0p88"; 474 regulator-min-microvolt = <720000>; 475 regulator-max-microvolt = <1050000>; 476 regulator-allow-set-load; 477 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; 478 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 479 }; 480 481 vreg_l11c_2p8: ldo11 { 482 regulator-name = "vreg_l11c_2p8"; 483 regulator-min-microvolt = <2800000>; 484 regulator-max-microvolt = <3544000>; 485 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 486 }; 487 488 vreg_l12c_1p65: ldo12 { 489 regulator-name = "vreg_l12c_1p65"; 490 regulator-min-microvolt = <1650000>; 491 regulator-max-microvolt = <2000000>; 492 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 493 }; 494 495 vreg_l13c_2p7: ldo13 { 496 regulator-name = "vreg_l13c_2p7"; 497 regulator-min-microvolt = <2700000>; 498 regulator-max-microvolt = <3544000>; 499 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 500 }; 501 502 vreg_bob_3p296: bob { 503 regulator-name = "vreg_bob_3p296"; 504 regulator-min-microvolt = <3008000>; 505 regulator-max-microvolt = <3960000>; 506 }; 507 }; 508}; 509 510&gcc { 511 protected-clocks = <GCC_AGGRE_NOC_PCIE_1_AXI_CLK> ,<GCC_PCIE_1_AUX_CLK>, 512 <GCC_PCIE_1_AUX_CLK_SRC>, <GCC_PCIE_1_CFG_AHB_CLK>, 513 <GCC_PCIE_1_MSTR_AXI_CLK>, <GCC_PCIE_1_PHY_RCHNG_CLK_SRC>, 514 <GCC_PCIE_1_PIPE_CLK>, <GCC_PCIE_1_PIPE_CLK_SRC>, 515 <GCC_PCIE_1_SLV_AXI_CLK>, <GCC_PCIE_1_SLV_Q2A_AXI_CLK>, 516 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, <GCC_QSPI_CORE_CLK>, 517 <GCC_QSPI_CORE_CLK_SRC>,<GCC_USB30_SEC_MASTER_CLK>, 518 <GCC_USB30_SEC_MASTER_CLK_SRC>, <GCC_USB30_SEC_MOCK_UTMI_CLK>, 519 <GCC_USB30_SEC_MOCK_UTMI_CLK_SRC>, 520 <GCC_USB30_SEC_MOCK_UTMI_POSTDIV_CLK_SRC>, <GCC_USB30_SEC_SLEEP_CLK>, 521 <GCC_USB3_SEC_PHY_AUX_CLK>, <GCC_USB3_SEC_PHY_AUX_CLK_SRC>, 522 <GCC_USB3_SEC_PHY_COM_AUX_CLK>, <GCC_USB3_SEC_PHY_PIPE_CLK>, 523 <GCC_USB3_SEC_PHY_PIPE_CLK_SRC>, <GCC_CFG_NOC_LPASS_CLK>, 524 <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, <GCC_MSS_CFG_AHB_CLK>, 525 <GCC_MSS_OFFLINE_AXI_CLK>, <GCC_MSS_SNOC_AXI_CLK>, 526 <GCC_MSS_Q6_MEMNOC_AXI_CLK>, <GCC_MSS_Q6SS_BOOT_CLK_SRC>, 527 <GCC_SEC_CTRL_CLK_SRC>, <GCC_WPSS_AHB_CLK>, 528 <GCC_WPSS_AHB_BDG_MST_CLK>, <GCC_WPSS_RSCP_CLK>; 529}; 530 531&gpu { 532 status = "okay"; 533}; 534 535&gpu_zap_shader { 536 firmware-name = "qcom/qcm6490/a660_zap.mbn"; 537}; 538 539&mdss { 540 status = "okay"; 541}; 542 543&mdss_dsi { 544 vdda-supply = <&vreg_l6b_1p2>; 545 status = "okay"; 546 547 panel@0 { 548 compatible = "novatek,nt36672e"; 549 reg = <0>; 550 551 reset-gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>; 552 553 vddi-supply = <&vreg_l8c_1p62>; 554 avdd-supply = <&lcd_disp_bias>; 555 avee-supply = <&lcd_disp_bias>; 556 557 backlight = <&pm8350c_pwm_backlight>; 558 559 port { 560 panel0_in: endpoint { 561 remote-endpoint = <&mdss_dsi0_out>; 562 }; 563 }; 564 }; 565}; 566 567&mdss_dsi0_out { 568 remote-endpoint = <&panel0_in>; 569 data-lanes = <0 1 2 3>; 570}; 571 572&mdss_dsi_phy { 573 vdds-supply = <&vreg_l10c_0p88>; 574 status = "okay"; 575}; 576 577&pm7250b_gpios { 578 lcd_disp_bias_en: lcd-disp-bias-en-state { 579 pins = "gpio2"; 580 function = "func1"; 581 bias-disable; 582 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 583 input-disable; 584 output-enable; 585 power-source = <0>; 586 }; 587}; 588 589&pm8350c_gpios { 590 pmic_lcd_bl_en: pmic-lcd-bl-en-state { 591 pins = "gpio7"; 592 function = "normal"; 593 bias-disable; 594 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 595 output-low; 596 power-source = <0>; 597 }; 598 599 pmic_lcd_bl_pwm: pmic-lcd-bl-pwm-state { 600 pins = "gpio8"; 601 function = "func1"; 602 bias-disable; 603 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 604 output-low; 605 power-source = <0>; 606 }; 607}; 608 609&pm7325_gpios { 610 key_vol_up_default: key-vol-up-state { 611 pins = "gpio6"; 612 function = "normal"; 613 input-enable; 614 bias-pull-up; 615 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 616 }; 617}; 618 619&pm8350c_pwm { 620 pinctrl-0 = <&pmic_lcd_bl_pwm>; 621 pinctrl-names = "default"; 622 status = "okay"; 623 624 multi-led { 625 color = <LED_COLOR_ID_RGB>; 626 function = LED_FUNCTION_STATUS; 627 628 #address-cells = <1>; 629 #size-cells = <0>; 630 631 led@1 { 632 reg = <1>; 633 color = <LED_COLOR_ID_RED>; 634 }; 635 636 led@2 { 637 reg = <2>; 638 color = <LED_COLOR_ID_GREEN>; 639 }; 640 641 led@3 { 642 reg = <3>; 643 color = <LED_COLOR_ID_BLUE>; 644 }; 645 }; 646}; 647 648&pon_pwrkey { 649 status = "okay"; 650}; 651 652&pon_resin { 653 linux,code = <KEY_VOLUMEDOWN>; 654 status = "okay"; 655}; 656 657&qupv3_id_0 { 658 status = "okay"; 659}; 660 661&remoteproc_adsp { 662 firmware-name = "qcom/qcm6490/adsp.mbn"; 663 status = "okay"; 664}; 665 666&remoteproc_cdsp { 667 firmware-name = "qcom/qcm6490/cdsp.mbn"; 668 status = "okay"; 669}; 670 671&remoteproc_mpss { 672 firmware-name = "qcom/qcm6490/modem.mbn"; 673 status = "okay"; 674}; 675 676&remoteproc_wpss { 677 firmware-name = "qcom/qcm6490/wpss.mbn"; 678 status = "okay"; 679}; 680 681&sdc2_clk { 682 bias-disable; 683 drive-strength = <16>; 684}; 685 686&sdc2_cmd { 687 bias-pull-up; 688 drive-strength = <10>; 689}; 690 691&sdc2_data { 692 bias-pull-up; 693 drive-strength = <10>; 694}; 695 696&sdhc_1 { 697 non-removable; 698 no-sd; 699 no-sdio; 700 701 vmmc-supply = <&vreg_l7b_2p952>; 702 vqmmc-supply = <&vreg_l19b_1p8>; 703 704 status = "okay"; 705}; 706 707&sdhc_2 { 708 status = "okay"; 709 710 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>; 711 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>; 712 713 vmmc-supply = <&vreg_l9c_2p96>; 714 vqmmc-supply = <&vreg_l6c_2p96>; 715 716 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 717}; 718 719&tlmm { 720 gpio-reserved-ranges = <32 2>, /* ADSP */ 721 <48 4>; /* NFC */ 722 723 sd_cd: sd-cd-state { 724 pins = "gpio91"; 725 function = "gpio"; 726 bias-pull-up; 727 }; 728}; 729 730&uart5 { 731 status = "okay"; 732}; 733 734&ufs_mem_hc { 735 reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; 736 vcc-supply = <&vreg_l7b_2p952>; 737 vcc-max-microamp = <800000>; 738 vccq-supply = <&vreg_l9b_1p2>; 739 vccq-max-microamp = <900000>; 740 vccq2-supply = <&vreg_l9b_1p2>; 741 vccq2-max-microamp = <900000>; 742 743 status = "okay"; 744}; 745 746&ufs_mem_phy { 747 vdda-phy-supply = <&vreg_l10c_0p88>; 748 vdda-pll-supply = <&vreg_l6b_1p2>; 749 750 status = "okay"; 751}; 752 753&usb_1 { 754 status = "okay"; 755}; 756 757&usb_1_dwc3 { 758 /delete-property/ usb-role-switch; 759 dr_mode = "peripheral"; 760}; 761 762&usb_1_hsphy { 763 vdda-pll-supply = <&vreg_l10c_0p88>; 764 vdda33-supply = <&vreg_l2b_3p072>; 765 vdda18-supply = <&vreg_l1c_1p8>; 766 767 status = "okay"; 768}; 769 770&usb_1_qmpphy { 771 vdda-phy-supply = <&vreg_l6b_1p2>; 772 vdda-pll-supply = <&vreg_l1b_0p912>; 773 774 status = "okay"; 775}; 776 777&wifi { 778 memory-region = <&wlan_fw_mem>; 779 qcom,calibration-variant = "Qualcomm_qcm6490idp"; 780 781 status = "okay"; 782}; 783 784&lpass_audiocc { 785 compatible = "qcom,qcm6490-lpassaudiocc"; 786 /delete-property/ power-domains; 787}; 788