xref: /linux/scripts/dtc/include-prefixes/arm64/qcom/pmh0110-glymur.dtsi (revision 0fc8f6200d2313278fbf4539bbab74677c685531)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4 */
5
6#include <dt-bindings/interrupt-controller/irq.h>
7#include <dt-bindings/spmi/spmi.h>
8
9/ {
10	thermal-zones {
11		pmh0110-f0-thermal {
12			polling-delay-passive = <100>;
13			thermal-sensors = <&pmh0110_f_e0_temp_alarm>;
14
15			trips {
16				trip0 {
17					temperature = <95000>;
18					hysteresis = <0>;
19					type = "passive";
20				};
21
22				trip1 {
23					temperature = <115000>;
24					hysteresis = <0>;
25					type = "critical";
26				};
27			};
28		};
29
30		pmh0110-f1-thermal {
31			polling-delay-passive = <100>;
32			thermal-sensors = <&pmh0110_f_e1_temp_alarm>;
33
34			trips {
35				trip0 {
36					temperature = <95000>;
37					hysteresis = <0>;
38					type = "passive";
39				};
40
41				trip1 {
42					temperature = <115000>;
43					hysteresis = <0>;
44					type = "critical";
45				};
46			};
47		};
48
49		pmh0110-h0-thermal {
50			polling-delay-passive = <100>;
51			thermal-sensors = <&pmh0110_h_e0_temp_alarm>;
52
53			trips {
54				trip0 {
55					temperature = <95000>;
56					hysteresis = <0>;
57					type = "passive";
58				};
59
60				trip1 {
61					temperature = <115000>;
62					hysteresis = <0>;
63					type = "critical";
64				};
65			};
66		};
67	};
68};
69
70&spmi_bus0 {
71	pmh0110_f_e0: pmic@5 {
72		compatible = "qcom,pmh0110", "qcom,spmi-pmic";
73		reg = <0x5 SPMI_USID>;
74		#address-cells = <1>;
75		#size-cells = <0>;
76
77		pmh0110_f_e0_temp_alarm: temp-alarm@a00 {
78			compatible = "qcom,spmi-temp-alarm";
79			reg = <0xa00>;
80			interrupts = <0x5 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
81			#thermal-sensor-cells = <0>;
82		};
83
84		pmh0110_f_e0_gpios: gpio@8800 {
85			compatible = "qcom,pmh0110-gpio", "qcom,spmi-gpio";
86			reg = <0x8800>;
87			gpio-controller;
88			gpio-ranges = <&pmh0110_f_e0_gpios 0 0 14>;
89			#gpio-cells = <2>;
90			interrupt-controller;
91			#interrupt-cells = <2>;
92		};
93	};
94
95	pmh0110_h_e0: pmic@7 {
96		compatible = "qcom,pmh0110", "qcom,spmi-pmic";
97		reg = <0x7 SPMI_USID>;
98		#address-cells = <1>;
99		#size-cells = <0>;
100
101		pmh0110_h_e0_temp_alarm: temp-alarm@a00 {
102			compatible = "qcom,spmi-temp-alarm";
103			reg = <0xa00>;
104			interrupts = <0x7 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
105			#thermal-sensor-cells = <0>;
106		};
107
108		pmh0110_h_e0_gpios: gpio@8800 {
109			compatible = "qcom,pmh0110-gpio", "qcom,spmi-gpio";
110			reg = <0x8800>;
111			gpio-controller;
112			gpio-ranges = <&pmh0110_h_e0_gpios 0 0 14>;
113			#gpio-cells = <2>;
114			interrupt-controller;
115			#interrupt-cells = <2>;
116		};
117	};
118};
119
120&spmi_bus1 {
121	pmh0110_f_e1: pmic@5 {
122		compatible = "qcom,pmh0110", "qcom,spmi-pmic";
123		reg = <0x5 SPMI_USID>;
124		#address-cells = <1>;
125		#size-cells = <0>;
126
127		pmh0110_f_e1_temp_alarm: temp-alarm@a00 {
128			compatible = "qcom,spmi-temp-alarm";
129			reg = <0xa00>;
130			interrupts = <0x5 0xa 0x0 IRQ_TYPE_EDGE_BOTH>;
131			#thermal-sensor-cells = <0>;
132		};
133
134		pmh0110_f_e1_gpios: gpio@8800 {
135			compatible = "qcom,pmh0110-gpio", "qcom,spmi-gpio";
136			reg = <0x8800>;
137			gpio-controller;
138			gpio-ranges = <&pmh0110_f_e1_gpios 0 0 14>;
139			#gpio-cells = <2>;
140			interrupt-controller;
141			#interrupt-cells = <2>;
142		};
143	};
144};
145