xref: /linux/scripts/dtc/include-prefixes/arm64/qcom/monaco-evk.dts (revision 4f38da1f027ea2c9f01bb71daa7a299c191b6940)
1117d6bc9SUmang Chheda// SPDX-License-Identifier: BSD-3-Clause
2117d6bc9SUmang Chheda/*
3117d6bc9SUmang Chheda * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4117d6bc9SUmang Chheda */
5117d6bc9SUmang Chheda
6117d6bc9SUmang Chheda/dts-v1/;
7117d6bc9SUmang Chheda
8117d6bc9SUmang Chheda#include <dt-bindings/gpio/gpio.h>
9bb12da95SMohammad Rafi Shaik#include <dt-bindings/sound/qcom,q6afe.h>
10117d6bc9SUmang Chheda#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11117d6bc9SUmang Chheda
12117d6bc9SUmang Chheda#include "qcs8300.dtsi"
13117d6bc9SUmang Chheda#include "qcs8300-pmics.dtsi"
14117d6bc9SUmang Chheda
15117d6bc9SUmang Chheda/ {
16117d6bc9SUmang Chheda	model = "Qualcomm Technologies, Inc. Monaco EVK";
17117d6bc9SUmang Chheda	compatible = "qcom,monaco-evk", "qcom,qcs8300";
18117d6bc9SUmang Chheda
19117d6bc9SUmang Chheda	aliases {
20117d6bc9SUmang Chheda		ethernet0 = &ethernet0;
21117d6bc9SUmang Chheda		i2c1 = &i2c1;
22117d6bc9SUmang Chheda		serial0 = &uart7;
23117d6bc9SUmang Chheda	};
24117d6bc9SUmang Chheda
25117d6bc9SUmang Chheda	chosen {
26117d6bc9SUmang Chheda		stdout-path = "serial0:115200n8";
27117d6bc9SUmang Chheda	};
28bb12da95SMohammad Rafi Shaik
29bb12da95SMohammad Rafi Shaik	dmic: audio-codec-0 {
30bb12da95SMohammad Rafi Shaik		compatible = "dmic-codec";
31bb12da95SMohammad Rafi Shaik		#sound-dai-cells = <0>;
32bb12da95SMohammad Rafi Shaik		num-channels = <1>;
33bb12da95SMohammad Rafi Shaik	};
34bb12da95SMohammad Rafi Shaik
35bb12da95SMohammad Rafi Shaik	max98357a: audio-codec-1 {
36bb12da95SMohammad Rafi Shaik		compatible = "maxim,max98357a";
37bb12da95SMohammad Rafi Shaik		#sound-dai-cells = <0>;
38bb12da95SMohammad Rafi Shaik	};
39bb12da95SMohammad Rafi Shaik
40bb12da95SMohammad Rafi Shaik	sound {
41bb12da95SMohammad Rafi Shaik		compatible = "qcom,qcs8275-sndcard";
42bb12da95SMohammad Rafi Shaik		model = "MONACO-EVK";
43bb12da95SMohammad Rafi Shaik
44bb12da95SMohammad Rafi Shaik		pinctrl-0 = <&hs0_mi2s_active>, <&mi2s1_active>;
45bb12da95SMohammad Rafi Shaik		pinctrl-names = "default";
46bb12da95SMohammad Rafi Shaik
47bb12da95SMohammad Rafi Shaik		hs0-mi2s-playback-dai-link {
48bb12da95SMohammad Rafi Shaik			link-name = "HS0 MI2S Playback";
49bb12da95SMohammad Rafi Shaik
50bb12da95SMohammad Rafi Shaik			codec {
51bb12da95SMohammad Rafi Shaik				sound-dai = <&max98357a>;
52bb12da95SMohammad Rafi Shaik			};
53bb12da95SMohammad Rafi Shaik
54bb12da95SMohammad Rafi Shaik			cpu {
55bb12da95SMohammad Rafi Shaik				sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>;
56bb12da95SMohammad Rafi Shaik			};
57bb12da95SMohammad Rafi Shaik
58bb12da95SMohammad Rafi Shaik			platform {
59bb12da95SMohammad Rafi Shaik				sound-dai = <&q6apm>;
60bb12da95SMohammad Rafi Shaik			};
61bb12da95SMohammad Rafi Shaik		};
62bb12da95SMohammad Rafi Shaik
63bb12da95SMohammad Rafi Shaik		sec-mi2s-capture-dai-link {
64bb12da95SMohammad Rafi Shaik			link-name = "Secondary MI2S Capture";
65bb12da95SMohammad Rafi Shaik
66bb12da95SMohammad Rafi Shaik			codec {
67bb12da95SMohammad Rafi Shaik				sound-dai = <&dmic>;
68bb12da95SMohammad Rafi Shaik			};
69bb12da95SMohammad Rafi Shaik
70bb12da95SMohammad Rafi Shaik			cpu {
71bb12da95SMohammad Rafi Shaik				sound-dai = <&q6apmbedai SECONDARY_MI2S_TX>;
72bb12da95SMohammad Rafi Shaik			};
73bb12da95SMohammad Rafi Shaik
74bb12da95SMohammad Rafi Shaik			platform {
75bb12da95SMohammad Rafi Shaik				sound-dai = <&q6apm>;
76bb12da95SMohammad Rafi Shaik			};
77bb12da95SMohammad Rafi Shaik		};
78bb12da95SMohammad Rafi Shaik	};
79117d6bc9SUmang Chheda};
80117d6bc9SUmang Chheda
81117d6bc9SUmang Chheda&apps_rsc {
82117d6bc9SUmang Chheda	regulators-0 {
83117d6bc9SUmang Chheda		compatible = "qcom,pmm8654au-rpmh-regulators";
84117d6bc9SUmang Chheda		qcom,pmic-id = "a";
85117d6bc9SUmang Chheda
86117d6bc9SUmang Chheda		vreg_l3a: ldo3 {
87117d6bc9SUmang Chheda			regulator-name = "vreg_l3a";
88117d6bc9SUmang Chheda			regulator-min-microvolt = <1200000>;
89117d6bc9SUmang Chheda			regulator-max-microvolt = <1200000>;
90117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
91117d6bc9SUmang Chheda			regulator-allow-set-load;
92117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
93117d6bc9SUmang Chheda		};
94117d6bc9SUmang Chheda
95117d6bc9SUmang Chheda		vreg_l4a: ldo4 {
96117d6bc9SUmang Chheda			regulator-name = "vreg_l4a";
97117d6bc9SUmang Chheda			regulator-min-microvolt = <880000>;
98117d6bc9SUmang Chheda			regulator-max-microvolt = <912000>;
99117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
100117d6bc9SUmang Chheda			regulator-allow-set-load;
101117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
102117d6bc9SUmang Chheda		};
103117d6bc9SUmang Chheda
104117d6bc9SUmang Chheda		vreg_l5a: ldo5 {
105117d6bc9SUmang Chheda			regulator-name = "vreg_l5a";
106117d6bc9SUmang Chheda			regulator-min-microvolt = <1200000>;
107117d6bc9SUmang Chheda			regulator-max-microvolt = <1200000>;
108117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
109117d6bc9SUmang Chheda			regulator-allow-set-load;
110117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
111117d6bc9SUmang Chheda		};
112117d6bc9SUmang Chheda
113117d6bc9SUmang Chheda		vreg_l6a: ldo6 {
114117d6bc9SUmang Chheda			regulator-name = "vreg_l6a";
115117d6bc9SUmang Chheda			regulator-min-microvolt = <880000>;
116117d6bc9SUmang Chheda			regulator-max-microvolt = <912000>;
117117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
118117d6bc9SUmang Chheda			regulator-allow-set-load;
119117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
120117d6bc9SUmang Chheda		};
121117d6bc9SUmang Chheda
122117d6bc9SUmang Chheda		vreg_l7a: ldo7 {
123117d6bc9SUmang Chheda			regulator-name = "vreg_l7a";
124117d6bc9SUmang Chheda			regulator-min-microvolt = <880000>;
125117d6bc9SUmang Chheda			regulator-max-microvolt = <912000>;
126117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
127117d6bc9SUmang Chheda			regulator-allow-set-load;
128117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
129117d6bc9SUmang Chheda		};
130117d6bc9SUmang Chheda
131117d6bc9SUmang Chheda		vreg_l8a: ldo8 {
132117d6bc9SUmang Chheda			regulator-name = "vreg_l8a";
133117d6bc9SUmang Chheda			regulator-min-microvolt = <2504000>;
134117d6bc9SUmang Chheda			regulator-max-microvolt = <2960000>;
135117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
136117d6bc9SUmang Chheda			regulator-allow-set-load;
137117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
138117d6bc9SUmang Chheda		};
139117d6bc9SUmang Chheda
140117d6bc9SUmang Chheda		vreg_l9a: ldo9 {
141117d6bc9SUmang Chheda			regulator-name = "vreg_l9a";
142117d6bc9SUmang Chheda			regulator-min-microvolt = <2970000>;
143117d6bc9SUmang Chheda			regulator-max-microvolt = <3072000>;
144117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
145117d6bc9SUmang Chheda			regulator-allow-set-load;
146117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
147117d6bc9SUmang Chheda		};
148117d6bc9SUmang Chheda	};
149117d6bc9SUmang Chheda
150117d6bc9SUmang Chheda	regulators-1 {
151117d6bc9SUmang Chheda		compatible = "qcom,pmm8654au-rpmh-regulators";
152117d6bc9SUmang Chheda		qcom,pmic-id = "c";
153117d6bc9SUmang Chheda
154117d6bc9SUmang Chheda		vreg_s5c: smps5 {
155117d6bc9SUmang Chheda			regulator-name = "vreg_s5c";
156117d6bc9SUmang Chheda			regulator-min-microvolt = <1104000>;
157117d6bc9SUmang Chheda			regulator-max-microvolt = <1104000>;
158117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
159117d6bc9SUmang Chheda		};
160117d6bc9SUmang Chheda
161117d6bc9SUmang Chheda		vreg_l1c: ldo1 {
162117d6bc9SUmang Chheda			regulator-name = "vreg_l1c";
163117d6bc9SUmang Chheda			regulator-min-microvolt = <300000>;
164117d6bc9SUmang Chheda			regulator-max-microvolt = <512000>;
165117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
166117d6bc9SUmang Chheda			regulator-allow-set-load;
167117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
168117d6bc9SUmang Chheda		};
169117d6bc9SUmang Chheda
170117d6bc9SUmang Chheda		vreg_l2c: ldo2 {
171117d6bc9SUmang Chheda			regulator-name = "vreg_l2c";
172117d6bc9SUmang Chheda			regulator-min-microvolt = <900000>;
173117d6bc9SUmang Chheda			regulator-max-microvolt = <904000>;
174117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
175117d6bc9SUmang Chheda			regulator-allow-set-load;
176117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
177117d6bc9SUmang Chheda		};
178117d6bc9SUmang Chheda
179117d6bc9SUmang Chheda		vreg_l4c: ldo4 {
180117d6bc9SUmang Chheda			regulator-name = "vreg_l4c";
181117d6bc9SUmang Chheda			regulator-min-microvolt = <1200000>;
182117d6bc9SUmang Chheda			regulator-max-microvolt = <1200000>;
183117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
184117d6bc9SUmang Chheda			regulator-allow-set-load;
185117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
186117d6bc9SUmang Chheda		};
187117d6bc9SUmang Chheda
188117d6bc9SUmang Chheda		vreg_l7c: ldo7 {
189117d6bc9SUmang Chheda			regulator-name = "vreg_l7c";
190117d6bc9SUmang Chheda			regulator-min-microvolt = <1800000>;
191117d6bc9SUmang Chheda			regulator-max-microvolt = <1800000>;
192117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
193117d6bc9SUmang Chheda			regulator-allow-set-load;
194117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
195117d6bc9SUmang Chheda		};
196117d6bc9SUmang Chheda
197117d6bc9SUmang Chheda		vreg_l8c: ldo8 {
198117d6bc9SUmang Chheda			regulator-name = "vreg_l8c";
199117d6bc9SUmang Chheda			regulator-min-microvolt = <1800000>;
200117d6bc9SUmang Chheda			regulator-max-microvolt = <1800000>;
201117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
202117d6bc9SUmang Chheda			regulator-allow-set-load;
203117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
204117d6bc9SUmang Chheda		};
205117d6bc9SUmang Chheda
206117d6bc9SUmang Chheda		vreg_l9c: ldo9 {
207117d6bc9SUmang Chheda			regulator-name = "vreg_l9c";
208117d6bc9SUmang Chheda			regulator-min-microvolt = <1800000>;
209117d6bc9SUmang Chheda			regulator-max-microvolt = <1800000>;
210117d6bc9SUmang Chheda			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
211117d6bc9SUmang Chheda			regulator-allow-set-load;
212117d6bc9SUmang Chheda			regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>;
213117d6bc9SUmang Chheda		};
214117d6bc9SUmang Chheda	};
215117d6bc9SUmang Chheda};
216117d6bc9SUmang Chheda
217117d6bc9SUmang Chheda&ethernet0 {
218117d6bc9SUmang Chheda	phy-mode = "2500base-x";
219117d6bc9SUmang Chheda	phy-handle = <&hsgmii_phy0>;
220117d6bc9SUmang Chheda
221117d6bc9SUmang Chheda	pinctrl-0 = <&ethernet0_default>;
222117d6bc9SUmang Chheda	pinctrl-names = "default";
223117d6bc9SUmang Chheda
224117d6bc9SUmang Chheda	snps,mtl-rx-config = <&mtl_rx_setup>;
225117d6bc9SUmang Chheda	snps,mtl-tx-config = <&mtl_tx_setup>;
226117d6bc9SUmang Chheda	nvmem-cells = <&mac_addr0>;
227117d6bc9SUmang Chheda	nvmem-cell-names = "mac-address";
228117d6bc9SUmang Chheda
229117d6bc9SUmang Chheda	status = "okay";
230117d6bc9SUmang Chheda
231117d6bc9SUmang Chheda	mdio {
232117d6bc9SUmang Chheda		compatible = "snps,dwmac-mdio";
233117d6bc9SUmang Chheda		#address-cells = <1>;
234117d6bc9SUmang Chheda		#size-cells = <0>;
235117d6bc9SUmang Chheda
236117d6bc9SUmang Chheda		hsgmii_phy0: ethernet-phy@1c {
237117d6bc9SUmang Chheda			compatible = "ethernet-phy-id004d.d101";
238117d6bc9SUmang Chheda			reg = <0x1c>;
239117d6bc9SUmang Chheda			reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
240117d6bc9SUmang Chheda			reset-assert-us = <11000>;
241117d6bc9SUmang Chheda			reset-deassert-us = <70000>;
242117d6bc9SUmang Chheda		};
243117d6bc9SUmang Chheda	};
244117d6bc9SUmang Chheda
245117d6bc9SUmang Chheda	mtl_rx_setup: rx-queues-config {
246117d6bc9SUmang Chheda		snps,rx-queues-to-use = <4>;
247117d6bc9SUmang Chheda		snps,rx-sched-sp;
248117d6bc9SUmang Chheda
249117d6bc9SUmang Chheda		queue0 {
250117d6bc9SUmang Chheda			snps,dcb-algorithm;
251117d6bc9SUmang Chheda			snps,map-to-dma-channel = <0x0>;
252117d6bc9SUmang Chheda			snps,route-up;
253117d6bc9SUmang Chheda			snps,priority = <0x1>;
254117d6bc9SUmang Chheda		};
255117d6bc9SUmang Chheda
256117d6bc9SUmang Chheda		queue1 {
257117d6bc9SUmang Chheda			snps,dcb-algorithm;
258117d6bc9SUmang Chheda			snps,map-to-dma-channel = <0x1>;
259117d6bc9SUmang Chheda			snps,route-ptp;
260117d6bc9SUmang Chheda		};
261117d6bc9SUmang Chheda
262117d6bc9SUmang Chheda		queue2 {
263117d6bc9SUmang Chheda			snps,avb-algorithm;
264117d6bc9SUmang Chheda			snps,map-to-dma-channel = <0x2>;
265117d6bc9SUmang Chheda			snps,route-avcp;
266117d6bc9SUmang Chheda		};
267117d6bc9SUmang Chheda
268117d6bc9SUmang Chheda		queue3 {
269117d6bc9SUmang Chheda			snps,avb-algorithm;
270117d6bc9SUmang Chheda			snps,map-to-dma-channel = <0x3>;
271117d6bc9SUmang Chheda			snps,priority = <0xc>;
272117d6bc9SUmang Chheda		};
273117d6bc9SUmang Chheda	};
274117d6bc9SUmang Chheda
275117d6bc9SUmang Chheda	mtl_tx_setup: tx-queues-config {
276117d6bc9SUmang Chheda		snps,tx-queues-to-use = <4>;
277117d6bc9SUmang Chheda
278117d6bc9SUmang Chheda		queue0 {
279117d6bc9SUmang Chheda			snps,dcb-algorithm;
280117d6bc9SUmang Chheda		};
281117d6bc9SUmang Chheda
282117d6bc9SUmang Chheda		queue1 {
283117d6bc9SUmang Chheda			snps,dcb-algorithm;
284117d6bc9SUmang Chheda		};
285117d6bc9SUmang Chheda
286117d6bc9SUmang Chheda		queue2 {
287117d6bc9SUmang Chheda			snps,avb-algorithm;
288117d6bc9SUmang Chheda			snps,send_slope = <0x1000>;
289117d6bc9SUmang Chheda			snps,idle_slope = <0x1000>;
290117d6bc9SUmang Chheda			snps,high_credit = <0x3e800>;
291117d6bc9SUmang Chheda			snps,low_credit = <0xffc18000>;
292117d6bc9SUmang Chheda		};
293117d6bc9SUmang Chheda
294117d6bc9SUmang Chheda		queue3 {
295117d6bc9SUmang Chheda			snps,avb-algorithm;
296117d6bc9SUmang Chheda			snps,send_slope = <0x1000>;
297117d6bc9SUmang Chheda			snps,idle_slope = <0x1000>;
298117d6bc9SUmang Chheda			snps,high_credit = <0x3e800>;
299117d6bc9SUmang Chheda			snps,low_credit = <0xffc18000>;
300117d6bc9SUmang Chheda		};
301117d6bc9SUmang Chheda	};
302117d6bc9SUmang Chheda};
303117d6bc9SUmang Chheda
304117d6bc9SUmang Chheda&gpi_dma0 {
305117d6bc9SUmang Chheda	status = "okay";
306117d6bc9SUmang Chheda};
307117d6bc9SUmang Chheda
308117d6bc9SUmang Chheda&gpi_dma1 {
309117d6bc9SUmang Chheda	status = "okay";
310117d6bc9SUmang Chheda};
311117d6bc9SUmang Chheda
312*ed7e4405SAkhil P Oommen&gpu {
313*ed7e4405SAkhil P Oommen	status = "okay";
314*ed7e4405SAkhil P Oommen};
315*ed7e4405SAkhil P Oommen
316*ed7e4405SAkhil P Oommen&gpu_zap_shader {
317*ed7e4405SAkhil P Oommen	firmware-name = "qcom/qcs8300/a623_zap.mbn";
318*ed7e4405SAkhil P Oommen};
319*ed7e4405SAkhil P Oommen
320117d6bc9SUmang Chheda&i2c1 {
321117d6bc9SUmang Chheda	pinctrl-0 = <&qup_i2c1_default>;
322117d6bc9SUmang Chheda	pinctrl-names = "default";
323117d6bc9SUmang Chheda
324117d6bc9SUmang Chheda	status = "okay";
325117d6bc9SUmang Chheda
326117d6bc9SUmang Chheda	eeprom0: eeprom@50 {
327117d6bc9SUmang Chheda		compatible = "atmel,24c256";
328117d6bc9SUmang Chheda		reg = <0x50>;
329117d6bc9SUmang Chheda		pagesize = <64>;
330117d6bc9SUmang Chheda
331117d6bc9SUmang Chheda		nvmem-layout {
332117d6bc9SUmang Chheda			compatible = "fixed-layout";
333117d6bc9SUmang Chheda			#address-cells = <1>;
334117d6bc9SUmang Chheda			#size-cells = <1>;
335117d6bc9SUmang Chheda
336117d6bc9SUmang Chheda			mac_addr0: mac-addr@0 {
337117d6bc9SUmang Chheda				reg = <0x0 0x6>;
338117d6bc9SUmang Chheda			};
339117d6bc9SUmang Chheda		};
340117d6bc9SUmang Chheda	};
341117d6bc9SUmang Chheda};
342117d6bc9SUmang Chheda
343117d6bc9SUmang Chheda&i2c15 {
344117d6bc9SUmang Chheda	pinctrl-0 = <&qup_i2c15_default>;
345117d6bc9SUmang Chheda	pinctrl-names = "default";
346117d6bc9SUmang Chheda
347117d6bc9SUmang Chheda	status = "okay";
348117d6bc9SUmang Chheda
349117d6bc9SUmang Chheda	expander0: gpio@38 {
350117d6bc9SUmang Chheda		compatible = "ti,tca9538";
351117d6bc9SUmang Chheda		reg = <0x38>;
352117d6bc9SUmang Chheda		#gpio-cells = <2>;
353117d6bc9SUmang Chheda		gpio-controller;
354117d6bc9SUmang Chheda	};
355117d6bc9SUmang Chheda
356117d6bc9SUmang Chheda	expander1: gpio@39 {
357117d6bc9SUmang Chheda		compatible = "ti,tca9538";
358117d6bc9SUmang Chheda		reg = <0x39>;
359117d6bc9SUmang Chheda		#gpio-cells = <2>;
360117d6bc9SUmang Chheda		gpio-controller;
361117d6bc9SUmang Chheda	};
362117d6bc9SUmang Chheda
363117d6bc9SUmang Chheda	expander2: gpio@3a {
364117d6bc9SUmang Chheda		compatible = "ti,tca9538";
365117d6bc9SUmang Chheda		reg = <0x3a>;
366117d6bc9SUmang Chheda		#gpio-cells = <2>;
367117d6bc9SUmang Chheda		gpio-controller;
368117d6bc9SUmang Chheda	};
369117d6bc9SUmang Chheda
370117d6bc9SUmang Chheda	expander3: gpio@3b {
371117d6bc9SUmang Chheda		compatible = "ti,tca9538";
372117d6bc9SUmang Chheda		reg = <0x3b>;
373117d6bc9SUmang Chheda		#gpio-cells = <2>;
374117d6bc9SUmang Chheda		gpio-controller;
375117d6bc9SUmang Chheda	};
376117d6bc9SUmang Chheda
377117d6bc9SUmang Chheda	expander4: gpio@3c {
378117d6bc9SUmang Chheda		compatible = "ti,tca9538";
379117d6bc9SUmang Chheda		reg = <0x3c>;
380117d6bc9SUmang Chheda		#gpio-cells = <2>;
381117d6bc9SUmang Chheda		gpio-controller;
382117d6bc9SUmang Chheda	};
383117d6bc9SUmang Chheda
384117d6bc9SUmang Chheda	expander5: gpio@3d {
385117d6bc9SUmang Chheda		compatible = "ti,tca9538";
386117d6bc9SUmang Chheda		reg = <0x3d>;
387117d6bc9SUmang Chheda		#gpio-cells = <2>;
388117d6bc9SUmang Chheda		gpio-controller;
389117d6bc9SUmang Chheda	};
390117d6bc9SUmang Chheda
391117d6bc9SUmang Chheda	expander6: gpio@3e {
392117d6bc9SUmang Chheda		compatible = "ti,tca9538";
393117d6bc9SUmang Chheda		reg = <0x3e>;
394117d6bc9SUmang Chheda		#gpio-cells = <2>;
395117d6bc9SUmang Chheda		gpio-controller;
396117d6bc9SUmang Chheda	};
397117d6bc9SUmang Chheda};
398117d6bc9SUmang Chheda
399117d6bc9SUmang Chheda&iris {
400117d6bc9SUmang Chheda	status = "okay";
401117d6bc9SUmang Chheda};
402117d6bc9SUmang Chheda
403117d6bc9SUmang Chheda&qupv3_id_0 {
404117d6bc9SUmang Chheda	status = "okay";
405117d6bc9SUmang Chheda};
406117d6bc9SUmang Chheda
407117d6bc9SUmang Chheda&qupv3_id_1 {
408117d6bc9SUmang Chheda	status = "okay";
409117d6bc9SUmang Chheda};
410117d6bc9SUmang Chheda
411117d6bc9SUmang Chheda&remoteproc_adsp {
412117d6bc9SUmang Chheda	firmware-name = "qcom/qcs8300/adsp.mbn";
413117d6bc9SUmang Chheda
414117d6bc9SUmang Chheda	status = "okay";
415117d6bc9SUmang Chheda};
416117d6bc9SUmang Chheda
417117d6bc9SUmang Chheda&remoteproc_cdsp {
418117d6bc9SUmang Chheda	firmware-name = "qcom/qcs8300/cdsp0.mbn";
419117d6bc9SUmang Chheda
420117d6bc9SUmang Chheda	status = "okay";
421117d6bc9SUmang Chheda};
422117d6bc9SUmang Chheda
423117d6bc9SUmang Chheda&remoteproc_gpdsp {
424117d6bc9SUmang Chheda	firmware-name = "qcom/qcs8300/gpdsp0.mbn";
425117d6bc9SUmang Chheda
426117d6bc9SUmang Chheda	status = "okay";
427117d6bc9SUmang Chheda};
428117d6bc9SUmang Chheda
429117d6bc9SUmang Chheda&serdes0 {
430117d6bc9SUmang Chheda	phy-supply = <&vreg_l4a>;
431117d6bc9SUmang Chheda
432117d6bc9SUmang Chheda	status = "okay";
433117d6bc9SUmang Chheda};
434117d6bc9SUmang Chheda
435117d6bc9SUmang Chheda&tlmm {
436117d6bc9SUmang Chheda	ethernet0_default: ethernet0-default-state {
437117d6bc9SUmang Chheda		ethernet0_mdc: ethernet0-mdc-pins {
438117d6bc9SUmang Chheda			pins = "gpio5";
439117d6bc9SUmang Chheda			function = "emac0_mdc";
440117d6bc9SUmang Chheda			drive-strength = <16>;
441117d6bc9SUmang Chheda			bias-pull-up;
442117d6bc9SUmang Chheda		};
443117d6bc9SUmang Chheda
444117d6bc9SUmang Chheda		ethernet0_mdio: ethernet0-mdio-pins {
445117d6bc9SUmang Chheda			pins = "gpio6";
446117d6bc9SUmang Chheda			function = "emac0_mdio";
447117d6bc9SUmang Chheda			drive-strength = <16>;
448117d6bc9SUmang Chheda			bias-pull-up;
449117d6bc9SUmang Chheda		};
450117d6bc9SUmang Chheda	};
451117d6bc9SUmang Chheda
452117d6bc9SUmang Chheda	qup_i2c1_default: qup-i2c1-state {
453117d6bc9SUmang Chheda		pins = "gpio19", "gpio20";
454117d6bc9SUmang Chheda		function = "qup0_se1";
455117d6bc9SUmang Chheda		drive-strength = <2>;
456117d6bc9SUmang Chheda		bias-pull-up;
457117d6bc9SUmang Chheda	};
458117d6bc9SUmang Chheda
459117d6bc9SUmang Chheda	qup_i2c15_default: qup-i2c15-state {
460117d6bc9SUmang Chheda		pins = "gpio91", "gpio92";
461117d6bc9SUmang Chheda		function = "qup1_se7";
462117d6bc9SUmang Chheda		drive-strength = <2>;
463117d6bc9SUmang Chheda		bias-pull-up;
464117d6bc9SUmang Chheda	};
465117d6bc9SUmang Chheda};
466117d6bc9SUmang Chheda
467117d6bc9SUmang Chheda&uart7 {
468117d6bc9SUmang Chheda	status = "okay";
469117d6bc9SUmang Chheda};
470117d6bc9SUmang Chheda
471117d6bc9SUmang Chheda&ufs_mem_hc {
472117d6bc9SUmang Chheda	reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>;
473117d6bc9SUmang Chheda	vcc-supply = <&vreg_l8a>;
474117d6bc9SUmang Chheda	vcc-max-microamp = <1100000>;
475117d6bc9SUmang Chheda	vccq-supply = <&vreg_l4c>;
476117d6bc9SUmang Chheda	vccq-max-microamp = <1200000>;
477117d6bc9SUmang Chheda
478117d6bc9SUmang Chheda	status = "okay";
479117d6bc9SUmang Chheda};
480117d6bc9SUmang Chheda
481117d6bc9SUmang Chheda&ufs_mem_phy {
482117d6bc9SUmang Chheda	vdda-phy-supply = <&vreg_l4a>;
483117d6bc9SUmang Chheda	vdda-pll-supply = <&vreg_l5a>;
484117d6bc9SUmang Chheda
485117d6bc9SUmang Chheda	status = "okay";
486117d6bc9SUmang Chheda};
487117d6bc9SUmang Chheda
488117d6bc9SUmang Chheda&usb_1 {
489117d6bc9SUmang Chheda	dr_mode = "peripheral";
490ed32443eSKrishna Kurapati
491ed32443eSKrishna Kurapati	status = "okay";
492117d6bc9SUmang Chheda};
493117d6bc9SUmang Chheda
494117d6bc9SUmang Chheda&usb_1_hsphy {
495117d6bc9SUmang Chheda	vdda-pll-supply = <&vreg_l7a>;
496117d6bc9SUmang Chheda	vdda18-supply = <&vreg_l7c>;
497117d6bc9SUmang Chheda	vdda33-supply = <&vreg_l9a>;
498117d6bc9SUmang Chheda
499117d6bc9SUmang Chheda	status = "okay";
500117d6bc9SUmang Chheda};
501117d6bc9SUmang Chheda
502117d6bc9SUmang Chheda&usb_qmpphy {
503117d6bc9SUmang Chheda	vdda-phy-supply = <&vreg_l7a>;
504117d6bc9SUmang Chheda	vdda-pll-supply = <&vreg_l5a>;
505117d6bc9SUmang Chheda
506117d6bc9SUmang Chheda	status = "okay";
507117d6bc9SUmang Chheda};
508