1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/sound/qcom,q6afe.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11 12#include "qcs8300.dtsi" 13#include "qcs8300-pmics.dtsi" 14 15/ { 16 model = "Qualcomm Technologies, Inc. Monaco EVK"; 17 compatible = "qcom,monaco-evk", "qcom,qcs8300"; 18 19 aliases { 20 ethernet0 = ðernet0; 21 i2c1 = &i2c1; 22 serial0 = &uart7; 23 }; 24 25 chosen { 26 stdout-path = "serial0:115200n8"; 27 }; 28 29 dmic: audio-codec-0 { 30 compatible = "dmic-codec"; 31 #sound-dai-cells = <0>; 32 num-channels = <1>; 33 }; 34 35 max98357a: audio-codec-1 { 36 compatible = "maxim,max98357a"; 37 #sound-dai-cells = <0>; 38 }; 39 40 sound { 41 compatible = "qcom,qcs8275-sndcard"; 42 model = "MONACO-EVK"; 43 44 pinctrl-0 = <&hs0_mi2s_active>, <&mi2s1_active>; 45 pinctrl-names = "default"; 46 47 hs0-mi2s-playback-dai-link { 48 link-name = "HS0 MI2S Playback"; 49 50 codec { 51 sound-dai = <&max98357a>; 52 }; 53 54 cpu { 55 sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>; 56 }; 57 58 platform { 59 sound-dai = <&q6apm>; 60 }; 61 }; 62 63 sec-mi2s-capture-dai-link { 64 link-name = "Secondary MI2S Capture"; 65 66 codec { 67 sound-dai = <&dmic>; 68 }; 69 70 cpu { 71 sound-dai = <&q6apmbedai SECONDARY_MI2S_TX>; 72 }; 73 74 platform { 75 sound-dai = <&q6apm>; 76 }; 77 }; 78 }; 79}; 80 81&apps_rsc { 82 regulators-0 { 83 compatible = "qcom,pmm8654au-rpmh-regulators"; 84 qcom,pmic-id = "a"; 85 86 vreg_l3a: ldo3 { 87 regulator-name = "vreg_l3a"; 88 regulator-min-microvolt = <1200000>; 89 regulator-max-microvolt = <1200000>; 90 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 91 regulator-allow-set-load; 92 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 93 }; 94 95 vreg_l4a: ldo4 { 96 regulator-name = "vreg_l4a"; 97 regulator-min-microvolt = <880000>; 98 regulator-max-microvolt = <912000>; 99 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 100 regulator-allow-set-load; 101 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 102 }; 103 104 vreg_l5a: ldo5 { 105 regulator-name = "vreg_l5a"; 106 regulator-min-microvolt = <1200000>; 107 regulator-max-microvolt = <1200000>; 108 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 109 regulator-allow-set-load; 110 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 111 }; 112 113 vreg_l6a: ldo6 { 114 regulator-name = "vreg_l6a"; 115 regulator-min-microvolt = <880000>; 116 regulator-max-microvolt = <912000>; 117 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 118 regulator-allow-set-load; 119 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 120 }; 121 122 vreg_l7a: ldo7 { 123 regulator-name = "vreg_l7a"; 124 regulator-min-microvolt = <880000>; 125 regulator-max-microvolt = <912000>; 126 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 127 regulator-allow-set-load; 128 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 129 }; 130 131 vreg_l8a: ldo8 { 132 regulator-name = "vreg_l8a"; 133 regulator-min-microvolt = <2504000>; 134 regulator-max-microvolt = <2960000>; 135 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 136 regulator-allow-set-load; 137 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 138 }; 139 140 vreg_l9a: ldo9 { 141 regulator-name = "vreg_l9a"; 142 regulator-min-microvolt = <2970000>; 143 regulator-max-microvolt = <3072000>; 144 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 145 regulator-allow-set-load; 146 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 147 }; 148 }; 149 150 regulators-1 { 151 compatible = "qcom,pmm8654au-rpmh-regulators"; 152 qcom,pmic-id = "c"; 153 154 vreg_s5c: smps5 { 155 regulator-name = "vreg_s5c"; 156 regulator-min-microvolt = <1104000>; 157 regulator-max-microvolt = <1104000>; 158 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 159 }; 160 161 vreg_l1c: ldo1 { 162 regulator-name = "vreg_l1c"; 163 regulator-min-microvolt = <300000>; 164 regulator-max-microvolt = <512000>; 165 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 166 regulator-allow-set-load; 167 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 168 }; 169 170 vreg_l2c: ldo2 { 171 regulator-name = "vreg_l2c"; 172 regulator-min-microvolt = <900000>; 173 regulator-max-microvolt = <904000>; 174 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 175 regulator-allow-set-load; 176 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 177 }; 178 179 vreg_l4c: ldo4 { 180 regulator-name = "vreg_l4c"; 181 regulator-min-microvolt = <1200000>; 182 regulator-max-microvolt = <1200000>; 183 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 184 regulator-allow-set-load; 185 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 186 }; 187 188 vreg_l7c: ldo7 { 189 regulator-name = "vreg_l7c"; 190 regulator-min-microvolt = <1800000>; 191 regulator-max-microvolt = <1800000>; 192 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 193 regulator-allow-set-load; 194 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 195 }; 196 197 vreg_l8c: ldo8 { 198 regulator-name = "vreg_l8c"; 199 regulator-min-microvolt = <1800000>; 200 regulator-max-microvolt = <1800000>; 201 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 202 regulator-allow-set-load; 203 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 204 }; 205 206 vreg_l9c: ldo9 { 207 regulator-name = "vreg_l9c"; 208 regulator-min-microvolt = <1800000>; 209 regulator-max-microvolt = <1800000>; 210 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 211 regulator-allow-set-load; 212 regulator-allowed-modes = <RPMH_REGULATOR_MODE_HPM>; 213 }; 214 }; 215}; 216 217ðernet0 { 218 phy-mode = "2500base-x"; 219 phy-handle = <&hsgmii_phy0>; 220 221 pinctrl-0 = <ðernet0_default>; 222 pinctrl-names = "default"; 223 224 snps,mtl-rx-config = <&mtl_rx_setup>; 225 snps,mtl-tx-config = <&mtl_tx_setup>; 226 nvmem-cells = <&mac_addr0>; 227 nvmem-cell-names = "mac-address"; 228 229 status = "okay"; 230 231 mdio { 232 compatible = "snps,dwmac-mdio"; 233 #address-cells = <1>; 234 #size-cells = <0>; 235 236 hsgmii_phy0: ethernet-phy@1c { 237 compatible = "ethernet-phy-id004d.d101"; 238 reg = <0x1c>; 239 reset-gpios = <&tlmm 31 GPIO_ACTIVE_LOW>; 240 reset-assert-us = <11000>; 241 reset-deassert-us = <70000>; 242 }; 243 }; 244 245 mtl_rx_setup: rx-queues-config { 246 snps,rx-queues-to-use = <4>; 247 snps,rx-sched-sp; 248 249 queue0 { 250 snps,dcb-algorithm; 251 snps,map-to-dma-channel = <0x0>; 252 snps,route-up; 253 snps,priority = <0x1>; 254 }; 255 256 queue1 { 257 snps,dcb-algorithm; 258 snps,map-to-dma-channel = <0x1>; 259 snps,route-ptp; 260 }; 261 262 queue2 { 263 snps,avb-algorithm; 264 snps,map-to-dma-channel = <0x2>; 265 snps,route-avcp; 266 }; 267 268 queue3 { 269 snps,avb-algorithm; 270 snps,map-to-dma-channel = <0x3>; 271 snps,priority = <0xc>; 272 }; 273 }; 274 275 mtl_tx_setup: tx-queues-config { 276 snps,tx-queues-to-use = <4>; 277 278 queue0 { 279 snps,dcb-algorithm; 280 }; 281 282 queue1 { 283 snps,dcb-algorithm; 284 }; 285 286 queue2 { 287 snps,avb-algorithm; 288 snps,send_slope = <0x1000>; 289 snps,idle_slope = <0x1000>; 290 snps,high_credit = <0x3e800>; 291 snps,low_credit = <0xffc18000>; 292 }; 293 294 queue3 { 295 snps,avb-algorithm; 296 snps,send_slope = <0x1000>; 297 snps,idle_slope = <0x1000>; 298 snps,high_credit = <0x3e800>; 299 snps,low_credit = <0xffc18000>; 300 }; 301 }; 302}; 303 304&gpi_dma0 { 305 status = "okay"; 306}; 307 308&gpi_dma1 { 309 status = "okay"; 310}; 311 312&gpu { 313 status = "okay"; 314}; 315 316&gpu_zap_shader { 317 firmware-name = "qcom/qcs8300/a623_zap.mbn"; 318}; 319 320&i2c1 { 321 pinctrl-0 = <&qup_i2c1_default>; 322 pinctrl-names = "default"; 323 324 status = "okay"; 325 326 eeprom0: eeprom@50 { 327 compatible = "atmel,24c256"; 328 reg = <0x50>; 329 pagesize = <64>; 330 331 nvmem-layout { 332 compatible = "fixed-layout"; 333 #address-cells = <1>; 334 #size-cells = <1>; 335 336 mac_addr0: mac-addr@0 { 337 reg = <0x0 0x6>; 338 }; 339 }; 340 }; 341}; 342 343&i2c15 { 344 pinctrl-0 = <&qup_i2c15_default>; 345 pinctrl-names = "default"; 346 347 status = "okay"; 348 349 expander0: gpio@38 { 350 compatible = "ti,tca9538"; 351 reg = <0x38>; 352 #gpio-cells = <2>; 353 gpio-controller; 354 }; 355 356 expander1: gpio@39 { 357 compatible = "ti,tca9538"; 358 reg = <0x39>; 359 #gpio-cells = <2>; 360 gpio-controller; 361 }; 362 363 expander2: gpio@3a { 364 compatible = "ti,tca9538"; 365 reg = <0x3a>; 366 #gpio-cells = <2>; 367 gpio-controller; 368 }; 369 370 expander3: gpio@3b { 371 compatible = "ti,tca9538"; 372 reg = <0x3b>; 373 #gpio-cells = <2>; 374 gpio-controller; 375 }; 376 377 expander4: gpio@3c { 378 compatible = "ti,tca9538"; 379 reg = <0x3c>; 380 #gpio-cells = <2>; 381 gpio-controller; 382 }; 383 384 expander5: gpio@3d { 385 compatible = "ti,tca9538"; 386 reg = <0x3d>; 387 #gpio-cells = <2>; 388 gpio-controller; 389 }; 390 391 expander6: gpio@3e { 392 compatible = "ti,tca9538"; 393 reg = <0x3e>; 394 #gpio-cells = <2>; 395 gpio-controller; 396 }; 397}; 398 399&iris { 400 status = "okay"; 401}; 402 403&qupv3_id_0 { 404 status = "okay"; 405}; 406 407&qupv3_id_1 { 408 status = "okay"; 409}; 410 411&remoteproc_adsp { 412 firmware-name = "qcom/qcs8300/adsp.mbn"; 413 414 status = "okay"; 415}; 416 417&remoteproc_cdsp { 418 firmware-name = "qcom/qcs8300/cdsp0.mbn"; 419 420 status = "okay"; 421}; 422 423&remoteproc_gpdsp { 424 firmware-name = "qcom/qcs8300/gpdsp0.mbn"; 425 426 status = "okay"; 427}; 428 429&serdes0 { 430 phy-supply = <&vreg_l4a>; 431 432 status = "okay"; 433}; 434 435&tlmm { 436 ethernet0_default: ethernet0-default-state { 437 ethernet0_mdc: ethernet0-mdc-pins { 438 pins = "gpio5"; 439 function = "emac0_mdc"; 440 drive-strength = <16>; 441 bias-pull-up; 442 }; 443 444 ethernet0_mdio: ethernet0-mdio-pins { 445 pins = "gpio6"; 446 function = "emac0_mdio"; 447 drive-strength = <16>; 448 bias-pull-up; 449 }; 450 }; 451 452 qup_i2c1_default: qup-i2c1-state { 453 pins = "gpio19", "gpio20"; 454 function = "qup0_se1"; 455 drive-strength = <2>; 456 bias-pull-up; 457 }; 458 459 qup_i2c15_default: qup-i2c15-state { 460 pins = "gpio91", "gpio92"; 461 function = "qup1_se7"; 462 drive-strength = <2>; 463 bias-pull-up; 464 }; 465}; 466 467&uart7 { 468 status = "okay"; 469}; 470 471&ufs_mem_hc { 472 reset-gpios = <&tlmm 133 GPIO_ACTIVE_LOW>; 473 vcc-supply = <&vreg_l8a>; 474 vcc-max-microamp = <1100000>; 475 vccq-supply = <&vreg_l4c>; 476 vccq-max-microamp = <1200000>; 477 478 status = "okay"; 479}; 480 481&ufs_mem_phy { 482 vdda-phy-supply = <&vreg_l4a>; 483 vdda-pll-supply = <&vreg_l5a>; 484 485 status = "okay"; 486}; 487 488&usb_1 { 489 dr_mode = "peripheral"; 490 491 status = "okay"; 492}; 493 494&usb_1_hsphy { 495 vdda-pll-supply = <&vreg_l7a>; 496 vdda18-supply = <&vreg_l7c>; 497 vdda33-supply = <&vreg_l9a>; 498 499 status = "okay"; 500}; 501 502&usb_qmpphy { 503 vdda-phy-supply = <&vreg_l7a>; 504 vdda-pll-supply = <&vreg_l5a>; 505 506 status = "okay"; 507}; 508