1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6/* Mahua is heavily based on Glymur, with some meaningful differences */ 7#include "glymur.dtsi" 8 9/delete-node/ &bwmon_cluster2; 10/delete-node/ &cluster2_pd; 11/delete-node/ &cpu_map_cluster2; 12/delete-node/ &cpu12; 13/delete-node/ &cpu13; 14/delete-node/ &cpu14; 15/delete-node/ &cpu15; 16/delete-node/ &cpu16; 17/delete-node/ &cpu17; 18/delete-node/ &cpu_pd12; 19/delete-node/ &cpu_pd13; 20/delete-node/ &cpu_pd14; 21/delete-node/ &cpu_pd15; 22/delete-node/ &cpu_pd16; 23/delete-node/ &cpu_pd17; 24/delete-node/ &cti_wpss; 25/delete-node/ &thermal_aoss_6; 26/delete-node/ &thermal_aoss_7; 27/delete-node/ &thermal_cpu_2_0_0; 28/delete-node/ &thermal_cpu_2_0_1; 29/delete-node/ &thermal_cpu_2_1_0; 30/delete-node/ &thermal_cpu_2_1_1; 31/delete-node/ &thermal_cpu_2_2_0; 32/delete-node/ &thermal_cpu_2_2_1; 33/delete-node/ &thermal_cpu_2_3_0; 34/delete-node/ &thermal_cpu_2_3_1; 35/delete-node/ &thermal_cpu_2_4_0; 36/delete-node/ &thermal_cpu_2_4_1; 37/delete-node/ &thermal_cpu_2_5_0; 38/delete-node/ &thermal_cpu_2_5_1; 39/delete-node/ &thermal_cpuillc_2_1; 40/delete-node/ &thermal_cpullc_2_0; 41/delete-node/ &thermal_ddr_2; 42/delete-node/ &thermal_gpu_3_0; 43/delete-node/ &thermal_gpu_3_1; 44/delete-node/ &thermal_gpu_3_2; 45/delete-node/ &thermal_qmx_2_0; 46/delete-node/ &thermal_qmx_2_1; 47/delete-node/ &thermal_qmx_2_2; 48/delete-node/ &thermal_qmx_2_3; 49/delete-node/ &thermal_qmx_2_4; 50/delete-node/ &thermal_video_1; 51/delete-node/ &tsens6; 52/delete-node/ &tsens7; 53 54&aggre1_noc { 55 compatible = "qcom,mahua-aggre1-noc", "qcom,glymur-aggre1-noc"; 56}; 57 58&aggre2_noc { 59 compatible = "qcom,mahua-aggre2-noc", "qcom,glymur-aggre2-noc"; 60}; 61 62&aggre3_noc { 63 compatible = "qcom,mahua-aggre3-noc", "qcom,glymur-aggre3-noc"; 64}; 65 66&aggre4_noc { 67 compatible = "qcom,mahua-aggre4-noc", "qcom,glymur-aggre4-noc"; 68}; 69 70&clk_virt { 71 compatible = "qcom,mahua-clk-virt", "qcom,glymur-clk-virt"; 72}; 73 74&cnoc_main { 75 compatible = "qcom,mahua-cnoc-main", "qcom,glymur-cnoc-main"; 76}; 77 78&config_noc { 79 compatible = "qcom,mahua-cnoc-cfg"; 80}; 81 82&hsc_noc { 83 compatible = "qcom,mahua-hscnoc"; 84}; 85 86&lpass_ag_noc { 87 compatible = "qcom,mahua-lpass-ag-noc", "qcom,glymur-lpass-ag-noc"; 88}; 89 90&lpass_lpiaon_noc { 91 compatible = "qcom,mahua-lpass-lpiaon-noc", "qcom,glymur-lpass-lpiaon-noc"; 92}; 93 94&lpass_lpicx_noc { 95 compatible = "qcom,mahua-lpass-lpicx-noc", "qcom,glymur-lpass-lpicx-noc"; 96}; 97 98&mc_virt { 99 compatible = "qcom,mahua-mc-virt"; 100}; 101 102&mmss_noc { 103 compatible = "qcom,mahua-mmss-noc", "qcom,glymur-mmss-noc"; 104}; 105 106&nsi_noc { 107 compatible = "qcom,mahua-nsinoc", "qcom,glymur-nsinoc"; 108}; 109 110&nsp_noc { 111 compatible = "qcom,mahua-nsp-noc", "qcom,glymur-nsp-noc"; 112}; 113 114&oobm_ss_noc { 115 compatible = "qcom,mahua-oobm-ss-noc", "qcom,glymur-oobm-ss-noc"; 116}; 117 118&pcie_east_anoc { 119 compatible = "qcom,mahua-pcie-east-anoc", "qcom,glymur-pcie-east-anoc"; 120}; 121 122&pcie_east_slv_noc { 123 compatible = "qcom,mahua-pcie-east-slv-noc", "qcom,glymur-pcie-east-slv-noc"; 124}; 125 126&pcie_west_anoc { 127 compatible = "qcom,mahua-pcie-west-anoc"; 128 clocks = <&gcc GCC_AGGRE_NOC_PCIE_3B_WEST_SF_AXI_CLK>, 129 <&gcc GCC_AGGRE_NOC_PCIE_4_WEST_SF_AXI_CLK>, 130 <&gcc GCC_AGGRE_NOC_PCIE_6_WEST_SF_AXI_CLK>; 131}; 132 133&pcie_west_slv_noc { 134 compatible = "qcom,mahua-pcie-west-slv-noc"; 135}; 136 137&system_noc { 138 compatible = "qcom,mahua-system-noc", "qcom,glymur-system-noc"; 139}; 140 141&thermal_camera_0 { 142 thermal-sensors = <&tsens4 9>; 143}; 144 145&thermal_camera_1 { 146 thermal-sensors = <&tsens4 10>; 147}; 148 149&thermal_ddr_1 { 150 thermal-sensors = <&tsens1 7>; 151}; 152 153&thermal_gpu_0_0 { 154 thermal-sensors = <&tsens5 1>; 155}; 156 157&thermal_gpu_0_1 { 158 thermal-sensors = <&tsens5 2>; 159}; 160 161&thermal_gpu_0_2 { 162 thermal-sensors = <&tsens5 3>; 163}; 164 165&thermal_gpu_1_0 { 166 thermal-sensors = <&tsens5 4>; 167}; 168 169&thermal_gpu_1_1 { 170 thermal-sensors = <&tsens5 5>; 171}; 172 173&thermal_gpu_1_2 { 174 thermal-sensors = <&tsens5 6>; 175}; 176 177&thermal_gpu_2_0 { 178 thermal-sensors = <&tsens5 7>; 179}; 180 181&thermal_gpu_2_1 { 182 thermal-sensors = <&tsens5 8>; 183}; 184 185&thermal_gpu_2_2 { 186 thermal-sensors = <&tsens5 9>; 187}; 188 189&thermal_gpuss_0 { 190 thermal-sensors = <&tsens5 10>; 191}; 192 193&thermal_gpuss_1 { 194 thermal-sensors = <&tsens5 11>; 195}; 196 197&thermal_nsphmx_0 { 198 thermal-sensors = <&tsens4 5>; 199}; 200 201&thermal_nsphmx_1 { 202 thermal-sensors = <&tsens4 6>; 203}; 204 205&thermal_nsphmx_2 { 206 thermal-sensors = <&tsens4 7>; 207}; 208 209&thermal_nsphmx_3 { 210 thermal-sensors = <&tsens4 8>; 211}; 212 213&thermal_nsphvx_0 { 214 thermal-sensors = <&tsens4 1>; 215}; 216 217&thermal_nsphvx_1 { 218 thermal-sensors = <&tsens4 2>; 219}; 220 221&thermal_nsphvx_2 { 222 thermal-sensors = <&tsens4 3>; 223}; 224 225&thermal_nsphvx_3 { 226 thermal-sensors = <&tsens4 4>; 227}; 228 229&thermal_video_0 { 230 thermal-sensors = <&tsens1 8>; 231}; 232 233&thermal_zones { 234 gpuss-2-thermal { 235 thermal-sensors = <&tsens5 12>; 236 237 trips { 238 trip-point0 { 239 temperature = <90000>; 240 hysteresis = <5000>; 241 type = "hot"; 242 }; 243 244 gpuss-2-critical { 245 temperature = <115000>; 246 hysteresis = <1000>; 247 type = "critical"; 248 }; 249 }; 250 }; 251 252 gpuss-3-thermal { 253 thermal-sensors = <&tsens5 13>; 254 255 trips { 256 trip-point0 { 257 temperature = <90000>; 258 hysteresis = <5000>; 259 type = "hot"; 260 }; 261 262 gpuss-3-critical { 263 temperature = <115000>; 264 hysteresis = <1000>; 265 type = "critical"; 266 }; 267 }; 268 }; 269 270 gpuss-4-thermal { 271 thermal-sensors = <&tsens5 14>; 272 273 trips { 274 trip-point0 { 275 temperature = <90000>; 276 hysteresis = <5000>; 277 type = "hot"; 278 }; 279 280 gpuss-4-critical { 281 temperature = <115000>; 282 hysteresis = <1000>; 283 type = "critical"; 284 }; 285 }; 286 }; 287}; 288 289&tlmm { 290 compatible = "qcom,mahua-tlmm"; 291}; 292 293&tsens4 { 294 #qcom,sensors = <11>; 295}; 296 297&tsens5 { 298 #qcom,sensors = <15>; 299}; 300 301