xref: /linux/scripts/dtc/include-prefixes/arm64/qcom/lemans-evk.dts (revision 4f38da1f027ea2c9f01bb71daa7a299c191b6940) 
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2024-2025, Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/sound/qcom,q6afe.h>
10#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11
12#include "lemans.dtsi"
13#include "lemans-pmics.dtsi"
14
15/ {
16	model = "Qualcomm Technologies, Inc. Lemans EVK";
17	compatible = "qcom,lemans-evk", "qcom,qcs9100", "qcom,sa8775p";
18
19	aliases {
20		ethernet0 = &ethernet0;
21		mmc1 = &sdhc;
22		serial0 = &uart10;
23	};
24
25	dmic: audio-codec-0 {
26		compatible = "dmic-codec";
27		#sound-dai-cells = <0>;
28		num-channels = <1>;
29	};
30
31	max98357a: audio-codec-1 {
32		compatible = "maxim,max98357a";
33		#sound-dai-cells = <0>;
34	};
35
36	chosen {
37		stdout-path = "serial0:115200n8";
38	};
39
40	edp0-connector {
41		compatible = "dp-connector";
42		label = "EDP0";
43		type = "mini";
44
45		port {
46			edp0_connector_in: endpoint {
47				remote-endpoint = <&mdss0_dp0_out>;
48			};
49		};
50	};
51
52	edp1-connector {
53		compatible = "dp-connector";
54		label = "EDP1";
55		type = "mini";
56
57		port {
58			edp1_connector_in: endpoint {
59				remote-endpoint = <&mdss0_dp1_out>;
60			};
61		};
62	};
63
64	sound {
65		compatible = "qcom,qcs9100-sndcard";
66		model = "LEMANS-EVK";
67
68		pinctrl-0 = <&hs0_mi2s_active>, <&hs2_mi2s_active>;
69		pinctrl-names = "default";
70
71		hs0-mi2s-playback-dai-link {
72			link-name = "HS0 MI2S Playback";
73
74			codec {
75				sound-dai = <&max98357a>;
76			};
77
78			cpu {
79				sound-dai = <&q6apmbedai PRIMARY_MI2S_RX>;
80			};
81
82			platform {
83				sound-dai = <&q6apm>;
84			};
85		};
86
87		hs2-mi2s-capture-dai-link {
88			link-name = "HS2 MI2S Capture";
89
90			codec {
91				sound-dai = <&dmic>;
92			};
93
94			cpu {
95				sound-dai = <&q6apmbedai TERTIARY_MI2S_TX>;
96			};
97
98			platform {
99				sound-dai = <&q6apm>;
100			};
101		};
102	};
103
104	vmmc_sdc: regulator-vmmc-sdc {
105		compatible = "regulator-fixed";
106
107		regulator-name = "vmmc_sdc";
108		regulator-min-microvolt = <2950000>;
109		regulator-max-microvolt = <2950000>;
110	};
111
112	vreg_sdc: regulator-vreg-sdc {
113		compatible = "regulator-gpio";
114
115		regulator-name = "vreg_sdc";
116		regulator-type = "voltage";
117		regulator-min-microvolt = <1800000>;
118		regulator-max-microvolt = <2950000>;
119
120		gpios = <&expander1 7 GPIO_ACTIVE_HIGH>;
121		states = <1800000 1>, <2950000 0>;
122
123		startup-delay-us = <100>;
124	};
125};
126
127&apps_rsc {
128	regulators-0 {
129		compatible = "qcom,pmm8654au-rpmh-regulators";
130		qcom,pmic-id = "a";
131
132		vreg_s4a: smps4 {
133			regulator-name = "vreg_s4a";
134			regulator-min-microvolt = <1800000>;
135			regulator-max-microvolt = <1816000>;
136			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
137		};
138
139		vreg_s5a: smps5 {
140			regulator-name = "vreg_s5a";
141			regulator-min-microvolt = <1850000>;
142			regulator-max-microvolt = <1996000>;
143			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
144		};
145
146		vreg_s9a: smps9 {
147			regulator-name = "vreg_s9a";
148			regulator-min-microvolt = <535000>;
149			regulator-max-microvolt = <1120000>;
150			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
151		};
152
153		vreg_l4a: ldo4 {
154			regulator-name = "vreg_l4a";
155			regulator-min-microvolt = <788000>;
156			regulator-max-microvolt = <1050000>;
157			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
158			regulator-allow-set-load;
159			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
160						   RPMH_REGULATOR_MODE_HPM>;
161		};
162
163		vreg_l5a: ldo5 {
164			regulator-name = "vreg_l5a";
165			regulator-min-microvolt = <870000>;
166			regulator-max-microvolt = <950000>;
167			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
168			regulator-allow-set-load;
169			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
170						   RPMH_REGULATOR_MODE_HPM>;
171		};
172
173		vreg_l6a: ldo6 {
174			regulator-name = "vreg_l6a";
175			regulator-min-microvolt = <870000>;
176			regulator-max-microvolt = <970000>;
177			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
178			regulator-allow-set-load;
179			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
180						   RPMH_REGULATOR_MODE_HPM>;
181		};
182
183		vreg_l7a: ldo7 {
184			regulator-name = "vreg_l7a";
185			regulator-min-microvolt = <720000>;
186			regulator-max-microvolt = <950000>;
187			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
188			regulator-allow-set-load;
189			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
190						   RPMH_REGULATOR_MODE_HPM>;
191		};
192
193		vreg_l8a: ldo8 {
194			regulator-name = "vreg_l8a";
195			regulator-min-microvolt = <2504000>;
196			regulator-max-microvolt = <3300000>;
197			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
198			regulator-allow-set-load;
199			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
200						   RPMH_REGULATOR_MODE_HPM>;
201		};
202
203		vreg_l9a: ldo9 {
204			regulator-name = "vreg_l9a";
205			regulator-min-microvolt = <2970000>;
206			regulator-max-microvolt = <3544000>;
207			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
208			regulator-allow-set-load;
209			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
210						   RPMH_REGULATOR_MODE_HPM>;
211		};
212	};
213
214	regulators-1 {
215		compatible = "qcom,pmm8654au-rpmh-regulators";
216		qcom,pmic-id = "c";
217
218		vreg_l1c: ldo1 {
219			regulator-name = "vreg_l1c";
220			regulator-min-microvolt = <1140000>;
221			regulator-max-microvolt = <1260000>;
222			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
223			regulator-allow-set-load;
224			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
225						   RPMH_REGULATOR_MODE_HPM>;
226		};
227
228		vreg_l2c: ldo2 {
229			regulator-name = "vreg_l2c";
230			regulator-min-microvolt = <900000>;
231			regulator-max-microvolt = <1100000>;
232			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
233			regulator-allow-set-load;
234			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
235						   RPMH_REGULATOR_MODE_HPM>;
236		};
237
238		vreg_l3c: ldo3 {
239			regulator-name = "vreg_l3c";
240			regulator-min-microvolt = <1100000>;
241			regulator-max-microvolt = <1300000>;
242			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
243			regulator-allow-set-load;
244			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
245						   RPMH_REGULATOR_MODE_HPM>;
246		};
247
248		vreg_l4c: ldo4 {
249			regulator-name = "vreg_l4c";
250			regulator-min-microvolt = <1200000>;
251			regulator-max-microvolt = <1200000>;
252			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
253			regulator-allow-set-load;
254			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
255						   RPMH_REGULATOR_MODE_HPM>;
256		};
257
258		vreg_l5c: ldo5 {
259			regulator-name = "vreg_l5c";
260			regulator-min-microvolt = <1100000>;
261			regulator-max-microvolt = <1300000>;
262			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
263			regulator-allow-set-load;
264			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
265						   RPMH_REGULATOR_MODE_HPM>;
266		};
267
268		vreg_l6c: ldo6 {
269			regulator-name = "vreg_l6c";
270			regulator-min-microvolt = <1620000>;
271			regulator-max-microvolt = <1980000>;
272			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
273			regulator-allow-set-load;
274			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
275						   RPMH_REGULATOR_MODE_HPM>;
276		};
277
278		vreg_l7c: ldo7 {
279			regulator-name = "vreg_l7c";
280			regulator-min-microvolt = <1620000>;
281			regulator-max-microvolt = <2000000>;
282			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
283			regulator-allow-set-load;
284			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
285						   RPMH_REGULATOR_MODE_HPM>;
286		};
287
288		vreg_l8c: ldo8 {
289			regulator-name = "vreg_l8c";
290			regulator-min-microvolt = <2400000>;
291			regulator-max-microvolt = <3300000>;
292			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
293			regulator-allow-set-load;
294			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
295						   RPMH_REGULATOR_MODE_HPM>;
296		};
297
298		vreg_l9c: ldo9 {
299			regulator-name = "vreg_l9c";
300			regulator-min-microvolt = <1650000>;
301			regulator-max-microvolt = <2700000>;
302			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
303			regulator-allow-set-load;
304			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
305						   RPMH_REGULATOR_MODE_HPM>;
306		};
307	};
308
309	regulators-2 {
310		compatible = "qcom,pmm8654au-rpmh-regulators";
311		qcom,pmic-id = "e";
312
313		vreg_s4e: smps4 {
314			regulator-name = "vreg_s4e";
315			regulator-min-microvolt = <970000>;
316			regulator-max-microvolt = <1520000>;
317			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
318		};
319
320		vreg_s7e: smps7 {
321			regulator-name = "vreg_s7e";
322			regulator-min-microvolt = <1010000>;
323			regulator-max-microvolt = <1170000>;
324			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
325		};
326
327		vreg_s9e: smps9 {
328			regulator-name = "vreg_s9e";
329			regulator-min-microvolt = <300000>;
330			regulator-max-microvolt = <570000>;
331			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
332		};
333
334		vreg_l6e: ldo6 {
335			regulator-name = "vreg_l6e";
336			regulator-min-microvolt = <1280000>;
337			regulator-max-microvolt = <1450000>;
338			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
339			regulator-allow-set-load;
340			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
341						   RPMH_REGULATOR_MODE_HPM>;
342		};
343
344		vreg_l8e: ldo8 {
345			regulator-name = "vreg_l8e";
346			regulator-min-microvolt = <1800000>;
347			regulator-max-microvolt = <1950000>;
348			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349			regulator-allow-set-load;
350			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
351						   RPMH_REGULATOR_MODE_HPM>;
352		};
353	};
354};
355
356&ethernet0 {
357	phy-handle = <&hsgmii_phy0>;
358	phy-mode = "2500base-x";
359
360	pinctrl-0 = <&ethernet0_default>;
361	pinctrl-names = "default";
362
363	snps,mtl-rx-config = <&mtl_rx_setup>;
364	snps,mtl-tx-config = <&mtl_tx_setup>;
365
366	nvmem-cells = <&mac_addr0>;
367	nvmem-cell-names = "mac-address";
368
369	status = "okay";
370
371	mdio {
372		compatible = "snps,dwmac-mdio";
373		#address-cells = <1>;
374		#size-cells = <0>;
375
376		hsgmii_phy0: ethernet-phy@1c {
377			compatible = "ethernet-phy-id004d.d101";
378			reg = <0x1c>;
379			reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
380			reset-assert-us = <11000>;
381			reset-deassert-us = <70000>;
382		};
383	};
384
385	mtl_rx_setup: rx-queues-config {
386		snps,rx-queues-to-use = <4>;
387		snps,rx-sched-sp;
388
389		queue0 {
390			snps,dcb-algorithm;
391			snps,map-to-dma-channel = <0x0>;
392			snps,route-up;
393			snps,priority = <0x1>;
394		};
395
396		queue1 {
397			snps,dcb-algorithm;
398			snps,map-to-dma-channel = <0x1>;
399			snps,route-ptp;
400		};
401
402		queue2 {
403			snps,avb-algorithm;
404			snps,map-to-dma-channel = <0x2>;
405			snps,route-avcp;
406		};
407
408		queue3 {
409			snps,avb-algorithm;
410			snps,map-to-dma-channel = <0x3>;
411			snps,priority = <0xc>;
412		};
413	};
414
415	mtl_tx_setup: tx-queues-config {
416		snps,tx-queues-to-use = <4>;
417
418		queue0 {
419			snps,dcb-algorithm;
420		};
421
422		queue1 {
423			snps,dcb-algorithm;
424		};
425
426		queue2 {
427			snps,avb-algorithm;
428			snps,send_slope = <0x1000>;
429			snps,idle_slope = <0x1000>;
430			snps,high_credit = <0x3e800>;
431			snps,low_credit = <0xffc18000>;
432		};
433
434		queue3 {
435			snps,avb-algorithm;
436			snps,send_slope = <0x1000>;
437			snps,idle_slope = <0x1000>;
438			snps,high_credit = <0x3e800>;
439			snps,low_credit = <0xffc18000>;
440		};
441	};
442};
443
444&gpi_dma0 {
445	status = "okay";
446};
447
448&gpi_dma1 {
449	status = "okay";
450};
451
452&gpi_dma2 {
453	status = "okay";
454};
455
456&i2c18 {
457	status = "okay";
458
459	expander0: gpio@38 {
460		compatible = "ti,tca9538";
461		reg = <0x38>;
462		#gpio-cells = <2>;
463		gpio-controller;
464	};
465
466	expander1: gpio@39 {
467		compatible = "ti,tca9538";
468		reg = <0x39>;
469		#gpio-cells = <2>;
470		gpio-controller;
471	};
472
473	expander2: gpio@3a {
474		compatible = "ti,tca9538";
475		reg = <0x3a>;
476		#gpio-cells = <2>;
477		gpio-controller;
478	};
479
480	expander3: gpio@3b {
481		compatible = "ti,tca9538";
482		reg = <0x3b>;
483		#gpio-cells = <2>;
484		gpio-controller;
485	};
486
487	eeprom@50 {
488		compatible = "giantec,gt24c256c", "atmel,24c256";
489		reg = <0x50>;
490		pagesize = <64>;
491
492		nvmem-layout {
493			compatible = "fixed-layout";
494			#address-cells = <1>;
495			#size-cells = <1>;
496
497			mac_addr0: mac-addr@0 {
498				reg = <0x0 0x6>;
499			};
500		};
501	};
502};
503
504&iris {
505	firmware-name = "qcom/vpu/vpu30_p4_s6_16mb.mbn";
506
507	status = "okay";
508};
509
510&mdss0 {
511	status = "okay";
512};
513
514&mdss0_dp0 {
515	pinctrl-0 = <&dp0_hot_plug_det>;
516	pinctrl-names = "default";
517
518	status = "okay";
519};
520
521&mdss0_dp0_out {
522	data-lanes = <0 1 2 3>;
523	link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
524
525	remote-endpoint = <&edp0_connector_in>;
526};
527
528&mdss0_dp0_phy {
529	vdda-phy-supply = <&vreg_l1c>;
530	vdda-pll-supply = <&vreg_l4a>;
531
532	status = "okay";
533};
534
535&mdss0_dp1 {
536	pinctrl-0 = <&dp1_hot_plug_det>;
537	pinctrl-names = "default";
538
539	status = "okay";
540};
541
542&mdss0_dp1_out {
543	data-lanes = <0 1 2 3>;
544	link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
545
546	remote-endpoint = <&edp1_connector_in>;
547};
548
549&mdss0_dp1_phy {
550	vdda-phy-supply = <&vreg_l1c>;
551	vdda-pll-supply = <&vreg_l4a>;
552
553	status = "okay";
554};
555
556&pcie0 {
557	perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
558	wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
559
560	pinctrl-0 = <&pcie0_default_state>;
561	pinctrl-names = "default";
562
563	status = "okay";
564};
565
566&pcie0_phy {
567	vdda-phy-supply = <&vreg_l5a>;
568	vdda-pll-supply = <&vreg_l1c>;
569
570	status = "okay";
571};
572
573&pcie1 {
574	perst-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
575	wake-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
576
577	pinctrl-0 = <&pcie1_default_state>;
578	pinctrl-names = "default";
579
580	status = "okay";
581};
582
583&pcie1_phy {
584	vdda-phy-supply = <&vreg_l5a>;
585	vdda-pll-supply = <&vreg_l1c>;
586
587	status = "okay";
588};
589
590&qupv3_id_0 {
591	status = "okay";
592};
593
594&qupv3_id_1 {
595	status = "okay";
596};
597
598&qupv3_id_2 {
599	status = "okay";
600};
601
602&remoteproc_adsp {
603	firmware-name = "qcom/sa8775p/adsp.mbn";
604
605	status = "okay";
606};
607
608&remoteproc_cdsp0 {
609	firmware-name = "qcom/sa8775p/cdsp0.mbn";
610
611	status = "okay";
612};
613
614&remoteproc_cdsp1 {
615	firmware-name = "qcom/sa8775p/cdsp1.mbn";
616
617	status = "okay";
618};
619
620&remoteproc_gpdsp0 {
621	firmware-name = "qcom/sa8775p/gpdsp0.mbn";
622
623	status = "okay";
624};
625
626&remoteproc_gpdsp1 {
627	firmware-name = "qcom/sa8775p/gpdsp1.mbn";
628
629	status = "okay";
630};
631
632&sdhc {
633	vmmc-supply = <&vmmc_sdc>;
634	vqmmc-supply = <&vreg_sdc>;
635
636	pinctrl-0 = <&sdc_default>, <&sd_cd>;
637	pinctrl-1 = <&sdc_sleep>, <&sd_cd>;
638	pinctrl-names = "default", "sleep";
639
640	bus-width = <4>;
641	cd-gpios = <&tlmm 36 GPIO_ACTIVE_LOW>;
642	no-mmc;
643	no-sdio;
644
645	status = "okay";
646};
647
648&serdes0 {
649	phy-supply = <&vreg_l5a>;
650
651	status = "okay";
652};
653
654&sleep_clk {
655	clock-frequency = <32768>;
656};
657
658&tlmm {
659	ethernet0_default: ethernet0-default-state {
660		ethernet0_mdc: ethernet0-mdc-pins {
661			pins = "gpio8";
662			function = "emac0_mdc";
663			drive-strength = <16>;
664			bias-pull-up;
665		};
666
667		ethernet0_mdio: ethernet0-mdio-pins {
668			pins = "gpio9";
669			function = "emac0_mdio";
670			drive-strength = <16>;
671			bias-pull-up;
672		};
673	};
674
675	pcie0_default_state: pcie0-default-state {
676		clkreq-pins {
677			pins = "gpio1";
678			function = "pcie0_clkreq";
679			drive-strength = <2>;
680			bias-pull-up;
681		};
682
683		perst-pins {
684			pins = "gpio2";
685			function = "gpio";
686			drive-strength = <2>;
687			bias-pull-up;
688		};
689
690		wake-pins {
691			pins = "gpio0";
692			function = "gpio";
693			drive-strength = <2>;
694			bias-pull-up;
695		};
696	};
697
698	pcie1_default_state: pcie1-default-state {
699		clkreq-pins {
700			pins = "gpio3";
701			function = "pcie1_clkreq";
702			drive-strength = <2>;
703			bias-pull-up;
704		};
705
706		perst-pins {
707			pins = "gpio4";
708			function = "gpio";
709			drive-strength = <2>;
710			bias-pull-up;
711		};
712
713		wake-pins {
714			pins = "gpio5";
715			function = "gpio";
716			drive-strength = <2>;
717			bias-pull-up;
718		};
719	};
720
721	sd_cd: sd-cd-state {
722		pins = "gpio36";
723		function = "gpio";
724		bias-pull-up;
725	};
726};
727
728&uart10 {
729	compatible = "qcom,geni-debug-uart";
730	pinctrl-0 = <&qup_uart10_default>;
731	pinctrl-names = "default";
732
733	status = "okay";
734};
735
736&ufs_mem_hc {
737	reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
738	vcc-supply = <&vreg_l8a>;
739	vcc-max-microamp = <1100000>;
740	vccq-supply = <&vreg_l4c>;
741	vccq-max-microamp = <1200000>;
742
743	status = "okay";
744};
745
746&ufs_mem_phy {
747	vdda-phy-supply = <&vreg_l4a>;
748	vdda-pll-supply = <&vreg_l1c>;
749
750	status = "okay";
751};
752
753&usb_0 {
754	dr_mode = "peripheral";
755
756	status = "okay";
757};
758
759&usb_0_hsphy {
760	vdda-pll-supply = <&vreg_l7a>;
761	vdda18-supply = <&vreg_l6c>;
762	vdda33-supply = <&vreg_l9a>;
763
764	status = "okay";
765};
766
767&usb_0_qmpphy {
768	vdda-phy-supply = <&vreg_l1c>;
769	vdda-pll-supply = <&vreg_l7a>;
770
771	status = "okay";
772};
773
774&xo_board_clk {
775	clock-frequency = <38400000>;
776};
777