xref: /linux/scripts/dtc/include-prefixes/arm64/qcom/kaanapali-ipcc.h (revision 6589b3d76db2d6adbf8f2084c303fb24252a0dc6)
1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
2 /*
3  * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4  */
5 
6 #ifndef __DTS_KAANAPALI_MAILBOX_IPCC_H
7 #define __DTS_KAANAPALI_MAILBOX_IPCC_H
8 
9 /* Physical client IDs */
10 #define IPCC_MPROC_AOP			0
11 #define IPCC_MPROC_TZ			1
12 #define IPCC_MPROC_MPSS			2
13 #define IPCC_MPROC_LPASS		3
14 #define IPCC_MPROC_SDC			4
15 #define IPCC_MPROC_CDSP			5
16 #define IPCC_MPROC_APSS			6
17 #define IPCC_MPROC_SOCCP		13
18 #define IPCC_MPROC_DCP			14
19 #define IPCC_MPROC_SPSS			15
20 #define IPCC_MPROC_TME			16
21 #define IPCC_MPROC_WPSS			17
22 
23 #define IPCC_COMPUTE_L0_CDSP		2
24 #define IPCC_COMPUTE_L0_APSS		3
25 #define IPCC_COMPUTE_L0_GPU		4
26 #define IPCC_COMPUTE_L0_CVP		8
27 #define IPCC_COMPUTE_L0_CAM		9
28 #define IPCC_COMPUTE_L0_CAM1		10
29 #define IPCC_COMPUTE_L0_DCP		11
30 #define IPCC_COMPUTE_L0_VPU		12
31 #define IPCC_COMPUTE_L0_SOCCP		16
32 
33 #define IPCC_COMPUTE_L1_CDSP		2
34 #define IPCC_COMPUTE_L1_APSS		3
35 #define IPCC_COMPUTE_L1_GPU		4
36 #define IPCC_COMPUTE_L1_CVP		8
37 #define IPCC_COMPUTE_L1_CAM		9
38 #define IPCC_COMPUTE_L1_CAM1		10
39 #define IPCC_COMPUTE_L1_DCP		11
40 #define IPCC_COMPUTE_L1_VPU		12
41 #define IPCC_COMPUTE_L1_SOCCP		16
42 
43 #define IPCC_PERIPH_CDSP		2
44 #define IPCC_PERIPH_APSS		3
45 #define IPCC_PERIPH_PCIE0		4
46 #define IPCC_PERIPH_PCIE1		5
47 
48 #define IPCC_FENCE_CDSP			2
49 #define IPCC_FENCE_APSS			3
50 #define IPCC_FENCE_GPU			4
51 #define IPCC_FENCE_CVP			8
52 #define IPCC_FENCE_CAM			8
53 #define IPCC_FENCE_CAM1			10
54 #define IPCC_FENCE_DCP			11
55 #define IPCC_FENCE_VPU			20
56 #define IPCC_FENCE_SOCCP		24
57 
58 #endif
59