xref: /linux/scripts/dtc/include-prefixes/arm64/qcom/glymur-crd.dtsi (revision 377665c6078d1aa18d29d56a39d70ed8185cd2d1)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4 */
5
6#include "pmcx0102.dtsi"        /* SPMI0: SID-2/3 SPMI1: SID-2/3 */
7#include "pmh0101.dtsi"         /* SPMI0: SID-1                  */
8#include "pmh0110-glymur.dtsi"  /* SPMI0: SID-5/7 SPMI1: SID-5   */
9#include "pmh0104-glymur.dtsi"  /* SPMI0: SID-8/9 SPMI1: SID-11  */
10#include "pmk8850.dtsi"         /* SPMI0: SID-0                  */
11#include "smb2370.dtsi"         /* SPMI2: SID-9/10/11            */
12
13#include <dt-bindings/input/gpio-keys.h>
14
15/ {
16	model = "Qualcomm Technologies, Inc. Glymur CRD";
17	compatible = "qcom,glymur-crd", "qcom,glymur";
18
19	aliases {
20		serial0 = &uart21;
21		serial1 = &uart14;
22		i2c0 = &i2c0;
23		i2c1 = &i2c4;
24		i2c2 = &i2c5;
25		spi0 = &spi18;
26	};
27
28	chosen {
29		stdout-path = "serial0:115200n8";
30	};
31
32	clocks {
33		xo_board: xo-board {
34			compatible = "fixed-clock";
35			clock-frequency = <38400000>;
36			#clock-cells = <0>;
37		};
38
39		sleep_clk: sleep-clk {
40			compatible = "fixed-clock";
41			clock-frequency = <32000>;
42			#clock-cells = <0>;
43		};
44	};
45
46	gpio-keys {
47		compatible = "gpio-keys";
48
49		pinctrl-0 = <&key_vol_up_default>, <&hall_int_n_default>;
50		pinctrl-names = "default";
51
52		key-volume-up {
53			label = "Volume Up";
54			linux,code = <KEY_VOLUMEUP>;
55			gpios = <&pmh0101_gpios 6 GPIO_ACTIVE_LOW>;
56			debounce-interval = <15>;
57			linux,can-disable;
58			wakeup-source;
59		};
60
61		switch-lid {
62			label = "lid";
63			gpios = <&tlmm 92 GPIO_ACTIVE_LOW>;
64			linux,input-type = <EV_SW>;
65			linux,code = <SW_LID>;
66			wakeup-source;
67			wakeup-event-action = <EV_ACT_DEASSERTED>;
68		};
69	};
70
71	vreg_nvme: regulator-nvme {
72		compatible = "regulator-fixed";
73
74		regulator-name = "VREG_NVME_3P3";
75		regulator-min-microvolt = <3300000>;
76		regulator-max-microvolt = <3300000>;
77
78		gpio = <&pmh0101_gpios 14 GPIO_ACTIVE_HIGH>;
79		enable-active-high;
80
81		pinctrl-0 = <&nvme_reg_en>;
82		pinctrl-names = "default";
83
84		regulator-boot-on;
85	};
86
87	vreg_nvmesec: regulator-nvmesec {
88		compatible = "regulator-fixed";
89
90		regulator-name = "VREG_NVME_SEC_3P3";
91		regulator-min-microvolt = <3300000>;
92		regulator-max-microvolt = <3300000>;
93
94		gpio = <&pmh0110_f_e1_gpios 14 GPIO_ACTIVE_HIGH>;
95		enable-active-high;
96
97		pinctrl-0 = <&nvme_sec_reg_en>;
98		pinctrl-names = "default";
99
100		regulator-boot-on;
101	};
102
103	vreg_wcn_0p95: regulator-wcn-0p95 {
104		compatible = "regulator-fixed";
105
106		regulator-name = "VREG_WCN_0P95";
107		regulator-min-microvolt = <950000>;
108		regulator-max-microvolt = <950000>;
109
110		vin-supply = <&vreg_wcn_3p3>;
111	};
112
113	vreg_wcn_3p3: regulator-wcn-3p3 {
114		compatible = "regulator-fixed";
115
116		regulator-name = "VREG_WCN_3P3";
117		regulator-min-microvolt = <3300000>;
118		regulator-max-microvolt = <3300000>;
119
120		gpio = <&tlmm 94 GPIO_ACTIVE_HIGH>;
121		enable-active-high;
122
123		pinctrl-0 = <&wcn_sw_en>;
124		pinctrl-names = "default";
125
126		regulator-boot-on;
127	};
128
129	vreg_wwan: regulator-wwan {
130		compatible = "regulator-fixed";
131
132		regulator-name = "VREG_WWAN_3P3";
133		regulator-min-microvolt = <3300000>;
134		regulator-max-microvolt = <3300000>;
135
136		gpio = <&tlmm 246 GPIO_ACTIVE_HIGH>;
137		enable-active-high;
138
139		pinctrl-0 = <&wwan_reg_en>;
140		pinctrl-names = "default";
141	};
142
143	wcn7850-pmu {
144		compatible = "qcom,wcn7850-pmu";
145
146		vdd-supply = <&vreg_wcn_0p95>;
147		vddio-supply = <&vreg_l15b_e0_1p8>;
148		vddaon-supply = <&vreg_l15b_e0_1p8>;
149		vdddig-supply = <&vreg_l15b_e0_1p8>;
150		vddrfa1p2-supply = <&vreg_l15b_e0_1p8>;
151		vddrfa1p8-supply = <&vreg_l15b_e0_1p8>;
152
153		wlan-enable-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>;
154		bt-enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>;
155
156		pinctrl-0 = <&wcn_wlan_bt_en>;
157		pinctrl-names = "default";
158
159		regulators {
160			vreg_pmu_rfa_cmn: ldo0 {
161				regulator-name = "vreg_pmu_rfa_cmn";
162			};
163
164			vreg_pmu_aon_0p59: ldo1 {
165				regulator-name = "vreg_pmu_aon_0p59";
166			};
167
168			vreg_pmu_wlcx_0p8: ldo2 {
169				regulator-name = "vreg_pmu_wlcx_0p8";
170			};
171
172			vreg_pmu_wlmx_0p85: ldo3 {
173				regulator-name = "vreg_pmu_wlmx_0p85";
174			};
175
176			vreg_pmu_btcmx_0p85: ldo4 {
177				regulator-name = "vreg_pmu_btcmx_0p85";
178			};
179
180			vreg_pmu_rfa_0p8: ldo5 {
181				regulator-name = "vreg_pmu_rfa_0p8";
182			};
183
184			vreg_pmu_rfa_1p2: ldo6 {
185				regulator-name = "vreg_pmu_rfa_1p2";
186			};
187
188			vreg_pmu_rfa_1p8: ldo7 {
189				regulator-name = "vreg_pmu_rfa_1p8";
190			};
191
192			vreg_pmu_pcie_0p9: ldo8 {
193				regulator-name = "vreg_pmu_pcie_0p9";
194			};
195
196			vreg_pmu_pcie_1p8: ldo9 {
197				regulator-name = "vreg_pmu_pcie_1p8";
198			};
199		};
200	};
201};
202
203&apps_rsc {
204	regulators-0 {
205		compatible = "qcom,pmh0101-rpmh-regulators";
206		qcom,pmic-id = "B_E0";
207
208		vreg_bob1_e0: bob1 {
209			regulator-name = "vreg_bob1_e0";
210			regulator-min-microvolt = <2200000>;
211			regulator-max-microvolt = <4224000>;
212			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
213		};
214
215		vreg_bob2_e0: bob2 {
216			regulator-name = "vreg_bob2_e0";
217			regulator-min-microvolt = <2540000>;
218			regulator-max-microvolt = <3600000>;
219			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
220		};
221
222		vreg_l1b_e0_1p8: ldo1 {
223			regulator-name = "vreg_l1b_e0_1p8";
224			regulator-min-microvolt = <1800000>;
225			regulator-max-microvolt = <1800000>;
226			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
227		};
228
229		vreg_l2b_e0_2p9: ldo2 {
230			regulator-name = "vreg_l2b_e0_2p9";
231			regulator-min-microvolt = <2904000>;
232			regulator-max-microvolt = <2904000>;
233			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
234		};
235
236		vreg_l7b_e0_2p79: ldo7 {
237			regulator-name = "vreg_l7b_e0_2p79";
238			regulator-min-microvolt = <2790000>;
239			regulator-max-microvolt = <2792000>;
240			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
241		};
242
243		vreg_l8b_e0_1p50: ldo8 {
244			regulator-name = "vreg_l8b_e0_1p50";
245			regulator-min-microvolt = <1504000>;
246			regulator-max-microvolt = <1504000>;
247			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
248		};
249
250		vreg_l9b_e0_2p7: ldo9 {
251			regulator-name = "vreg_l9b_e0_2p7";
252			regulator-min-microvolt = <2704000>;
253			regulator-max-microvolt = <2704000>;
254			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
255		};
256
257		vreg_l10b_e0_1p8: ldo10 {
258			regulator-name = "vreg_l10b_e0_1p8";
259			regulator-min-microvolt = <1800000>;
260			regulator-max-microvolt = <1800000>;
261			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
262		};
263
264		vreg_l11b_e0_1p2: ldo11 {
265			regulator-name = "vreg_l11b_e0_1p2";
266			regulator-min-microvolt = <1200000>;
267			regulator-max-microvolt = <1200000>;
268			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
269		};
270
271		vreg_l12b_e0_1p14: ldo12 {
272			regulator-name = "vreg_l12b_e0_1p14";
273			regulator-min-microvolt = <1144000>;
274			regulator-max-microvolt = <1144000>;
275			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
276		};
277
278		vreg_l15b_e0_1p8: ldo15 {
279			regulator-name = "vreg_l15b_e0_1p8";
280			regulator-min-microvolt = <1800000>;
281			regulator-max-microvolt = <1800000>;
282			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
283		};
284
285		vreg_l17b_e0_2p4: ldo17 {
286			regulator-name = "vreg_l17b_e0_2p4";
287			regulator-min-microvolt = <2400000>;
288			regulator-max-microvolt = <2700000>;
289			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
290		};
291
292		vreg_l18b_e0_1p2: ldo18 {
293			regulator-name = "vreg_l18b_e0_1p2";
294			regulator-min-microvolt = <1200000>;
295			regulator-max-microvolt = <1200000>;
296			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
297		};
298	};
299
300	regulators-1 {
301		compatible = "qcom,pmcx0102-rpmh-regulators";
302		qcom,pmic-id = "C_E1";
303
304		vreg_l1c_e1_0p82: ldo1 {
305			regulator-name = "vreg_l1c_e1_0p82";
306			regulator-min-microvolt = <832000>;
307			regulator-max-microvolt = <832000>;
308			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
309		};
310
311		vreg_l2c_e1_1p14: ldo2 {
312			regulator-name = "vreg_l2c_e1_1p14";
313			regulator-min-microvolt = <1144000>;
314			regulator-max-microvolt = <1144000>;
315			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
316		};
317
318		vreg_l3c_e1_0p89: ldo3 {
319			regulator-name = "vreg_l3c_e1_0p89";
320			regulator-min-microvolt = <890000>;
321			regulator-max-microvolt = <980000>;
322			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
323		};
324
325		vreg_l4c_e1_0p72: ldo4 {
326			regulator-name = "vreg_l4c_e1_0p72";
327			regulator-min-microvolt = <720000>;
328			regulator-max-microvolt = <720000>;
329			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
330		};
331	};
332
333	regulators-2 {
334		compatible = "qcom,pmh0110-rpmh-regulators";
335		qcom,pmic-id = "F_E0";
336
337		vreg_s7f_e0_1p32: smps7 {
338			regulator-name = "vreg_s7f_e0_1p32";
339			regulator-min-microvolt = <1320000>;
340			regulator-max-microvolt = <1352000>;
341			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
342		};
343
344		vreg_s8f_e0_0p95: smps8 {
345			regulator-name = "vreg_s8f_e0_0p95";
346			regulator-min-microvolt = <952000>;
347			regulator-max-microvolt = <1200000>;
348			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
349		};
350
351		vreg_s9f_e0_1p9: smps9 {
352			regulator-name = "vreg_s9f_e0_1p9";
353			regulator-min-microvolt = <1900000>;
354			regulator-max-microvolt = <2000000>;
355			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
356		};
357
358		vreg_l2f_e0_0p82: ldo2 {
359			regulator-name = "vreg_l2f_e0_0p82";
360			regulator-min-microvolt = <832000>;
361			regulator-max-microvolt = <832000>;
362			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
363		};
364
365		vreg_l3f_e0_0p72: ldo3 {
366			regulator-name = "vreg_l3f_e0_0p72";
367			regulator-min-microvolt = <720000>;
368			regulator-max-microvolt = <720000>;
369			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
370		};
371
372		vreg_l4f_e0_0p3: ldo4 {
373			regulator-name = "vreg_l4f_e0_0p3";
374			regulator-min-microvolt = <1080000>;
375			regulator-max-microvolt = <1200000>;
376			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
377		};
378	};
379
380	regulators-3 {
381		compatible = "qcom,pmh0110-rpmh-regulators";
382		qcom,pmic-id = "F_E1";
383
384		vreg_s7f_e1_0p3: smps7 {
385			regulator-name = "vreg_s7f_e1_0p3";
386			regulator-min-microvolt = <300000>;
387			regulator-max-microvolt = <1200000>;
388			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
389		};
390
391		vreg_l1f_e1_0p82: ldo1 {
392			regulator-name = "vreg_l1f_e1_0p82";
393			regulator-min-microvolt = <832000>;
394			regulator-max-microvolt = <832000>;
395			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
396		};
397
398		vreg_l2f_e1_0p83: ldo2 {
399			regulator-name = "vreg_l2f_e1_0p83";
400			regulator-min-microvolt = <832000>;
401			regulator-max-microvolt = <832000>;
402			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
403		};
404
405		vreg_l4f_e1_1p08: ldo4 {
406			regulator-name = "vreg_l4f_e1_1p08";
407			regulator-min-microvolt = <1080000>;
408			regulator-max-microvolt = <1320000>;
409			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
410		};
411	};
412
413	regulators-4 {
414		compatible = "qcom,pmh0110-rpmh-regulators";
415		qcom,pmic-id = "H_E0";
416
417		vreg_l1h_e0_0p89: ldo1 {
418			regulator-name = "vreg_l1h_e0_0p89";
419			regulator-min-microvolt = <832000>;
420			regulator-max-microvolt = <832000>;
421			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
422		};
423
424		vreg_l2h_e0_0p72: ldo2 {
425			regulator-name = "vreg_l2h_e0_0p72";
426			regulator-min-microvolt = <832000>;
427			regulator-max-microvolt = <832000>;
428			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
429		};
430
431		vreg_l3h_e0_0p32: ldo3 {
432			regulator-name = "vreg_l3h_e0_0p32";
433			regulator-min-microvolt = <320000>;
434			regulator-max-microvolt = <2000000>;
435			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
436		};
437
438		vreg_l4h_e0_1p2: ldo4 {
439			regulator-name = "vreg_l4h_e0_1p2";
440			regulator-min-microvolt = <1080000>;
441			regulator-max-microvolt = <1320000>;
442			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
443		};
444	};
445};
446
447&pcie3b {
448	vddpe-3v3-supply = <&vreg_nvmesec>;
449
450	pinctrl-0 = <&pcie3b_default>;
451	pinctrl-names = "default";
452};
453
454&pcie3b_phy {
455	vdda-phy-supply = <&vreg_l3c_e1_0p89>;
456	vdda-pll-supply = <&vreg_l2c_e1_1p14>;
457};
458
459&pcie3b_port0 {
460	reset-gpios = <&tlmm 155 GPIO_ACTIVE_LOW>;
461	wake-gpios = <&tlmm 157 GPIO_ACTIVE_LOW>;
462};
463
464&pcie4 {
465	pinctrl-0 = <&pcie4_default>;
466	pinctrl-names = "default";
467
468	status = "okay";
469};
470
471&pcie4_phy {
472	vdda-phy-supply = <&vreg_l1c_e1_0p82>;
473	vdda-pll-supply = <&vreg_l4f_e1_1p08>;
474
475	status = "okay";
476};
477
478&pcie4_port0 {
479	reset-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
480	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
481
482	wifi@0 {
483		compatible = "pci17cb,1107";
484		reg = <0x10000 0x0 0x0 0x0 0x0>;
485
486		vddaon-supply = <&vreg_pmu_aon_0p59>;
487		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
488		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
489		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
490		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
491		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
492		vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
493		vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
494		vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
495	};
496};
497
498&pcie5 {
499	vddpe-3v3-supply = <&vreg_nvme>;
500
501	pinctrl-0 = <&pcie5_default>;
502	pinctrl-names = "default";
503
504	status = "okay";
505};
506
507&pcie5_phy {
508	vdda-phy-supply = <&vreg_l2f_e0_0p82>;
509	vdda-pll-supply = <&vreg_l4h_e0_1p2>;
510
511	status = "okay";
512};
513
514&pcie5_port0 {
515	reset-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
516	wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
517};
518
519&pcie6 {
520	vddpe-3v3-supply = <&vreg_wwan>;
521
522	pinctrl-0 = <&pcie6_default>;
523	pinctrl-names = "default";
524
525	status = "okay";
526};
527
528&pcie6_phy {
529	vdda-phy-supply = <&vreg_l1c_e1_0p82>;
530	vdda-pll-supply = <&vreg_l4f_e1_1p08>;
531
532	status = "okay";
533};
534
535&pcie6_port0 {
536	reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
537	wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
538};
539
540&pmh0101_gpios {
541	nvme_reg_en: nvme-reg-en-state {
542		pins = "gpio14";
543		function = "normal";
544		bias-disable;
545	};
546};
547
548&pmh0110_f_e1_gpios {
549	nvme_sec_reg_en: nvme-reg-en-state {
550		pins = "gpio14";
551		function = "normal";
552		bias-disable;
553	};
554};
555
556&pmh0101_gpios {
557	key_vol_up_default: key-vol-up-default-state {
558		pins = "gpio6";
559		function = "normal";
560		output-disable;
561		bias-pull-up;
562	};
563};
564
565&pmk8850_rtc {
566	qcom,no-alarm;
567};
568
569&pon_resin {
570	linux,code = <KEY_VOLUMEDOWN>;
571	status = "okay";
572};
573
574&remoteproc_adsp {
575	firmware-name = "qcom/glymur/adsp.mbn",
576			"qcom/glymur/adsp_dtb.mbn";
577
578	status = "okay";
579};
580
581&remoteproc_cdsp {
582	firmware-name = "qcom/glymur/cdsp.mbn",
583			"qcom/glymur/cdsp_dtb.mbn";
584
585	status = "okay";
586};
587
588&tlmm {
589	gpio-reserved-ranges = <4 4>, /* EC TZ Secure I3C */
590			       <10 2>, /* OOB UART */
591			       <44 4>; /* Security SPI (TPM) */
592
593	hall_int_n_default: hall-int-n-state {
594		pins = "gpio92";
595		function = "gpio";
596		bias-disable;
597	};
598
599	pcie4_default: pcie4-default-state {
600		clkreq-n-pins {
601			pins = "gpio147";
602			function = "pcie4_clk_req_n";
603			drive-strength = <2>;
604			bias-pull-up;
605		};
606
607		perst-n-pins {
608			pins = "gpio146";
609			function = "gpio";
610			drive-strength = <2>;
611			bias-disable;
612		};
613
614		wake-n-pins {
615			pins = "gpio148";
616			function = "gpio";
617			drive-strength = <2>;
618			bias-pull-up;
619		};
620	};
621
622	pcie5_default: pcie5-default-state {
623		clkreq-n-pins {
624			pins = "gpio153";
625			function = "pcie5_clk_req_n";
626			drive-strength = <2>;
627			bias-pull-up;
628		};
629
630		perst-n-pins {
631			pins = "gpio152";
632			function = "gpio";
633			drive-strength = <2>;
634			bias-disable;
635		};
636
637		wake-n-pins {
638			pins = "gpio154";
639			function = "gpio";
640			drive-strength = <2>;
641			bias-pull-up;
642		};
643	};
644
645	pcie6_default: pcie6-default-state {
646		clkreq-n-pins {
647			pins = "gpio150";
648			function = "pcie6_clk_req_n";
649			drive-strength = <2>;
650			bias-pull-up;
651		};
652
653		perst-n-pins {
654			pins = "gpio149";
655			function = "gpio";
656			drive-strength = <2>;
657			bias-disable;
658		};
659
660		wake-n-pins {
661			pins = "gpio151";
662			function = "gpio";
663			drive-strength = <2>;
664			bias-pull-up;
665		};
666	};
667
668	pcie3b_default: pcie3b-default-state {
669		clkreq-n-pins {
670			pins = "gpio156";
671			function = "pcie3b_clk";
672			drive-strength = <2>;
673			bias-pull-up;
674		};
675
676		perst-n-pins {
677			pins = "gpio155";
678			function = "gpio";
679			drive-strength = <2>;
680			bias-disable;
681		};
682
683		wake-n-pins {
684			pins = "gpio157";
685			function = "gpio";
686			drive-strength = <2>;
687			bias-pull-up;
688		};
689	};
690
691	wcn_wlan_bt_en: wcn-wlan-bt-en-state {
692		pins = "gpio116", "gpio117";
693		function = "gpio";
694		drive-strength = <2>;
695		bias-disable;
696	};
697
698	wcn_sw_en: wcn-sw-en-state {
699		pins = "gpio94";
700		function = "gpio";
701		drive-strength = <2>;
702		bias-disable;
703	};
704
705	wwan_reg_en: wwan-reg-en-state {
706		pins = "gpio246";
707		function = "gpio";
708		drive-strength = <2>;
709		bias-disable;
710	};
711};
712
713&uart14 {
714	status = "okay";
715
716	bluetooth {
717		compatible = "qcom,wcn7850-bt";
718		max-speed = <3200000>;
719
720		vddaon-supply = <&vreg_pmu_aon_0p59>;
721		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
722		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
723		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
724		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
725		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
726		vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
727	};
728};
729