1*9fda4a8aSGary Bisson// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*9fda4a8aSGary Bisson/* 3*9fda4a8aSGary Bisson * Copyright (C) 2025 Ezurio LLC 4*9fda4a8aSGary Bisson * Author: Gary Bisson <bisson.gary@gmail.com> 5*9fda4a8aSGary Bisson */ 6*9fda4a8aSGary Bisson 7*9fda4a8aSGary Bisson#include "mt6359.dtsi" 8*9fda4a8aSGary Bisson#include <dt-bindings/gpio/gpio.h> 9*9fda4a8aSGary Bisson#include <dt-bindings/input/input.h> 10*9fda4a8aSGary Bisson#include <dt-bindings/input/linux-event-codes.h> 11*9fda4a8aSGary Bisson#include <dt-bindings/interrupt-controller/irq.h> 12*9fda4a8aSGary Bisson#include <dt-bindings/net/microchip-lan78xx.h> 13*9fda4a8aSGary Bisson#include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 14*9fda4a8aSGary Bisson#include <dt-bindings/spmi/spmi.h> 15*9fda4a8aSGary Bisson#include <dt-bindings/usb/pd.h> 16*9fda4a8aSGary Bisson 17*9fda4a8aSGary Bisson/ { 18*9fda4a8aSGary Bisson aliases { 19*9fda4a8aSGary Bisson dsi0 = &disp_dsi0; 20*9fda4a8aSGary Bisson ethernet0 = ð 21*9fda4a8aSGary Bisson i2c0 = &i2c0; 22*9fda4a8aSGary Bisson i2c1 = &i2c1; 23*9fda4a8aSGary Bisson i2c2 = &i2c2; 24*9fda4a8aSGary Bisson i2c3 = &i2c3; 25*9fda4a8aSGary Bisson i2c4 = &i2c4; 26*9fda4a8aSGary Bisson i2c5 = &i2c5; 27*9fda4a8aSGary Bisson i2c6 = &i2c6; 28*9fda4a8aSGary Bisson mmc0 = &mmc0; 29*9fda4a8aSGary Bisson mmc1 = &mmc1; 30*9fda4a8aSGary Bisson mmc2 = &mmc2; 31*9fda4a8aSGary Bisson rtc0 = &rv3028; 32*9fda4a8aSGary Bisson rtc1 = &mt6359rtc; 33*9fda4a8aSGary Bisson serial0 = &uart0; 34*9fda4a8aSGary Bisson }; 35*9fda4a8aSGary Bisson 36*9fda4a8aSGary Bisson backlight_lcd0: backlight-lcd0 { 37*9fda4a8aSGary Bisson compatible = "pwm-backlight"; 38*9fda4a8aSGary Bisson brightness-levels = <0 1023>; 39*9fda4a8aSGary Bisson default-brightness-level = <768>; 40*9fda4a8aSGary Bisson num-interpolated-steps = <1023>; 41*9fda4a8aSGary Bisson enable-gpios = <&pio 30 GPIO_ACTIVE_HIGH>; 42*9fda4a8aSGary Bisson pwms = <&disp_pwm0 0 30000>; 43*9fda4a8aSGary Bisson }; 44*9fda4a8aSGary Bisson 45*9fda4a8aSGary Bisson chosen { 46*9fda4a8aSGary Bisson stdout-path = "serial0:115200n8"; 47*9fda4a8aSGary Bisson }; 48*9fda4a8aSGary Bisson 49*9fda4a8aSGary Bisson firmware { 50*9fda4a8aSGary Bisson optee { 51*9fda4a8aSGary Bisson compatible = "linaro,optee-tz"; 52*9fda4a8aSGary Bisson method = "smc"; 53*9fda4a8aSGary Bisson }; 54*9fda4a8aSGary Bisson }; 55*9fda4a8aSGary Bisson 56*9fda4a8aSGary Bisson memory@40000000 { 57*9fda4a8aSGary Bisson device_type = "memory"; 58*9fda4a8aSGary Bisson reg = <0 0x40000000 0x1 0x00000000>; 59*9fda4a8aSGary Bisson }; 60*9fda4a8aSGary Bisson 61*9fda4a8aSGary Bisson panel-dsi0 { 62*9fda4a8aSGary Bisson compatible = "tianma,tm070jdhg30"; 63*9fda4a8aSGary Bisson backlight = <&backlight_lcd0>; 64*9fda4a8aSGary Bisson power-supply = <®_5v>; 65*9fda4a8aSGary Bisson 66*9fda4a8aSGary Bisson port { 67*9fda4a8aSGary Bisson dsi0_panel_in: endpoint { 68*9fda4a8aSGary Bisson remote-endpoint = <&sn65dsi84_bridge_out>; 69*9fda4a8aSGary Bisson }; 70*9fda4a8aSGary Bisson }; 71*9fda4a8aSGary Bisson }; 72*9fda4a8aSGary Bisson 73*9fda4a8aSGary Bisson reserved-memory { 74*9fda4a8aSGary Bisson #address-cells = <2>; 75*9fda4a8aSGary Bisson #size-cells = <2>; 76*9fda4a8aSGary Bisson ranges; 77*9fda4a8aSGary Bisson 78*9fda4a8aSGary Bisson /* 79*9fda4a8aSGary Bisson * 12 MiB reserved for OP-TEE (BL32) 80*9fda4a8aSGary Bisson * +-----------------------+ 0x43e0_0000 81*9fda4a8aSGary Bisson * | SHMEM 2MiB | 82*9fda4a8aSGary Bisson * +-----------------------+ 0x43c0_0000 83*9fda4a8aSGary Bisson * | | TA_RAM 8MiB | 84*9fda4a8aSGary Bisson * + TZDRAM +--------------+ 0x4340_0000 85*9fda4a8aSGary Bisson * | | TEE_RAM 2MiB | 86*9fda4a8aSGary Bisson * +-----------------------+ 0x4320_0000 87*9fda4a8aSGary Bisson */ 88*9fda4a8aSGary Bisson optee_reserved: optee@43200000 { 89*9fda4a8aSGary Bisson no-map; 90*9fda4a8aSGary Bisson reg = <0 0x43200000 0 0x00c00000>; 91*9fda4a8aSGary Bisson }; 92*9fda4a8aSGary Bisson 93*9fda4a8aSGary Bisson scp_mem: memory@50000000 { 94*9fda4a8aSGary Bisson compatible = "shared-dma-pool"; 95*9fda4a8aSGary Bisson reg = <0 0x50000000 0 0x2900000>; 96*9fda4a8aSGary Bisson no-map; 97*9fda4a8aSGary Bisson }; 98*9fda4a8aSGary Bisson 99*9fda4a8aSGary Bisson /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ 100*9fda4a8aSGary Bisson bl31_secmon_reserved: memory@54600000 { 101*9fda4a8aSGary Bisson no-map; 102*9fda4a8aSGary Bisson reg = <0 0x54600000 0x0 0x200000>; 103*9fda4a8aSGary Bisson }; 104*9fda4a8aSGary Bisson 105*9fda4a8aSGary Bisson apu_mem: memory@55000000 { 106*9fda4a8aSGary Bisson compatible = "shared-dma-pool"; 107*9fda4a8aSGary Bisson reg = <0 0x55000000 0 0x1400000>; /* 20 MB */ 108*9fda4a8aSGary Bisson }; 109*9fda4a8aSGary Bisson 110*9fda4a8aSGary Bisson vpu_mem: memory@57000000 { 111*9fda4a8aSGary Bisson compatible = "shared-dma-pool"; 112*9fda4a8aSGary Bisson reg = <0 0x57000000 0 0x1400000>; /* 20 MB */ 113*9fda4a8aSGary Bisson }; 114*9fda4a8aSGary Bisson 115*9fda4a8aSGary Bisson adsp_mem: memory@60000000 { 116*9fda4a8aSGary Bisson compatible = "shared-dma-pool"; 117*9fda4a8aSGary Bisson reg = <0 0x60000000 0 0xf00000>; 118*9fda4a8aSGary Bisson no-map; 119*9fda4a8aSGary Bisson }; 120*9fda4a8aSGary Bisson 121*9fda4a8aSGary Bisson afe_dma_mem: memory@60f00000 { 122*9fda4a8aSGary Bisson compatible = "shared-dma-pool"; 123*9fda4a8aSGary Bisson reg = <0 0x60f00000 0 0x100000>; 124*9fda4a8aSGary Bisson no-map; 125*9fda4a8aSGary Bisson }; 126*9fda4a8aSGary Bisson 127*9fda4a8aSGary Bisson adsp_dma_mem: memory@61000000 { 128*9fda4a8aSGary Bisson compatible = "shared-dma-pool"; 129*9fda4a8aSGary Bisson reg = <0 0x61000000 0 0x100000>; 130*9fda4a8aSGary Bisson no-map; 131*9fda4a8aSGary Bisson }; 132*9fda4a8aSGary Bisson }; 133*9fda4a8aSGary Bisson 134*9fda4a8aSGary Bisson regulator-efuse { 135*9fda4a8aSGary Bisson compatible = "regulator-output"; 136*9fda4a8aSGary Bisson vout-supply = <&mt6359_vefuse_ldo_reg>; 137*9fda4a8aSGary Bisson }; 138*9fda4a8aSGary Bisson 139*9fda4a8aSGary Bisson reg_1v8: regulator-1v8 { 140*9fda4a8aSGary Bisson compatible = "regulator-fixed"; 141*9fda4a8aSGary Bisson regulator-name = "reg_1v8"; 142*9fda4a8aSGary Bisson regulator-min-microvolt = <1800000>; 143*9fda4a8aSGary Bisson regulator-max-microvolt = <1800000>; 144*9fda4a8aSGary Bisson regulator-always-on; 145*9fda4a8aSGary Bisson }; 146*9fda4a8aSGary Bisson 147*9fda4a8aSGary Bisson reg_3v3: regulator-3v3 { 148*9fda4a8aSGary Bisson compatible = "regulator-fixed"; 149*9fda4a8aSGary Bisson regulator-name = "reg_3v3"; 150*9fda4a8aSGary Bisson regulator-min-microvolt = <3300000>; 151*9fda4a8aSGary Bisson regulator-max-microvolt = <3300000>; 152*9fda4a8aSGary Bisson regulator-always-on; 153*9fda4a8aSGary Bisson }; 154*9fda4a8aSGary Bisson 155*9fda4a8aSGary Bisson reg_5v: regulator-5v { 156*9fda4a8aSGary Bisson compatible = "regulator-fixed"; 157*9fda4a8aSGary Bisson regulator-name = "reg_5v"; 158*9fda4a8aSGary Bisson regulator-min-microvolt = <5000000>; 159*9fda4a8aSGary Bisson regulator-max-microvolt = <5000000>; 160*9fda4a8aSGary Bisson regulator-always-on; 161*9fda4a8aSGary Bisson }; 162*9fda4a8aSGary Bisson 163*9fda4a8aSGary Bisson sdcard_en_3v3: regulator-sdcard-en { 164*9fda4a8aSGary Bisson compatible = "regulator-fixed"; 165*9fda4a8aSGary Bisson regulator-always-on; 166*9fda4a8aSGary Bisson regulator-name = "sdcard_en_3v3"; 167*9fda4a8aSGary Bisson regulator-min-microvolt = <3300000>; 168*9fda4a8aSGary Bisson regulator-max-microvolt = <3300000>; 169*9fda4a8aSGary Bisson gpio = <&pio 111 GPIO_ACTIVE_HIGH>; 170*9fda4a8aSGary Bisson enable-active-high; 171*9fda4a8aSGary Bisson }; 172*9fda4a8aSGary Bisson 173*9fda4a8aSGary Bisson usb_p0_vbus: regulator-usb-p0-vbus { 174*9fda4a8aSGary Bisson compatible = "regulator-fixed"; 175*9fda4a8aSGary Bisson regulator-name = "vbus_p0"; 176*9fda4a8aSGary Bisson regulator-min-microvolt = <5000000>; 177*9fda4a8aSGary Bisson regulator-max-microvolt = <5000000>; 178*9fda4a8aSGary Bisson gpio = <&pio 84 GPIO_ACTIVE_HIGH>; 179*9fda4a8aSGary Bisson enable-active-high; 180*9fda4a8aSGary Bisson }; 181*9fda4a8aSGary Bisson 182*9fda4a8aSGary Bisson usb_p1_vbus: regulator-usb-p1-vbus { 183*9fda4a8aSGary Bisson compatible = "regulator-fixed"; 184*9fda4a8aSGary Bisson pinctrl-names = "default"; 185*9fda4a8aSGary Bisson pinctrl-0 = <&usb1_hub_pins>; 186*9fda4a8aSGary Bisson regulator-name = "vbus_p1"; 187*9fda4a8aSGary Bisson regulator-min-microvolt = <1800000>; 188*9fda4a8aSGary Bisson regulator-max-microvolt = <1800000>; 189*9fda4a8aSGary Bisson gpio = <&pio 147 GPIO_ACTIVE_HIGH>; 190*9fda4a8aSGary Bisson enable-active-high; 191*9fda4a8aSGary Bisson }; 192*9fda4a8aSGary Bisson 193*9fda4a8aSGary Bisson usb_p2_vbus: regulator-usb-p2-vbus { 194*9fda4a8aSGary Bisson compatible = "regulator-fixed"; 195*9fda4a8aSGary Bisson pinctrl-names = "default"; 196*9fda4a8aSGary Bisson pinctrl-0 = <&usb2_eth_pins>; 197*9fda4a8aSGary Bisson regulator-name = "vbus_p2"; 198*9fda4a8aSGary Bisson regulator-min-microvolt = <1800000>; 199*9fda4a8aSGary Bisson regulator-max-microvolt = <1800000>; 200*9fda4a8aSGary Bisson gpio = <&pio 80 GPIO_ACTIVE_HIGH>; 201*9fda4a8aSGary Bisson enable-active-high; 202*9fda4a8aSGary Bisson }; 203*9fda4a8aSGary Bisson 204*9fda4a8aSGary Bisson wifi_pwrseq: wifi-pwrseq { 205*9fda4a8aSGary Bisson compatible = "mmc-pwrseq-simple"; 206*9fda4a8aSGary Bisson pinctrl-names = "default"; 207*9fda4a8aSGary Bisson pinctrl-0 = <&wifi_pwrseq_pins>; 208*9fda4a8aSGary Bisson post-power-on-delay-ms = <200>; 209*9fda4a8aSGary Bisson reset-gpios = <&pio 89 GPIO_ACTIVE_LOW>; 210*9fda4a8aSGary Bisson }; 211*9fda4a8aSGary Bisson}; 212*9fda4a8aSGary Bisson 213*9fda4a8aSGary Bisson&adsp { 214*9fda4a8aSGary Bisson memory-region = <&adsp_dma_mem>, <&adsp_mem>; 215*9fda4a8aSGary Bisson status = "okay"; 216*9fda4a8aSGary Bisson}; 217*9fda4a8aSGary Bisson 218*9fda4a8aSGary Bisson&afe { 219*9fda4a8aSGary Bisson memory-region = <&afe_dma_mem>; 220*9fda4a8aSGary Bisson status = "okay"; 221*9fda4a8aSGary Bisson}; 222*9fda4a8aSGary Bisson 223*9fda4a8aSGary Bisson&cpu0 { 224*9fda4a8aSGary Bisson cpu-supply = <&mt6359_vcore_buck_reg>; 225*9fda4a8aSGary Bisson}; 226*9fda4a8aSGary Bisson 227*9fda4a8aSGary Bisson&cpu1 { 228*9fda4a8aSGary Bisson cpu-supply = <&mt6359_vcore_buck_reg>; 229*9fda4a8aSGary Bisson}; 230*9fda4a8aSGary Bisson 231*9fda4a8aSGary Bisson&cpu2 { 232*9fda4a8aSGary Bisson cpu-supply = <&mt6359_vcore_buck_reg>; 233*9fda4a8aSGary Bisson}; 234*9fda4a8aSGary Bisson 235*9fda4a8aSGary Bisson&cpu3 { 236*9fda4a8aSGary Bisson cpu-supply = <&mt6359_vcore_buck_reg>; 237*9fda4a8aSGary Bisson}; 238*9fda4a8aSGary Bisson 239*9fda4a8aSGary Bisson&cpu6 { 240*9fda4a8aSGary Bisson cpu-supply = <&mt6315_6_vbuck1>; 241*9fda4a8aSGary Bisson}; 242*9fda4a8aSGary Bisson 243*9fda4a8aSGary Bisson&cpu7 { 244*9fda4a8aSGary Bisson cpu-supply = <&mt6315_6_vbuck1>; 245*9fda4a8aSGary Bisson}; 246*9fda4a8aSGary Bisson 247*9fda4a8aSGary Bisson&disp_pwm0 { 248*9fda4a8aSGary Bisson pinctrl-names = "default"; 249*9fda4a8aSGary Bisson pinctrl-0 = <&disp_pwm0_pins>; 250*9fda4a8aSGary Bisson status = "okay"; 251*9fda4a8aSGary Bisson}; 252*9fda4a8aSGary Bisson 253*9fda4a8aSGary Bisson&disp_dsi0 { 254*9fda4a8aSGary Bisson #address-cells = <1>; 255*9fda4a8aSGary Bisson #size-cells = <0>; 256*9fda4a8aSGary Bisson status = "okay"; 257*9fda4a8aSGary Bisson 258*9fda4a8aSGary Bisson ports { 259*9fda4a8aSGary Bisson #address-cells = <1>; 260*9fda4a8aSGary Bisson #size-cells = <0>; 261*9fda4a8aSGary Bisson 262*9fda4a8aSGary Bisson port@0 { 263*9fda4a8aSGary Bisson reg = <0>; 264*9fda4a8aSGary Bisson dsi0_in: endpoint { 265*9fda4a8aSGary Bisson remote-endpoint = <&dither0_out>; 266*9fda4a8aSGary Bisson }; 267*9fda4a8aSGary Bisson }; 268*9fda4a8aSGary Bisson 269*9fda4a8aSGary Bisson port@1 { 270*9fda4a8aSGary Bisson reg = <1>; 271*9fda4a8aSGary Bisson dsi0_out: endpoint { 272*9fda4a8aSGary Bisson remote-endpoint = <&sn65dsi84_bridge_in>; 273*9fda4a8aSGary Bisson }; 274*9fda4a8aSGary Bisson }; 275*9fda4a8aSGary Bisson }; 276*9fda4a8aSGary Bisson}; 277*9fda4a8aSGary Bisson 278*9fda4a8aSGary Bisson&dither0_in { 279*9fda4a8aSGary Bisson remote-endpoint = <&postmask0_out>; 280*9fda4a8aSGary Bisson}; 281*9fda4a8aSGary Bisson 282*9fda4a8aSGary Bisson&dither0_out { 283*9fda4a8aSGary Bisson remote-endpoint = <&dsi0_in>; 284*9fda4a8aSGary Bisson}; 285*9fda4a8aSGary Bisson 286*9fda4a8aSGary Bissonð { 287*9fda4a8aSGary Bisson phy-mode ="rgmii-id"; 288*9fda4a8aSGary Bisson phy-handle = <ðernet_phy0>; 289*9fda4a8aSGary Bisson pinctrl-names = "default", "sleep"; 290*9fda4a8aSGary Bisson pinctrl-0 = <ð_default_pins>; 291*9fda4a8aSGary Bisson pinctrl-1 = <ð_sleep_pins>; 292*9fda4a8aSGary Bisson mediatek,mac-wol; 293*9fda4a8aSGary Bisson snps,reset-gpio = <&pio 27 GPIO_ACTIVE_LOW>; 294*9fda4a8aSGary Bisson snps,reset-active-low; 295*9fda4a8aSGary Bisson snps,reset-delays-us = <0 11000 1000>; 296*9fda4a8aSGary Bisson status = "okay"; 297*9fda4a8aSGary Bisson}; 298*9fda4a8aSGary Bisson 299*9fda4a8aSGary Bissonð_mdio { 300*9fda4a8aSGary Bisson ethernet_phy0: ethernet-phy@7 { 301*9fda4a8aSGary Bisson compatible = "ethernet-phy-ieee802.3-c22"; 302*9fda4a8aSGary Bisson reg = <0x7>; 303*9fda4a8aSGary Bisson interrupts-extended = <&pio 148 IRQ_TYPE_LEVEL_LOW>; 304*9fda4a8aSGary Bisson }; 305*9fda4a8aSGary Bisson}; 306*9fda4a8aSGary Bisson 307*9fda4a8aSGary Bisson&gamma0_out { 308*9fda4a8aSGary Bisson remote-endpoint = <&postmask0_in>; 309*9fda4a8aSGary Bisson}; 310*9fda4a8aSGary Bisson 311*9fda4a8aSGary Bisson&gpu { 312*9fda4a8aSGary Bisson mali-supply = <&mt6359_vproc2_buck_reg>; 313*9fda4a8aSGary Bisson status = "okay"; 314*9fda4a8aSGary Bisson}; 315*9fda4a8aSGary Bisson 316*9fda4a8aSGary Bisson&i2c0 { 317*9fda4a8aSGary Bisson pinctrl-names = "default"; 318*9fda4a8aSGary Bisson pinctrl-0 = <&i2c0_pins>; 319*9fda4a8aSGary Bisson clock-frequency = <100000>; 320*9fda4a8aSGary Bisson status = "okay"; 321*9fda4a8aSGary Bisson 322*9fda4a8aSGary Bisson i2c-mux@73 { 323*9fda4a8aSGary Bisson compatible = "nxp,pca9546"; 324*9fda4a8aSGary Bisson reg = <0x73>; 325*9fda4a8aSGary Bisson pinctrl-names = "default"; 326*9fda4a8aSGary Bisson pinctrl-0 = <&i2c0_mux_pins>; 327*9fda4a8aSGary Bisson reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>; 328*9fda4a8aSGary Bisson #address-cells = <1>; 329*9fda4a8aSGary Bisson #size-cells = <0>; 330*9fda4a8aSGary Bisson 331*9fda4a8aSGary Bisson i2c_mux_gp_0: i2c@0 { 332*9fda4a8aSGary Bisson reg = <0>; 333*9fda4a8aSGary Bisson clock-frequency = <100000>; 334*9fda4a8aSGary Bisson #address-cells = <1>; 335*9fda4a8aSGary Bisson #size-cells = <0>; 336*9fda4a8aSGary Bisson }; 337*9fda4a8aSGary Bisson 338*9fda4a8aSGary Bisson i2c_mux_gp_1: i2c@1 { 339*9fda4a8aSGary Bisson reg = <1>; 340*9fda4a8aSGary Bisson clock-frequency = <100000>; 341*9fda4a8aSGary Bisson #address-cells = <1>; 342*9fda4a8aSGary Bisson #size-cells = <0>; 343*9fda4a8aSGary Bisson }; 344*9fda4a8aSGary Bisson 345*9fda4a8aSGary Bisson i2c_mux_gp_2: i2c@2 { 346*9fda4a8aSGary Bisson reg = <2>; 347*9fda4a8aSGary Bisson clock-frequency = <100000>; 348*9fda4a8aSGary Bisson #address-cells = <1>; 349*9fda4a8aSGary Bisson #size-cells = <0>; 350*9fda4a8aSGary Bisson }; 351*9fda4a8aSGary Bisson 352*9fda4a8aSGary Bisson i2c_mux_gp_3: i2c@3 { 353*9fda4a8aSGary Bisson reg = <3>; 354*9fda4a8aSGary Bisson clock-frequency = <100000>; 355*9fda4a8aSGary Bisson #address-cells = <1>; 356*9fda4a8aSGary Bisson #size-cells = <0>; 357*9fda4a8aSGary Bisson }; 358*9fda4a8aSGary Bisson }; 359*9fda4a8aSGary Bisson}; 360*9fda4a8aSGary Bisson 361*9fda4a8aSGary Bisson&i2c1 { 362*9fda4a8aSGary Bisson pinctrl-names = "default"; 363*9fda4a8aSGary Bisson pinctrl-0 = <&i2c1_pins>; 364*9fda4a8aSGary Bisson clock-frequency = <400000>; 365*9fda4a8aSGary Bisson status = "okay"; 366*9fda4a8aSGary Bisson}; 367*9fda4a8aSGary Bisson 368*9fda4a8aSGary Bisson&i2c2 { 369*9fda4a8aSGary Bisson pinctrl-names = "default"; 370*9fda4a8aSGary Bisson pinctrl-0 = <&i2c2_pins>; 371*9fda4a8aSGary Bisson clock-frequency = <400000>; 372*9fda4a8aSGary Bisson status = "okay"; 373*9fda4a8aSGary Bisson 374*9fda4a8aSGary Bisson i2c-mux@73 { 375*9fda4a8aSGary Bisson compatible = "nxp,pca9546"; 376*9fda4a8aSGary Bisson reg = <0x73>; 377*9fda4a8aSGary Bisson pinctrl-names = "default"; 378*9fda4a8aSGary Bisson pinctrl-0 = <&i2c_mux_smarc_lcd_pins>; 379*9fda4a8aSGary Bisson reset-gpios = <&pio 5 GPIO_ACTIVE_LOW>; 380*9fda4a8aSGary Bisson #address-cells = <1>; 381*9fda4a8aSGary Bisson #size-cells = <0>; 382*9fda4a8aSGary Bisson 383*9fda4a8aSGary Bisson i2c_mux_lcd_0: i2c@0 { 384*9fda4a8aSGary Bisson reg = <0>; 385*9fda4a8aSGary Bisson clock-frequency = <100000>; 386*9fda4a8aSGary Bisson #address-cells = <1>; 387*9fda4a8aSGary Bisson #size-cells = <0>; 388*9fda4a8aSGary Bisson }; 389*9fda4a8aSGary Bisson 390*9fda4a8aSGary Bisson i2c_mux_lcd_1: i2c@1 { 391*9fda4a8aSGary Bisson reg = <1>; 392*9fda4a8aSGary Bisson clock-frequency = <100000>; 393*9fda4a8aSGary Bisson #address-cells = <1>; 394*9fda4a8aSGary Bisson #size-cells = <0>; 395*9fda4a8aSGary Bisson }; 396*9fda4a8aSGary Bisson 397*9fda4a8aSGary Bisson i2c_mux_lcd_2: i2c@2 { 398*9fda4a8aSGary Bisson reg = <2>; 399*9fda4a8aSGary Bisson clock-frequency = <100000>; 400*9fda4a8aSGary Bisson #address-cells = <1>; 401*9fda4a8aSGary Bisson #size-cells = <0>; 402*9fda4a8aSGary Bisson }; 403*9fda4a8aSGary Bisson 404*9fda4a8aSGary Bisson i2c_mux_lcd_3: i2c@3 { 405*9fda4a8aSGary Bisson reg = <3>; 406*9fda4a8aSGary Bisson clock-frequency = <100000>; 407*9fda4a8aSGary Bisson #address-cells = <1>; 408*9fda4a8aSGary Bisson #size-cells = <0>; 409*9fda4a8aSGary Bisson }; 410*9fda4a8aSGary Bisson }; 411*9fda4a8aSGary Bisson}; 412*9fda4a8aSGary Bisson 413*9fda4a8aSGary Bisson&i2c3 { 414*9fda4a8aSGary Bisson pinctrl-names = "default"; 415*9fda4a8aSGary Bisson pinctrl-0 = <&i2c3_pins>; 416*9fda4a8aSGary Bisson clock-frequency = <400000>; 417*9fda4a8aSGary Bisson status = "okay"; 418*9fda4a8aSGary Bisson}; 419*9fda4a8aSGary Bisson 420*9fda4a8aSGary Bisson&i2c4 { 421*9fda4a8aSGary Bisson pinctrl-names = "default"; 422*9fda4a8aSGary Bisson pinctrl-0 = <&i2c4_pins>; 423*9fda4a8aSGary Bisson clock-frequency = <400000>; 424*9fda4a8aSGary Bisson status = "okay"; 425*9fda4a8aSGary Bisson}; 426*9fda4a8aSGary Bisson 427*9fda4a8aSGary Bisson&i2c_mux_gp_0 { 428*9fda4a8aSGary Bisson rv3028: rtc@52 { 429*9fda4a8aSGary Bisson compatible = "microcrystal,rv3028"; 430*9fda4a8aSGary Bisson reg = <0x52>; 431*9fda4a8aSGary Bisson interrupts-extended = <&pio 42 IRQ_TYPE_LEVEL_LOW>; 432*9fda4a8aSGary Bisson pinctrl-names = "default"; 433*9fda4a8aSGary Bisson pinctrl-0 = <&rv3028_pins>; 434*9fda4a8aSGary Bisson #clock-cells = <0>; 435*9fda4a8aSGary Bisson wakeup-source; 436*9fda4a8aSGary Bisson }; 437*9fda4a8aSGary Bisson}; 438*9fda4a8aSGary Bisson 439*9fda4a8aSGary Bisson&i2c_mux_gp_1 { 440*9fda4a8aSGary Bisson usb-typec@60 { 441*9fda4a8aSGary Bisson compatible = "ti,hd3ss3220"; 442*9fda4a8aSGary Bisson reg = <0x60>; 443*9fda4a8aSGary Bisson interrupts-extended = <&pio 45 IRQ_TYPE_LEVEL_LOW>; 444*9fda4a8aSGary Bisson pinctrl-names = "default"; 445*9fda4a8aSGary Bisson pinctrl-0 = <&hd3ss3220_pins>; 446*9fda4a8aSGary Bisson 447*9fda4a8aSGary Bisson ports { 448*9fda4a8aSGary Bisson #address-cells = <1>; 449*9fda4a8aSGary Bisson #size-cells = <0>; 450*9fda4a8aSGary Bisson 451*9fda4a8aSGary Bisson port@0 { 452*9fda4a8aSGary Bisson reg = <0>; 453*9fda4a8aSGary Bisson hd3ss3220_in_ep: endpoint { 454*9fda4a8aSGary Bisson remote-endpoint = <&ss_ep>; 455*9fda4a8aSGary Bisson }; 456*9fda4a8aSGary Bisson }; 457*9fda4a8aSGary Bisson 458*9fda4a8aSGary Bisson port@1 { 459*9fda4a8aSGary Bisson reg = <1>; 460*9fda4a8aSGary Bisson hd3ss3220_out_ep: endpoint { 461*9fda4a8aSGary Bisson remote-endpoint = <&usb_role_switch>; 462*9fda4a8aSGary Bisson }; 463*9fda4a8aSGary Bisson }; 464*9fda4a8aSGary Bisson }; 465*9fda4a8aSGary Bisson }; 466*9fda4a8aSGary Bisson}; 467*9fda4a8aSGary Bisson 468*9fda4a8aSGary Bisson&i2c_mux_gp_2 { 469*9fda4a8aSGary Bisson codec@1a { 470*9fda4a8aSGary Bisson compatible = "wlf,wm8962"; 471*9fda4a8aSGary Bisson reg = <0x1a>; 472*9fda4a8aSGary Bisson clocks = <&topckgen CLK_TOP_I2SO1>; 473*9fda4a8aSGary Bisson AVDD-supply = <®_1v8>; 474*9fda4a8aSGary Bisson CPVDD-supply = <®_1v8>; 475*9fda4a8aSGary Bisson DBVDD-supply = <®_3v3>; 476*9fda4a8aSGary Bisson DCVDD-supply = <®_1v8>; 477*9fda4a8aSGary Bisson MICVDD-supply = <®_3v3>; 478*9fda4a8aSGary Bisson PLLVDD-supply = <®_1v8>; 479*9fda4a8aSGary Bisson SPKVDD1-supply = <®_5v>; 480*9fda4a8aSGary Bisson SPKVDD2-supply = <®_5v>; 481*9fda4a8aSGary Bisson gpio-cfg = < 482*9fda4a8aSGary Bisson 0x0000 /* n/c */ 483*9fda4a8aSGary Bisson 0x0000 /* gpio2: */ 484*9fda4a8aSGary Bisson 0x0000 /* gpio3: */ 485*9fda4a8aSGary Bisson 0x0000 /* n/c */ 486*9fda4a8aSGary Bisson 0x8081 /* gpio5:HP detect */ 487*9fda4a8aSGary Bisson 0x8095 /* gpio6:Mic detect */ 488*9fda4a8aSGary Bisson >; 489*9fda4a8aSGary Bisson }; 490*9fda4a8aSGary Bisson}; 491*9fda4a8aSGary Bisson 492*9fda4a8aSGary Bisson&i2c_mux_lcd_2 { 493*9fda4a8aSGary Bisson bridge@2c { 494*9fda4a8aSGary Bisson compatible = "ti,sn65dsi84"; 495*9fda4a8aSGary Bisson reg = <0x2c>; 496*9fda4a8aSGary Bisson pinctrl-names = "default"; 497*9fda4a8aSGary Bisson pinctrl-0 = <&dsi0_sn65dsi84_pins>; 498*9fda4a8aSGary Bisson enable-gpios = <&pio 25 GPIO_ACTIVE_HIGH>; 499*9fda4a8aSGary Bisson 500*9fda4a8aSGary Bisson ports { 501*9fda4a8aSGary Bisson #address-cells = <1>; 502*9fda4a8aSGary Bisson #size-cells = <0>; 503*9fda4a8aSGary Bisson 504*9fda4a8aSGary Bisson port@0 { 505*9fda4a8aSGary Bisson reg = <0>; 506*9fda4a8aSGary Bisson 507*9fda4a8aSGary Bisson sn65dsi84_bridge_in: endpoint { 508*9fda4a8aSGary Bisson remote-endpoint = <&dsi0_out>; 509*9fda4a8aSGary Bisson data-lanes = <1 2 3 4>; 510*9fda4a8aSGary Bisson }; 511*9fda4a8aSGary Bisson }; 512*9fda4a8aSGary Bisson 513*9fda4a8aSGary Bisson port@2 { 514*9fda4a8aSGary Bisson reg = <2>; 515*9fda4a8aSGary Bisson 516*9fda4a8aSGary Bisson sn65dsi84_bridge_out: endpoint { 517*9fda4a8aSGary Bisson remote-endpoint = <&dsi0_panel_in>; 518*9fda4a8aSGary Bisson }; 519*9fda4a8aSGary Bisson }; 520*9fda4a8aSGary Bisson }; 521*9fda4a8aSGary Bisson }; 522*9fda4a8aSGary Bisson 523*9fda4a8aSGary Bisson touchscren@5d { 524*9fda4a8aSGary Bisson compatible = "goodix,gt911"; 525*9fda4a8aSGary Bisson reg = <0x5d>; 526*9fda4a8aSGary Bisson pinctrl-names = "default"; 527*9fda4a8aSGary Bisson pinctrl-0 = <&ts_dsi0_goodix_pins>; 528*9fda4a8aSGary Bisson interrupts-extended = <&pio 146 IRQ_TYPE_LEVEL_HIGH>; 529*9fda4a8aSGary Bisson irq-gpios = <&pio 146 GPIO_ACTIVE_HIGH>; 530*9fda4a8aSGary Bisson reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; 531*9fda4a8aSGary Bisson }; 532*9fda4a8aSGary Bisson}; 533*9fda4a8aSGary Bisson 534*9fda4a8aSGary Bisson&mfg0 { 535*9fda4a8aSGary Bisson domain-supply = <&mt6359_vproc2_buck_reg>; 536*9fda4a8aSGary Bisson}; 537*9fda4a8aSGary Bisson 538*9fda4a8aSGary Bisson&mfg1 { 539*9fda4a8aSGary Bisson domain-supply = <&mt6359_vsram_others_ldo_reg>; 540*9fda4a8aSGary Bisson}; 541*9fda4a8aSGary Bisson 542*9fda4a8aSGary Bisson&mmc0 { 543*9fda4a8aSGary Bisson bus-width = <8>; 544*9fda4a8aSGary Bisson cap-mmc-highspeed; 545*9fda4a8aSGary Bisson cap-mmc-hw-reset; 546*9fda4a8aSGary Bisson hs400-ds-delay = <0x1481b>; 547*9fda4a8aSGary Bisson max-frequency = <200000000>; 548*9fda4a8aSGary Bisson mmc-hs200-1_8v; 549*9fda4a8aSGary Bisson mmc-hs400-1_8v; 550*9fda4a8aSGary Bisson non-removable; 551*9fda4a8aSGary Bisson no-sd; 552*9fda4a8aSGary Bisson no-sdio; 553*9fda4a8aSGary Bisson supports-cqe; 554*9fda4a8aSGary Bisson pinctrl-names = "default", "state_uhs"; 555*9fda4a8aSGary Bisson pinctrl-0 = <&mmc0_default_pins>; 556*9fda4a8aSGary Bisson pinctrl-1 = <&mmc0_uhs_pins>; 557*9fda4a8aSGary Bisson vmmc-supply = <&mt6359_vemc_1_ldo_reg>; 558*9fda4a8aSGary Bisson vqmmc-supply = <&mt6359_vufs_ldo_reg>; 559*9fda4a8aSGary Bisson status = "okay"; 560*9fda4a8aSGary Bisson}; 561*9fda4a8aSGary Bisson 562*9fda4a8aSGary Bisson&mmc1 { 563*9fda4a8aSGary Bisson bus-width = <4>; 564*9fda4a8aSGary Bisson cap-sd-highspeed; 565*9fda4a8aSGary Bisson max-frequency = <200000000>; 566*9fda4a8aSGary Bisson sd-uhs-sdr104; 567*9fda4a8aSGary Bisson sd-uhs-sdr50; 568*9fda4a8aSGary Bisson pinctrl-names = "default", "state_uhs"; 569*9fda4a8aSGary Bisson pinctrl-0 = <&mmc1_default_pins>; 570*9fda4a8aSGary Bisson pinctrl-1 = <&mmc1_uhs_pins>; 571*9fda4a8aSGary Bisson cd-gpios = <&pio 2 GPIO_ACTIVE_LOW>; 572*9fda4a8aSGary Bisson vqmmc-supply = <&mt6359_vsim1_ldo_reg>; 573*9fda4a8aSGary Bisson vmmc-supply = <&sdcard_en_3v3>; 574*9fda4a8aSGary Bisson status = "okay"; 575*9fda4a8aSGary Bisson}; 576*9fda4a8aSGary Bisson 577*9fda4a8aSGary Bisson&mmc2 { 578*9fda4a8aSGary Bisson bus-width = <4>; 579*9fda4a8aSGary Bisson cap-sd-highspeed; 580*9fda4a8aSGary Bisson cap-sdio-irq; 581*9fda4a8aSGary Bisson keep-power-in-suspend; 582*9fda4a8aSGary Bisson max-frequency = <200000000>; 583*9fda4a8aSGary Bisson no-mmc; 584*9fda4a8aSGary Bisson non-removable; 585*9fda4a8aSGary Bisson no-sd; 586*9fda4a8aSGary Bisson sd-uhs-sdr104; 587*9fda4a8aSGary Bisson wakeup-source; 588*9fda4a8aSGary Bisson pinctrl-names = "default", "state_uhs", "state_eint"; 589*9fda4a8aSGary Bisson pinctrl-0 = <&mmc2_default_pins>; 590*9fda4a8aSGary Bisson pinctrl-1 = <&mmc2_uhs_pins>; 591*9fda4a8aSGary Bisson pinctrl-2 = <&mmc2_eint_pins>; 592*9fda4a8aSGary Bisson interrupt-names = "msdc", "sdio_wakeup"; 593*9fda4a8aSGary Bisson interrupts-extended = <&gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>, 594*9fda4a8aSGary Bisson <&pio 172 IRQ_TYPE_LEVEL_LOW>; 595*9fda4a8aSGary Bisson vmmc-supply = <&mt6359_vcn33_2_bt_ldo_reg>; 596*9fda4a8aSGary Bisson vqmmc-supply = <&mt6359_vcn18_ldo_reg>; 597*9fda4a8aSGary Bisson mmc-pwrseq = <&wifi_pwrseq>; 598*9fda4a8aSGary Bisson status = "okay"; 599*9fda4a8aSGary Bisson}; 600*9fda4a8aSGary Bisson 601*9fda4a8aSGary Bisson&mipi_tx_config0 { 602*9fda4a8aSGary Bisson status = "okay"; 603*9fda4a8aSGary Bisson}; 604*9fda4a8aSGary Bisson 605*9fda4a8aSGary Bisson&mt6359codec { 606*9fda4a8aSGary Bisson mediatek,mic-type-0 = <1>; 607*9fda4a8aSGary Bisson mediatek,mic-type-1 = <3>; 608*9fda4a8aSGary Bisson}; 609*9fda4a8aSGary Bisson 610*9fda4a8aSGary Bisson&mt6359_vbbck_ldo_reg { 611*9fda4a8aSGary Bisson regulator-always-on; 612*9fda4a8aSGary Bisson}; 613*9fda4a8aSGary Bisson 614*9fda4a8aSGary Bisson&mt6359_vcn18_ldo_reg { 615*9fda4a8aSGary Bisson regulator-name = "vcn18_pmu"; 616*9fda4a8aSGary Bisson regulator-always-on; 617*9fda4a8aSGary Bisson regulator-boot-on; 618*9fda4a8aSGary Bisson}; 619*9fda4a8aSGary Bisson 620*9fda4a8aSGary Bisson&mt6359_vcn33_1_bt_ldo_reg { 621*9fda4a8aSGary Bisson regulator-name = "vcn33_1_pmu"; 622*9fda4a8aSGary Bisson regulator-always-on; 623*9fda4a8aSGary Bisson}; 624*9fda4a8aSGary Bisson 625*9fda4a8aSGary Bisson&mt6359_vcn33_2_bt_ldo_reg { 626*9fda4a8aSGary Bisson regulator-name = "vcn33_2_pmu"; 627*9fda4a8aSGary Bisson regulator-min-microvolt = <3300000>; 628*9fda4a8aSGary Bisson regulator-max-microvolt = <3300000>; 629*9fda4a8aSGary Bisson regulator-always-on; 630*9fda4a8aSGary Bisson regulator-boot-on; 631*9fda4a8aSGary Bisson}; 632*9fda4a8aSGary Bisson 633*9fda4a8aSGary Bisson&mt6359_vcore_buck_reg { 634*9fda4a8aSGary Bisson regulator-name = "dvdd_proc_l"; 635*9fda4a8aSGary Bisson regulator-always-on; 636*9fda4a8aSGary Bisson}; 637*9fda4a8aSGary Bisson 638*9fda4a8aSGary Bisson&mt6359_vemc_1_ldo_reg { 639*9fda4a8aSGary Bisson regulator-always-on; 640*9fda4a8aSGary Bisson}; 641*9fda4a8aSGary Bisson 642*9fda4a8aSGary Bisson&mt6359_vgpu11_buck_reg { 643*9fda4a8aSGary Bisson regulator-name = "dvdd_core"; 644*9fda4a8aSGary Bisson regulator-always-on; 645*9fda4a8aSGary Bisson}; 646*9fda4a8aSGary Bisson 647*9fda4a8aSGary Bisson&mt6359_vmodem_buck_reg { 648*9fda4a8aSGary Bisson regulator-always-on; 649*9fda4a8aSGary Bisson}; 650*9fda4a8aSGary Bisson 651*9fda4a8aSGary Bisson&mt6359_vpa_buck_reg { 652*9fda4a8aSGary Bisson regulator-name = "vpa_pmu"; 653*9fda4a8aSGary Bisson regulator-always-on; 654*9fda4a8aSGary Bisson}; 655*9fda4a8aSGary Bisson 656*9fda4a8aSGary Bisson&mt6359_vproc2_buck_reg { 657*9fda4a8aSGary Bisson /* The name "vgpu" is required by mtk-regulator-coupler */ 658*9fda4a8aSGary Bisson regulator-name = "vgpu"; 659*9fda4a8aSGary Bisson regulator-min-microvolt = <550000>; 660*9fda4a8aSGary Bisson regulator-max-microvolt = <800000>; 661*9fda4a8aSGary Bisson regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>; 662*9fda4a8aSGary Bisson regulator-coupled-max-spread = <225000>; 663*9fda4a8aSGary Bisson}; 664*9fda4a8aSGary Bisson 665*9fda4a8aSGary Bisson&mt6359_vs2_buck_reg { 666*9fda4a8aSGary Bisson regulator-min-microvolt = <1600000>; 667*9fda4a8aSGary Bisson regulator-boot-on; 668*9fda4a8aSGary Bisson}; 669*9fda4a8aSGary Bisson 670*9fda4a8aSGary Bisson&mt6359_vpu_buck_reg { 671*9fda4a8aSGary Bisson regulator-name = "dvdd_adsp"; 672*9fda4a8aSGary Bisson regulator-always-on; 673*9fda4a8aSGary Bisson}; 674*9fda4a8aSGary Bisson 675*9fda4a8aSGary Bisson&mt6359_vrf12_ldo_reg { 676*9fda4a8aSGary Bisson regulator-name = "va12_abb2_pmu"; 677*9fda4a8aSGary Bisson regulator-always-on; 678*9fda4a8aSGary Bisson}; 679*9fda4a8aSGary Bisson 680*9fda4a8aSGary Bisson&mt6359_vsram_md_ldo_reg { 681*9fda4a8aSGary Bisson regulator-always-on; 682*9fda4a8aSGary Bisson}; 683*9fda4a8aSGary Bisson 684*9fda4a8aSGary Bisson&mt6359_vsram_others_ldo_reg { 685*9fda4a8aSGary Bisson /* The name "vsram_gpu" is required by mtk-regulator-coupler */ 686*9fda4a8aSGary Bisson regulator-name = "vsram_gpu"; 687*9fda4a8aSGary Bisson regulator-min-microvolt = <750000>; 688*9fda4a8aSGary Bisson regulator-max-microvolt = <800000>; 689*9fda4a8aSGary Bisson regulator-coupled-with = <&mt6359_vproc2_buck_reg>; 690*9fda4a8aSGary Bisson regulator-coupled-max-spread = <225000>; 691*9fda4a8aSGary Bisson}; 692*9fda4a8aSGary Bisson 693*9fda4a8aSGary Bisson&mt6359_vsim1_ldo_reg { 694*9fda4a8aSGary Bisson regulator-name = "vsim1_pmu"; 695*9fda4a8aSGary Bisson regulator-max-microvolt = <1800000>; 696*9fda4a8aSGary Bisson regulator-enable-ramp-delay = <480>; 697*9fda4a8aSGary Bisson}; 698*9fda4a8aSGary Bisson 699*9fda4a8aSGary Bisson&mt6359_vufs_ldo_reg { 700*9fda4a8aSGary Bisson regulator-name = "vufs18_pmu"; 701*9fda4a8aSGary Bisson regulator-always-on; 702*9fda4a8aSGary Bisson}; 703*9fda4a8aSGary Bisson 704*9fda4a8aSGary Bisson&ovl0_in { 705*9fda4a8aSGary Bisson remote-endpoint = <&vdosys0_ep_main>; 706*9fda4a8aSGary Bisson}; 707*9fda4a8aSGary Bisson 708*9fda4a8aSGary Bisson&pcie { 709*9fda4a8aSGary Bisson pinctrl-names = "default"; 710*9fda4a8aSGary Bisson pinctrl-0 = <&pcie_default_pins>; 711*9fda4a8aSGary Bisson status = "okay"; 712*9fda4a8aSGary Bisson}; 713*9fda4a8aSGary Bisson 714*9fda4a8aSGary Bisson&pciephy { 715*9fda4a8aSGary Bisson status = "okay"; 716*9fda4a8aSGary Bisson}; 717*9fda4a8aSGary Bisson 718*9fda4a8aSGary Bisson&pmic { 719*9fda4a8aSGary Bisson interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; 720*9fda4a8aSGary Bisson 721*9fda4a8aSGary Bisson keys { 722*9fda4a8aSGary Bisson compatible = "mediatek,mt6359-keys"; 723*9fda4a8aSGary Bisson mediatek,long-press-mode = <1>; 724*9fda4a8aSGary Bisson power-off-time-sec = <0>; 725*9fda4a8aSGary Bisson 726*9fda4a8aSGary Bisson power-key { 727*9fda4a8aSGary Bisson linux,keycodes = <KEY_POWER>; 728*9fda4a8aSGary Bisson wakeup-source; 729*9fda4a8aSGary Bisson }; 730*9fda4a8aSGary Bisson }; 731*9fda4a8aSGary Bisson}; 732*9fda4a8aSGary Bisson 733*9fda4a8aSGary Bisson&postmask0_in { 734*9fda4a8aSGary Bisson remote-endpoint = <&gamma0_out>; 735*9fda4a8aSGary Bisson}; 736*9fda4a8aSGary Bisson 737*9fda4a8aSGary Bisson&postmask0_out { 738*9fda4a8aSGary Bisson remote-endpoint = <&dither0_in>; 739*9fda4a8aSGary Bisson}; 740*9fda4a8aSGary Bisson 741*9fda4a8aSGary Bisson&scp_cluster { 742*9fda4a8aSGary Bisson status = "okay"; 743*9fda4a8aSGary Bisson}; 744*9fda4a8aSGary Bisson 745*9fda4a8aSGary Bisson&scp_c0 { 746*9fda4a8aSGary Bisson memory-region = <&scp_mem>; 747*9fda4a8aSGary Bisson status = "okay"; 748*9fda4a8aSGary Bisson}; 749*9fda4a8aSGary Bisson 750*9fda4a8aSGary Bisson&spi0 { 751*9fda4a8aSGary Bisson pinctrl-0 = <&spi0_pins>; 752*9fda4a8aSGary Bisson pinctrl-names = "default"; 753*9fda4a8aSGary Bisson mediatek,pad-select = <0>; 754*9fda4a8aSGary Bisson status = "okay"; 755*9fda4a8aSGary Bisson}; 756*9fda4a8aSGary Bisson 757*9fda4a8aSGary Bisson&spi1 { 758*9fda4a8aSGary Bisson pinctrl-0 = <&spi1_pins>; 759*9fda4a8aSGary Bisson pinctrl-names = "default"; 760*9fda4a8aSGary Bisson mediatek,pad-select = <0>; 761*9fda4a8aSGary Bisson status = "okay"; 762*9fda4a8aSGary Bisson}; 763*9fda4a8aSGary Bisson 764*9fda4a8aSGary Bisson&spmi { 765*9fda4a8aSGary Bisson #address-cells = <2>; 766*9fda4a8aSGary Bisson #size-cells = <0>; 767*9fda4a8aSGary Bisson 768*9fda4a8aSGary Bisson mt6315_6: pmic@6 { 769*9fda4a8aSGary Bisson compatible = "mediatek,mt6315-regulator"; 770*9fda4a8aSGary Bisson reg = <0x6 SPMI_USID>; 771*9fda4a8aSGary Bisson 772*9fda4a8aSGary Bisson regulators { 773*9fda4a8aSGary Bisson mt6315_6_vbuck1: vbuck1 { 774*9fda4a8aSGary Bisson regulator-name = "vbuck1"; 775*9fda4a8aSGary Bisson regulator-min-microvolt = <300000>; 776*9fda4a8aSGary Bisson regulator-max-microvolt = <1193750>; 777*9fda4a8aSGary Bisson regulator-enable-ramp-delay = <256>; 778*9fda4a8aSGary Bisson regulator-allowed-modes = <0 1 2>; 779*9fda4a8aSGary Bisson regulator-always-on; 780*9fda4a8aSGary Bisson }; 781*9fda4a8aSGary Bisson 782*9fda4a8aSGary Bisson mt6315_6_vbuck3: vbuck3 { 783*9fda4a8aSGary Bisson regulator-name = "vbuck3"; 784*9fda4a8aSGary Bisson regulator-min-microvolt = <300000>; 785*9fda4a8aSGary Bisson regulator-max-microvolt = <1193750>; 786*9fda4a8aSGary Bisson regulator-enable-ramp-delay = <256>; 787*9fda4a8aSGary Bisson regulator-allowed-modes = <0 1 2>; 788*9fda4a8aSGary Bisson regulator-always-on; 789*9fda4a8aSGary Bisson }; 790*9fda4a8aSGary Bisson 791*9fda4a8aSGary Bisson mt6315_6_vbuck4: vbuck4 { 792*9fda4a8aSGary Bisson regulator-name = "vbuck4"; 793*9fda4a8aSGary Bisson regulator-min-microvolt = <1193750>; 794*9fda4a8aSGary Bisson regulator-max-microvolt = <1193750>; 795*9fda4a8aSGary Bisson regulator-enable-ramp-delay = <256>; 796*9fda4a8aSGary Bisson regulator-allowed-modes = <0 1 2>; 797*9fda4a8aSGary Bisson regulator-always-on; 798*9fda4a8aSGary Bisson 799*9fda4a8aSGary Bisson regulator-state-mem { 800*9fda4a8aSGary Bisson regulator-on-in-suspend; 801*9fda4a8aSGary Bisson regulator-suspend-microvolt = <1193750>; 802*9fda4a8aSGary Bisson }; 803*9fda4a8aSGary Bisson }; 804*9fda4a8aSGary Bisson }; 805*9fda4a8aSGary Bisson }; 806*9fda4a8aSGary Bisson}; 807*9fda4a8aSGary Bisson 808*9fda4a8aSGary Bisson&uart0 { 809*9fda4a8aSGary Bisson pinctrl-0 = <&uart0_pins>; 810*9fda4a8aSGary Bisson pinctrl-names = "default"; 811*9fda4a8aSGary Bisson status = "okay"; 812*9fda4a8aSGary Bisson}; 813*9fda4a8aSGary Bisson 814*9fda4a8aSGary Bisson&uart1 { 815*9fda4a8aSGary Bisson pinctrl-0 = <&uart1_pins>; 816*9fda4a8aSGary Bisson pinctrl-names = "default"; 817*9fda4a8aSGary Bisson status = "okay"; 818*9fda4a8aSGary Bisson}; 819*9fda4a8aSGary Bisson 820*9fda4a8aSGary Bisson&uart2 { 821*9fda4a8aSGary Bisson pinctrl-0 = <&uart2_pins>; 822*9fda4a8aSGary Bisson pinctrl-names = "default"; 823*9fda4a8aSGary Bisson status = "okay"; 824*9fda4a8aSGary Bisson}; 825*9fda4a8aSGary Bisson 826*9fda4a8aSGary Bisson&ssusb0 { 827*9fda4a8aSGary Bisson dr_mode = "otg"; 828*9fda4a8aSGary Bisson maximum-speed = "high-speed"; 829*9fda4a8aSGary Bisson usb-role-switch; 830*9fda4a8aSGary Bisson wakeup-source; 831*9fda4a8aSGary Bisson vusb33-supply = <&mt6359_vusb_ldo_reg>; 832*9fda4a8aSGary Bisson pinctrl-0 = <&usbotg_pins>; 833*9fda4a8aSGary Bisson pinctrl-names = "default"; 834*9fda4a8aSGary Bisson status = "okay"; 835*9fda4a8aSGary Bisson 836*9fda4a8aSGary Bisson connector { 837*9fda4a8aSGary Bisson compatible = "usb-c-connector"; 838*9fda4a8aSGary Bisson label = "USB-C"; 839*9fda4a8aSGary Bisson data-role = "dual"; 840*9fda4a8aSGary Bisson 841*9fda4a8aSGary Bisson ports { 842*9fda4a8aSGary Bisson #address-cells = <1>; 843*9fda4a8aSGary Bisson #size-cells = <0>; 844*9fda4a8aSGary Bisson 845*9fda4a8aSGary Bisson port@0 { 846*9fda4a8aSGary Bisson reg = <0>; 847*9fda4a8aSGary Bisson hs_ep: endpoint { 848*9fda4a8aSGary Bisson remote-endpoint = <&usb_hs_ep>; 849*9fda4a8aSGary Bisson }; 850*9fda4a8aSGary Bisson }; 851*9fda4a8aSGary Bisson 852*9fda4a8aSGary Bisson port@1 { 853*9fda4a8aSGary Bisson reg = <1>; 854*9fda4a8aSGary Bisson ss_ep: endpoint { 855*9fda4a8aSGary Bisson remote-endpoint = <&hd3ss3220_in_ep>; 856*9fda4a8aSGary Bisson }; 857*9fda4a8aSGary Bisson }; 858*9fda4a8aSGary Bisson }; 859*9fda4a8aSGary Bisson }; 860*9fda4a8aSGary Bisson 861*9fda4a8aSGary Bisson ports { 862*9fda4a8aSGary Bisson #address-cells = <1>; 863*9fda4a8aSGary Bisson #size-cells = <0>; 864*9fda4a8aSGary Bisson 865*9fda4a8aSGary Bisson port@0 { 866*9fda4a8aSGary Bisson reg = <0>; 867*9fda4a8aSGary Bisson usb_hs_ep: endpoint { 868*9fda4a8aSGary Bisson remote-endpoint = <&hs_ep>; 869*9fda4a8aSGary Bisson }; 870*9fda4a8aSGary Bisson }; 871*9fda4a8aSGary Bisson 872*9fda4a8aSGary Bisson port@1 { 873*9fda4a8aSGary Bisson reg = <1>; 874*9fda4a8aSGary Bisson usb_role_switch: endpoint { 875*9fda4a8aSGary Bisson remote-endpoint = <&hd3ss3220_out_ep>; 876*9fda4a8aSGary Bisson }; 877*9fda4a8aSGary Bisson }; 878*9fda4a8aSGary Bisson }; 879*9fda4a8aSGary Bisson}; 880*9fda4a8aSGary Bisson 881*9fda4a8aSGary Bisson&u2port0 { 882*9fda4a8aSGary Bisson status = "okay"; 883*9fda4a8aSGary Bisson}; 884*9fda4a8aSGary Bisson 885*9fda4a8aSGary Bisson&u3phy0 { 886*9fda4a8aSGary Bisson status = "okay"; 887*9fda4a8aSGary Bisson}; 888*9fda4a8aSGary Bisson 889*9fda4a8aSGary Bisson&xhci0 { 890*9fda4a8aSGary Bisson vbus-supply = <&usb_p0_vbus>; 891*9fda4a8aSGary Bisson vusb33-supply = <&mt6359_vusb_ldo_reg>; 892*9fda4a8aSGary Bisson status = "okay"; 893*9fda4a8aSGary Bisson}; 894*9fda4a8aSGary Bisson 895*9fda4a8aSGary Bisson&ssusb1 { 896*9fda4a8aSGary Bisson dr_mode = "host"; 897*9fda4a8aSGary Bisson wakeup-source; 898*9fda4a8aSGary Bisson vusb33-supply = <&mt6359_vusb_ldo_reg>; 899*9fda4a8aSGary Bisson pinctrl-0 = <&usb1_pins>; 900*9fda4a8aSGary Bisson pinctrl-names = "default"; 901*9fda4a8aSGary Bisson status = "okay"; 902*9fda4a8aSGary Bisson}; 903*9fda4a8aSGary Bisson 904*9fda4a8aSGary Bisson&u2port1 { 905*9fda4a8aSGary Bisson status = "okay"; 906*9fda4a8aSGary Bisson}; 907*9fda4a8aSGary Bisson 908*9fda4a8aSGary Bisson&u3port1 { 909*9fda4a8aSGary Bisson status = "okay"; 910*9fda4a8aSGary Bisson}; 911*9fda4a8aSGary Bisson 912*9fda4a8aSGary Bisson&u3phy1 { 913*9fda4a8aSGary Bisson status = "okay"; 914*9fda4a8aSGary Bisson}; 915*9fda4a8aSGary Bisson 916*9fda4a8aSGary Bisson&xhci1 { 917*9fda4a8aSGary Bisson vbus-supply = <&usb_p1_vbus>; 918*9fda4a8aSGary Bisson vusb33-supply = <&mt6359_vusb_ldo_reg>; 919*9fda4a8aSGary Bisson status = "okay"; 920*9fda4a8aSGary Bisson}; 921*9fda4a8aSGary Bisson 922*9fda4a8aSGary Bisson&ssusb2 { 923*9fda4a8aSGary Bisson dr_mode = "host"; 924*9fda4a8aSGary Bisson maximum-speed = "high-speed"; 925*9fda4a8aSGary Bisson wakeup-source; 926*9fda4a8aSGary Bisson vusb33-supply = <&mt6359_vusb_ldo_reg>; 927*9fda4a8aSGary Bisson status = "okay"; 928*9fda4a8aSGary Bisson}; 929*9fda4a8aSGary Bisson 930*9fda4a8aSGary Bisson&u2port2 { 931*9fda4a8aSGary Bisson status = "okay"; 932*9fda4a8aSGary Bisson}; 933*9fda4a8aSGary Bisson 934*9fda4a8aSGary Bisson&u3phy2 { 935*9fda4a8aSGary Bisson status = "okay"; 936*9fda4a8aSGary Bisson}; 937*9fda4a8aSGary Bisson 938*9fda4a8aSGary Bisson&xhci2 { 939*9fda4a8aSGary Bisson vbus-supply = <&usb_p2_vbus>; 940*9fda4a8aSGary Bisson vusb33-supply = <&mt6359_vusb_ldo_reg>; 941*9fda4a8aSGary Bisson #address-cells = <1>; 942*9fda4a8aSGary Bisson #size-cells = <0>; 943*9fda4a8aSGary Bisson status = "okay"; 944*9fda4a8aSGary Bisson 945*9fda4a8aSGary Bisson ethernet@1 { 946*9fda4a8aSGary Bisson compatible = "usb424,7850"; 947*9fda4a8aSGary Bisson reg = <1>; 948*9fda4a8aSGary Bisson #address-cells = <1>; 949*9fda4a8aSGary Bisson #size-cells = <0>; 950*9fda4a8aSGary Bisson 951*9fda4a8aSGary Bisson mdio { 952*9fda4a8aSGary Bisson #address-cells = <1>; 953*9fda4a8aSGary Bisson #size-cells = <0>; 954*9fda4a8aSGary Bisson 955*9fda4a8aSGary Bisson ethernet-phy@1 { 956*9fda4a8aSGary Bisson reg = <1>; 957*9fda4a8aSGary Bisson microchip,led-modes = < 958*9fda4a8aSGary Bisson LAN78XX_LINK_1000_ACTIVITY 959*9fda4a8aSGary Bisson LAN78XX_LINK_10_ACTIVITY 960*9fda4a8aSGary Bisson LAN78XX_LINK_10_100_ACTIVITY 961*9fda4a8aSGary Bisson LAN78XX_LINK_ACTIVITY 962*9fda4a8aSGary Bisson >; 963*9fda4a8aSGary Bisson }; 964*9fda4a8aSGary Bisson }; 965*9fda4a8aSGary Bisson }; 966*9fda4a8aSGary Bisson}; 967*9fda4a8aSGary Bisson 968*9fda4a8aSGary Bisson&vdosys0 { 969*9fda4a8aSGary Bisson port { 970*9fda4a8aSGary Bisson #address-cells = <1>; 971*9fda4a8aSGary Bisson #size-cells = <0>; 972*9fda4a8aSGary Bisson 973*9fda4a8aSGary Bisson vdosys0_ep_main: endpoint@0 { 974*9fda4a8aSGary Bisson reg = <0>; 975*9fda4a8aSGary Bisson remote-endpoint = <&ovl0_in>; 976*9fda4a8aSGary Bisson }; 977*9fda4a8aSGary Bisson }; 978*9fda4a8aSGary Bisson}; 979*9fda4a8aSGary Bisson 980*9fda4a8aSGary Bisson&watchdog { 981*9fda4a8aSGary Bisson pinctrl-names = "default"; 982*9fda4a8aSGary Bisson pinctrl-0 = <&watchdog_pins>; 983*9fda4a8aSGary Bisson}; 984*9fda4a8aSGary Bisson 985*9fda4a8aSGary Bisson&pio { 986*9fda4a8aSGary Bisson audio_pins: audio-pins { 987*9fda4a8aSGary Bisson pins-aud-pmic { 988*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO101__FUNC_O_AUD_CLK_MOSI 989*9fda4a8aSGary Bisson PINMUX_GPIO102__FUNC_O_AUD_SYNC_MOSI 990*9fda4a8aSGary Bisson PINMUX_GPIO103__FUNC_O_AUD_DAT_MOSI0 991*9fda4a8aSGary Bisson PINMUX_GPIO104__FUNC_O_AUD_DAT_MOSI1 992*9fda4a8aSGary Bisson PINMUX_GPIO105__FUNC_I0_AUD_DAT_MISO0 993*9fda4a8aSGary Bisson PINMUX_GPIO106__FUNC_I0_AUD_DAT_MISO1>; 994*9fda4a8aSGary Bisson }; 995*9fda4a8aSGary Bisson 996*9fda4a8aSGary Bisson pins-pcm-wifi { 997*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO121__FUNC_B0_PCM_CLK 998*9fda4a8aSGary Bisson PINMUX_GPIO122__FUNC_B0_PCM_SYNC 999*9fda4a8aSGary Bisson PINMUX_GPIO123__FUNC_O_PCM_DO 1000*9fda4a8aSGary Bisson PINMUX_GPIO124__FUNC_I0_PCM_DI>; 1001*9fda4a8aSGary Bisson }; 1002*9fda4a8aSGary Bisson 1003*9fda4a8aSGary Bisson pins-i2s { 1004*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO119__FUNC_O_I2SO1_MCK 1005*9fda4a8aSGary Bisson PINMUX_GPIO112__FUNC_O_I2SO1_WS 1006*9fda4a8aSGary Bisson PINMUX_GPIO120__FUNC_O_I2SO1_BCK 1007*9fda4a8aSGary Bisson PINMUX_GPIO113__FUNC_O_I2SO1_D0 1008*9fda4a8aSGary Bisson PINMUX_GPIO110__FUNC_I0_I2SIN_D0>; 1009*9fda4a8aSGary Bisson }; 1010*9fda4a8aSGary Bisson }; 1011*9fda4a8aSGary Bisson 1012*9fda4a8aSGary Bisson disp_pwm0_pins: disp-pwm0-pins { 1013*9fda4a8aSGary Bisson pins { 1014*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO29__FUNC_O_DISP_PWM0>; 1015*9fda4a8aSGary Bisson bias-pull-down; 1016*9fda4a8aSGary Bisson }; 1017*9fda4a8aSGary Bisson }; 1018*9fda4a8aSGary Bisson 1019*9fda4a8aSGary Bisson dsi0_sn65dsi84_pins: dsi0-sn65dsi84-pins { 1020*9fda4a8aSGary Bisson pins-irq { 1021*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO128__FUNC_B_GPIO128>; 1022*9fda4a8aSGary Bisson bias-pull-down; 1023*9fda4a8aSGary Bisson input-enable; 1024*9fda4a8aSGary Bisson }; 1025*9fda4a8aSGary Bisson 1026*9fda4a8aSGary Bisson pins-enable { 1027*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO25__FUNC_B_GPIO25>; 1028*9fda4a8aSGary Bisson bias-pull-down; 1029*9fda4a8aSGary Bisson }; 1030*9fda4a8aSGary Bisson }; 1031*9fda4a8aSGary Bisson 1032*9fda4a8aSGary Bisson eth_default_pins: eth-default-pins { 1033*9fda4a8aSGary Bisson pins-txd { 1034*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO131__FUNC_O_GBE_TXD3>, 1035*9fda4a8aSGary Bisson <PINMUX_GPIO132__FUNC_O_GBE_TXD2>, 1036*9fda4a8aSGary Bisson <PINMUX_GPIO133__FUNC_O_GBE_TXD1>, 1037*9fda4a8aSGary Bisson <PINMUX_GPIO134__FUNC_O_GBE_TXD0>; 1038*9fda4a8aSGary Bisson drive-strength = <8>; 1039*9fda4a8aSGary Bisson }; 1040*9fda4a8aSGary Bisson pins-cc { 1041*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO139__FUNC_B0_GBE_TXC>, 1042*9fda4a8aSGary Bisson <PINMUX_GPIO142__FUNC_O_GBE_TXEN>, 1043*9fda4a8aSGary Bisson <PINMUX_GPIO141__FUNC_I0_GBE_RXDV>; 1044*9fda4a8aSGary Bisson drive-strength = <8>; 1045*9fda4a8aSGary Bisson }; 1046*9fda4a8aSGary Bisson pins-rxd { 1047*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO135__FUNC_I0_GBE_RXD3>, 1048*9fda4a8aSGary Bisson <PINMUX_GPIO136__FUNC_I0_GBE_RXD2>, 1049*9fda4a8aSGary Bisson <PINMUX_GPIO137__FUNC_I0_GBE_RXD1>, 1050*9fda4a8aSGary Bisson <PINMUX_GPIO138__FUNC_I0_GBE_RXD0>, 1051*9fda4a8aSGary Bisson <PINMUX_GPIO140__FUNC_I0_GBE_RXC>; 1052*9fda4a8aSGary Bisson drive-strength = <8>; 1053*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 1054*9fda4a8aSGary Bisson }; 1055*9fda4a8aSGary Bisson pins-mdio { 1056*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO143__FUNC_O_GBE_MDC>, 1057*9fda4a8aSGary Bisson <PINMUX_GPIO144__FUNC_B1_GBE_MDIO>; 1058*9fda4a8aSGary Bisson drive-strength = <8>; 1059*9fda4a8aSGary Bisson input-enable; 1060*9fda4a8aSGary Bisson }; 1061*9fda4a8aSGary Bisson pins-power { 1062*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO27__FUNC_B_GPIO27>; /* GP_EQOS_RESET */ 1063*9fda4a8aSGary Bisson output-high; 1064*9fda4a8aSGary Bisson }; 1065*9fda4a8aSGary Bisson pins-intr { 1066*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO148__FUNC_B_GPIO148>; /* GPIRQ_EQOS_PHY */ 1067*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 1068*9fda4a8aSGary Bisson input-enable; 1069*9fda4a8aSGary Bisson }; 1070*9fda4a8aSGary Bisson }; 1071*9fda4a8aSGary Bisson 1072*9fda4a8aSGary Bisson eth_sleep_pins: eth-sleep-pins { 1073*9fda4a8aSGary Bisson pins-txd { 1074*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO131__FUNC_B_GPIO131>, 1075*9fda4a8aSGary Bisson <PINMUX_GPIO132__FUNC_B_GPIO132>, 1076*9fda4a8aSGary Bisson <PINMUX_GPIO133__FUNC_B_GPIO133>, 1077*9fda4a8aSGary Bisson <PINMUX_GPIO134__FUNC_B_GPIO134>; 1078*9fda4a8aSGary Bisson }; 1079*9fda4a8aSGary Bisson pins-cc { 1080*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO139__FUNC_B_GPIO139>, 1081*9fda4a8aSGary Bisson <PINMUX_GPIO142__FUNC_B_GPIO142>, 1082*9fda4a8aSGary Bisson <PINMUX_GPIO141__FUNC_B_GPIO141>, 1083*9fda4a8aSGary Bisson <PINMUX_GPIO140__FUNC_B_GPIO140>; 1084*9fda4a8aSGary Bisson }; 1085*9fda4a8aSGary Bisson pins-rxd { 1086*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO135__FUNC_B_GPIO135>, 1087*9fda4a8aSGary Bisson <PINMUX_GPIO136__FUNC_B_GPIO136>, 1088*9fda4a8aSGary Bisson <PINMUX_GPIO137__FUNC_B_GPIO137>, 1089*9fda4a8aSGary Bisson <PINMUX_GPIO138__FUNC_B_GPIO138>; 1090*9fda4a8aSGary Bisson }; 1091*9fda4a8aSGary Bisson pins-mdio { 1092*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO143__FUNC_B_GPIO143>, 1093*9fda4a8aSGary Bisson <PINMUX_GPIO144__FUNC_B_GPIO144>; 1094*9fda4a8aSGary Bisson input-disable; 1095*9fda4a8aSGary Bisson bias-disable; 1096*9fda4a8aSGary Bisson }; 1097*9fda4a8aSGary Bisson }; 1098*9fda4a8aSGary Bisson 1099*9fda4a8aSGary Bisson gpio_keys_pins: gpio-keys-pins { 1100*9fda4a8aSGary Bisson pins-keys { 1101*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO129__FUNC_B_GPIO129>, 1102*9fda4a8aSGary Bisson <PINMUX_GPIO65__FUNC_B_GPIO65>, 1103*9fda4a8aSGary Bisson <PINMUX_GPIO66__FUNC_B_GPIO66>; 1104*9fda4a8aSGary Bisson bias-pull-up; 1105*9fda4a8aSGary Bisson }; 1106*9fda4a8aSGary Bisson }; 1107*9fda4a8aSGary Bisson 1108*9fda4a8aSGary Bisson hd3ss3220_pins: hd3ss3320-pins { 1109*9fda4a8aSGary Bisson pins-irq { 1110*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO45__FUNC_B_GPIO45>; 1111*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1112*9fda4a8aSGary Bisson input-enable; 1113*9fda4a8aSGary Bisson }; 1114*9fda4a8aSGary Bisson }; 1115*9fda4a8aSGary Bisson 1116*9fda4a8aSGary Bisson hdmi_vreg_pins: hdmi-vreg-pins { 1117*9fda4a8aSGary Bisson pins-pwr { 1118*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO50__FUNC_O_HDMITX20_PWR5V>; 1119*9fda4a8aSGary Bisson bias-disable; 1120*9fda4a8aSGary Bisson }; 1121*9fda4a8aSGary Bisson }; 1122*9fda4a8aSGary Bisson 1123*9fda4a8aSGary Bisson hdmi_pins: hdmi-pins { 1124*9fda4a8aSGary Bisson pins-hotplug { 1125*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO51__FUNC_I0_HDMITX20_HTPLG>; 1126*9fda4a8aSGary Bisson bias-pull-down; 1127*9fda4a8aSGary Bisson }; 1128*9fda4a8aSGary Bisson 1129*9fda4a8aSGary Bisson pins-cec { 1130*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO52__FUNC_B1_HDMITX20_CEC>; 1131*9fda4a8aSGary Bisson bias-disable; 1132*9fda4a8aSGary Bisson }; 1133*9fda4a8aSGary Bisson 1134*9fda4a8aSGary Bisson pins-ddc { 1135*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO53__FUNC_B1_HDMITX20_SCL>, 1136*9fda4a8aSGary Bisson <PINMUX_GPIO54__FUNC_B1_HDMITX20_SDA>; 1137*9fda4a8aSGary Bisson drive-strength = <10>; 1138*9fda4a8aSGary Bisson }; 1139*9fda4a8aSGary Bisson }; 1140*9fda4a8aSGary Bisson 1141*9fda4a8aSGary Bisson i2c0_pins: i2c0-pins { 1142*9fda4a8aSGary Bisson pins-bus { 1143*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO56__FUNC_B1_SDA0>, 1144*9fda4a8aSGary Bisson <PINMUX_GPIO55__FUNC_B1_SCL0>; 1145*9fda4a8aSGary Bisson bias-pull-up = <MTK_PULL_SET_RSEL_011>; 1146*9fda4a8aSGary Bisson drive-strength-microamp = <1000>; 1147*9fda4a8aSGary Bisson }; 1148*9fda4a8aSGary Bisson }; 1149*9fda4a8aSGary Bisson 1150*9fda4a8aSGary Bisson i2c0_mux_pins: i2c0-mux-pins { 1151*9fda4a8aSGary Bisson pins-reset { 1152*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO6__FUNC_B_GPIO6>; 1153*9fda4a8aSGary Bisson bias-pull-up; 1154*9fda4a8aSGary Bisson }; 1155*9fda4a8aSGary Bisson }; 1156*9fda4a8aSGary Bisson 1157*9fda4a8aSGary Bisson i2c1_pins: i2c1-pins { 1158*9fda4a8aSGary Bisson pins-bus { 1159*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>, 1160*9fda4a8aSGary Bisson <PINMUX_GPIO57__FUNC_B1_SCL1>; 1161*9fda4a8aSGary Bisson bias-pull-up = <MTK_PULL_SET_RSEL_011>; 1162*9fda4a8aSGary Bisson drive-strength-microamp = <1000>; 1163*9fda4a8aSGary Bisson }; 1164*9fda4a8aSGary Bisson }; 1165*9fda4a8aSGary Bisson 1166*9fda4a8aSGary Bisson i2c2_pins: i2c2-pins { 1167*9fda4a8aSGary Bisson pins-bus { 1168*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO60__FUNC_B1_SDA2>, 1169*9fda4a8aSGary Bisson <PINMUX_GPIO59__FUNC_B1_SCL2>; 1170*9fda4a8aSGary Bisson bias-pull-up = <MTK_PULL_SET_RSEL_011>; 1171*9fda4a8aSGary Bisson drive-strength-microamp = <1000>; 1172*9fda4a8aSGary Bisson }; 1173*9fda4a8aSGary Bisson }; 1174*9fda4a8aSGary Bisson 1175*9fda4a8aSGary Bisson i2c3_pins: i2c3-pins { 1176*9fda4a8aSGary Bisson pins-bus { 1177*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO62__FUNC_B1_SDA3>, 1178*9fda4a8aSGary Bisson <PINMUX_GPIO61__FUNC_B1_SCL3>; 1179*9fda4a8aSGary Bisson bias-pull-up = <MTK_PULL_SET_RSEL_011>; 1180*9fda4a8aSGary Bisson drive-strength-microamp = <1000>; 1181*9fda4a8aSGary Bisson }; 1182*9fda4a8aSGary Bisson }; 1183*9fda4a8aSGary Bisson 1184*9fda4a8aSGary Bisson i2c4_pins: i2c4-pins { 1185*9fda4a8aSGary Bisson pins-bus { 1186*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO64__FUNC_B1_SDA4>, 1187*9fda4a8aSGary Bisson <PINMUX_GPIO63__FUNC_B1_SCL4>; 1188*9fda4a8aSGary Bisson bias-pull-up = <MTK_PULL_SET_RSEL_011>; 1189*9fda4a8aSGary Bisson drive-strength-microamp = <1000>; 1190*9fda4a8aSGary Bisson }; 1191*9fda4a8aSGary Bisson }; 1192*9fda4a8aSGary Bisson 1193*9fda4a8aSGary Bisson i2c_mux_smarc_lcd_pins: i2c-mux-smarc-lcd-pins { 1194*9fda4a8aSGary Bisson pins-reset { 1195*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO5__FUNC_B_GPIO5>; 1196*9fda4a8aSGary Bisson bias-pull-down; 1197*9fda4a8aSGary Bisson }; 1198*9fda4a8aSGary Bisson }; 1199*9fda4a8aSGary Bisson 1200*9fda4a8aSGary Bisson mmc0_default_pins: mmc0-default-pins { 1201*9fda4a8aSGary Bisson pins-cmd-dat { 1202*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>, 1203*9fda4a8aSGary Bisson <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>, 1204*9fda4a8aSGary Bisson <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>, 1205*9fda4a8aSGary Bisson <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>, 1206*9fda4a8aSGary Bisson <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>, 1207*9fda4a8aSGary Bisson <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>, 1208*9fda4a8aSGary Bisson <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>, 1209*9fda4a8aSGary Bisson <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>, 1210*9fda4a8aSGary Bisson <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>; 1211*9fda4a8aSGary Bisson input-enable; 1212*9fda4a8aSGary Bisson drive-strength = <6>; 1213*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1214*9fda4a8aSGary Bisson }; 1215*9fda4a8aSGary Bisson 1216*9fda4a8aSGary Bisson pins-clk { 1217*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>; 1218*9fda4a8aSGary Bisson drive-strength = <6>; 1219*9fda4a8aSGary Bisson bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1220*9fda4a8aSGary Bisson }; 1221*9fda4a8aSGary Bisson 1222*9fda4a8aSGary Bisson pins-rst { 1223*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>; 1224*9fda4a8aSGary Bisson drive-strength = <6>; 1225*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1226*9fda4a8aSGary Bisson }; 1227*9fda4a8aSGary Bisson }; 1228*9fda4a8aSGary Bisson 1229*9fda4a8aSGary Bisson mmc0_uhs_pins: mmc0-uhs-pins { 1230*9fda4a8aSGary Bisson pins-cmd-dat { 1231*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>, 1232*9fda4a8aSGary Bisson <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>, 1233*9fda4a8aSGary Bisson <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>, 1234*9fda4a8aSGary Bisson <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>, 1235*9fda4a8aSGary Bisson <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>, 1236*9fda4a8aSGary Bisson <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>, 1237*9fda4a8aSGary Bisson <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>, 1238*9fda4a8aSGary Bisson <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>, 1239*9fda4a8aSGary Bisson <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>; 1240*9fda4a8aSGary Bisson input-enable; 1241*9fda4a8aSGary Bisson drive-strength = <8>; 1242*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1243*9fda4a8aSGary Bisson }; 1244*9fda4a8aSGary Bisson 1245*9fda4a8aSGary Bisson pins-clk { 1246*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>; 1247*9fda4a8aSGary Bisson drive-strength = <8>; 1248*9fda4a8aSGary Bisson bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1249*9fda4a8aSGary Bisson }; 1250*9fda4a8aSGary Bisson 1251*9fda4a8aSGary Bisson pins-ds { 1252*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>; 1253*9fda4a8aSGary Bisson drive-strength = <8>; 1254*9fda4a8aSGary Bisson bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1255*9fda4a8aSGary Bisson }; 1256*9fda4a8aSGary Bisson 1257*9fda4a8aSGary Bisson pins-rst { 1258*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>; 1259*9fda4a8aSGary Bisson drive-strength = <8>; 1260*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1261*9fda4a8aSGary Bisson }; 1262*9fda4a8aSGary Bisson }; 1263*9fda4a8aSGary Bisson 1264*9fda4a8aSGary Bisson mmc1_default_pins: mmc1-default-pins { 1265*9fda4a8aSGary Bisson pins-cmd-dat { 1266*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>, 1267*9fda4a8aSGary Bisson <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>, 1268*9fda4a8aSGary Bisson <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>, 1269*9fda4a8aSGary Bisson <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>, 1270*9fda4a8aSGary Bisson <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>; 1271*9fda4a8aSGary Bisson input-enable; 1272*9fda4a8aSGary Bisson drive-strength = <6>; 1273*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1274*9fda4a8aSGary Bisson }; 1275*9fda4a8aSGary Bisson 1276*9fda4a8aSGary Bisson pins-pwr { 1277*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO111__FUNC_B_GPIO111>; 1278*9fda4a8aSGary Bisson bias-pull-down; 1279*9fda4a8aSGary Bisson }; 1280*9fda4a8aSGary Bisson 1281*9fda4a8aSGary Bisson pins-pullup { 1282*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO11__FUNC_B_GPIO11>; 1283*9fda4a8aSGary Bisson bias-pull-up; 1284*9fda4a8aSGary Bisson }; 1285*9fda4a8aSGary Bisson 1286*9fda4a8aSGary Bisson pins-clk { 1287*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>; 1288*9fda4a8aSGary Bisson drive-strength = <6>; 1289*9fda4a8aSGary Bisson bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1290*9fda4a8aSGary Bisson }; 1291*9fda4a8aSGary Bisson 1292*9fda4a8aSGary Bisson pins-insert { 1293*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO2__FUNC_B_GPIO2>; 1294*9fda4a8aSGary Bisson bias-pull-up; 1295*9fda4a8aSGary Bisson }; 1296*9fda4a8aSGary Bisson }; 1297*9fda4a8aSGary Bisson 1298*9fda4a8aSGary Bisson mmc1_uhs_pins: mmc1-uhs-pins { 1299*9fda4a8aSGary Bisson pins-cmd-dat { 1300*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>, 1301*9fda4a8aSGary Bisson <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>, 1302*9fda4a8aSGary Bisson <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>, 1303*9fda4a8aSGary Bisson <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>, 1304*9fda4a8aSGary Bisson <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>; 1305*9fda4a8aSGary Bisson input-enable; 1306*9fda4a8aSGary Bisson drive-strength = <6>; 1307*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1308*9fda4a8aSGary Bisson }; 1309*9fda4a8aSGary Bisson 1310*9fda4a8aSGary Bisson pins-clk { 1311*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>; 1312*9fda4a8aSGary Bisson drive-strength = <6>; 1313*9fda4a8aSGary Bisson bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1314*9fda4a8aSGary Bisson }; 1315*9fda4a8aSGary Bisson }; 1316*9fda4a8aSGary Bisson 1317*9fda4a8aSGary Bisson mmc2_default_pins: mmc2-default-pins { 1318*9fda4a8aSGary Bisson pins-clk { 1319*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>; 1320*9fda4a8aSGary Bisson drive-strength = <4>; 1321*9fda4a8aSGary Bisson bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1322*9fda4a8aSGary Bisson }; 1323*9fda4a8aSGary Bisson 1324*9fda4a8aSGary Bisson pins-cmd-dat { 1325*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>, 1326*9fda4a8aSGary Bisson <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>, 1327*9fda4a8aSGary Bisson <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>, 1328*9fda4a8aSGary Bisson <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>, 1329*9fda4a8aSGary Bisson <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>; 1330*9fda4a8aSGary Bisson input-enable; 1331*9fda4a8aSGary Bisson drive-strength = <6>; 1332*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1333*9fda4a8aSGary Bisson }; 1334*9fda4a8aSGary Bisson }; 1335*9fda4a8aSGary Bisson 1336*9fda4a8aSGary Bisson mmc2_uhs_pins: mmc2-uhs-pins { 1337*9fda4a8aSGary Bisson pins-clk { 1338*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>; 1339*9fda4a8aSGary Bisson drive-strength = <4>; 1340*9fda4a8aSGary Bisson bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1341*9fda4a8aSGary Bisson }; 1342*9fda4a8aSGary Bisson 1343*9fda4a8aSGary Bisson pins-cmd-dat { 1344*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>, 1345*9fda4a8aSGary Bisson <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>, 1346*9fda4a8aSGary Bisson <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>, 1347*9fda4a8aSGary Bisson <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>, 1348*9fda4a8aSGary Bisson <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>; 1349*9fda4a8aSGary Bisson input-enable; 1350*9fda4a8aSGary Bisson drive-strength = <6>; 1351*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1352*9fda4a8aSGary Bisson }; 1353*9fda4a8aSGary Bisson }; 1354*9fda4a8aSGary Bisson 1355*9fda4a8aSGary Bisson mmc2_eint_pins: mmc2-eint-pins { 1356*9fda4a8aSGary Bisson pins-dat1 { 1357*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO172__FUNC_B_GPIO172>; 1358*9fda4a8aSGary Bisson input-enable; 1359*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1360*9fda4a8aSGary Bisson }; 1361*9fda4a8aSGary Bisson }; 1362*9fda4a8aSGary Bisson 1363*9fda4a8aSGary Bisson rv3028_pins: rv3028-pins { 1364*9fda4a8aSGary Bisson pins-irq { 1365*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO42__FUNC_B_GPIO42>; 1366*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1367*9fda4a8aSGary Bisson input-enable; 1368*9fda4a8aSGary Bisson }; 1369*9fda4a8aSGary Bisson }; 1370*9fda4a8aSGary Bisson 1371*9fda4a8aSGary Bisson spi0_pins: spi0-pins { 1372*9fda4a8aSGary Bisson pins-spi { 1373*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO69__FUNC_O_SPIM0_CSB>, 1374*9fda4a8aSGary Bisson <PINMUX_GPIO70__FUNC_O_SPIM0_CLK>, 1375*9fda4a8aSGary Bisson <PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI>, 1376*9fda4a8aSGary Bisson <PINMUX_GPIO72__FUNC_B0_SPIM0_MISO>; 1377*9fda4a8aSGary Bisson bias-disable; 1378*9fda4a8aSGary Bisson }; 1379*9fda4a8aSGary Bisson }; 1380*9fda4a8aSGary Bisson 1381*9fda4a8aSGary Bisson spi1_pins: spi1-pins { 1382*9fda4a8aSGary Bisson pins-spi { 1383*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>, 1384*9fda4a8aSGary Bisson <PINMUX_GPIO76__FUNC_O_SPIM1_CLK>, 1385*9fda4a8aSGary Bisson <PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>, 1386*9fda4a8aSGary Bisson <PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>; 1387*9fda4a8aSGary Bisson bias-disable; 1388*9fda4a8aSGary Bisson }; 1389*9fda4a8aSGary Bisson }; 1390*9fda4a8aSGary Bisson 1391*9fda4a8aSGary Bisson pcie_default_pins: pcie-default-pins { 1392*9fda4a8aSGary Bisson pins { 1393*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO47__FUNC_I1_WAKEN>, 1394*9fda4a8aSGary Bisson <PINMUX_GPIO48__FUNC_O_PERSTN>, 1395*9fda4a8aSGary Bisson <PINMUX_GPIO49__FUNC_B1_CLKREQN>; 1396*9fda4a8aSGary Bisson bias-pull-up; 1397*9fda4a8aSGary Bisson }; 1398*9fda4a8aSGary Bisson }; 1399*9fda4a8aSGary Bisson 1400*9fda4a8aSGary Bisson ts_dsi0_goodix_pins: ts-dsi0-goodix-pins { 1401*9fda4a8aSGary Bisson pins-irq { 1402*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO146__FUNC_B_GPIO146>; 1403*9fda4a8aSGary Bisson bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1404*9fda4a8aSGary Bisson input-enable; 1405*9fda4a8aSGary Bisson }; 1406*9fda4a8aSGary Bisson 1407*9fda4a8aSGary Bisson pins-reset { 1408*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO7__FUNC_B_GPIO7>; 1409*9fda4a8aSGary Bisson bias-pull-down; 1410*9fda4a8aSGary Bisson }; 1411*9fda4a8aSGary Bisson }; 1412*9fda4a8aSGary Bisson 1413*9fda4a8aSGary Bisson uart0_pins: uart0-pins { 1414*9fda4a8aSGary Bisson pins { 1415*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO31__FUNC_O_UTXD0>, 1416*9fda4a8aSGary Bisson <PINMUX_GPIO32__FUNC_I1_URXD0>; 1417*9fda4a8aSGary Bisson bias-pull-up; 1418*9fda4a8aSGary Bisson }; 1419*9fda4a8aSGary Bisson }; 1420*9fda4a8aSGary Bisson 1421*9fda4a8aSGary Bisson uart1_pins: uart1-pins { 1422*9fda4a8aSGary Bisson pins { 1423*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO33__FUNC_O_UTXD1>, 1424*9fda4a8aSGary Bisson <PINMUX_GPIO34__FUNC_I1_URXD1>; 1425*9fda4a8aSGary Bisson bias-pull-up; 1426*9fda4a8aSGary Bisson }; 1427*9fda4a8aSGary Bisson }; 1428*9fda4a8aSGary Bisson 1429*9fda4a8aSGary Bisson uart2_pins: uart2-pins { 1430*9fda4a8aSGary Bisson pins { 1431*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO35__FUNC_O_UTXD2>, 1432*9fda4a8aSGary Bisson <PINMUX_GPIO36__FUNC_I1_URXD2>; 1433*9fda4a8aSGary Bisson bias-pull-up; 1434*9fda4a8aSGary Bisson }; 1435*9fda4a8aSGary Bisson }; 1436*9fda4a8aSGary Bisson 1437*9fda4a8aSGary Bisson usbotg_pins: usbotg-pins { 1438*9fda4a8aSGary Bisson pins-iddig { 1439*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO83__FUNC_B_GPIO83>; 1440*9fda4a8aSGary Bisson input-enable; 1441*9fda4a8aSGary Bisson bias-pull-up; 1442*9fda4a8aSGary Bisson }; 1443*9fda4a8aSGary Bisson 1444*9fda4a8aSGary Bisson pins-valid { 1445*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO85__FUNC_I0_VBUSVALID>; 1446*9fda4a8aSGary Bisson input-enable; 1447*9fda4a8aSGary Bisson }; 1448*9fda4a8aSGary Bisson 1449*9fda4a8aSGary Bisson pins-vbus { 1450*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO84__FUNC_O_USB_DRVVBUS>; 1451*9fda4a8aSGary Bisson output-high; 1452*9fda4a8aSGary Bisson }; 1453*9fda4a8aSGary Bisson }; 1454*9fda4a8aSGary Bisson 1455*9fda4a8aSGary Bisson usb1_hub_pins: usb1-hub-pins { 1456*9fda4a8aSGary Bisson pins { 1457*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO147__FUNC_B_GPIO147>; 1458*9fda4a8aSGary Bisson output-low; 1459*9fda4a8aSGary Bisson }; 1460*9fda4a8aSGary Bisson }; 1461*9fda4a8aSGary Bisson 1462*9fda4a8aSGary Bisson usb1_pins: usb1-pins { 1463*9fda4a8aSGary Bisson pins { 1464*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO88__FUNC_I0_VBUSVALID_1P>; 1465*9fda4a8aSGary Bisson input-enable; 1466*9fda4a8aSGary Bisson }; 1467*9fda4a8aSGary Bisson }; 1468*9fda4a8aSGary Bisson 1469*9fda4a8aSGary Bisson usb2_eth_pins: usb2-eth-pins { 1470*9fda4a8aSGary Bisson pins { 1471*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO80__FUNC_B_GPIO80>; 1472*9fda4a8aSGary Bisson output-low; 1473*9fda4a8aSGary Bisson }; 1474*9fda4a8aSGary Bisson }; 1475*9fda4a8aSGary Bisson 1476*9fda4a8aSGary Bisson wifi_pwrseq_pins: wifi-pwrseq-pins { 1477*9fda4a8aSGary Bisson pins { 1478*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO89__FUNC_B_GPIO89>; 1479*9fda4a8aSGary Bisson output-low; 1480*9fda4a8aSGary Bisson }; 1481*9fda4a8aSGary Bisson }; 1482*9fda4a8aSGary Bisson 1483*9fda4a8aSGary Bisson watchdog_pins: watchdog-pins { 1484*9fda4a8aSGary Bisson pins { 1485*9fda4a8aSGary Bisson pinmux = <PINMUX_GPIO100__FUNC_O_WATCHDOG>; 1486*9fda4a8aSGary Bisson bias-pull-up; 1487*9fda4a8aSGary Bisson }; 1488*9fda4a8aSGary Bisson }; 1489*9fda4a8aSGary Bisson}; 1490