1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2025 Ezurio LLC 4 * Author: Gary Bisson <bisson.gary@gmail.com> 5 */ 6 7#include "mt6359.dtsi" 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/input/linux-event-codes.h> 11#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/net/microchip-lan78xx.h> 13#include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 14#include <dt-bindings/spmi/spmi.h> 15#include <dt-bindings/usb/pd.h> 16 17/ { 18 aliases { 19 dsi0 = &disp_dsi0; 20 ethernet0 = ð 21 i2c0 = &i2c0; 22 i2c1 = &i2c1; 23 i2c2 = &i2c2; 24 i2c3 = &i2c3; 25 i2c4 = &i2c4; 26 i2c5 = &i2c5; 27 i2c6 = &i2c6; 28 mmc0 = &mmc0; 29 mmc1 = &mmc1; 30 mmc2 = &mmc2; 31 rtc0 = &rv3028; 32 rtc1 = &mt6359rtc; 33 serial0 = &uart0; 34 }; 35 36 backlight_lcd0: backlight-lcd0 { 37 compatible = "pwm-backlight"; 38 brightness-levels = <0 1023>; 39 default-brightness-level = <768>; 40 num-interpolated-steps = <1023>; 41 enable-gpios = <&pio 30 GPIO_ACTIVE_HIGH>; 42 pwms = <&disp_pwm0 0 30000>; 43 }; 44 45 chosen { 46 stdout-path = "serial0:115200n8"; 47 }; 48 49 firmware { 50 optee { 51 compatible = "linaro,optee-tz"; 52 method = "smc"; 53 }; 54 }; 55 56 memory@40000000 { 57 device_type = "memory"; 58 reg = <0 0x40000000 0x1 0x00000000>; 59 }; 60 61 panel-dsi0 { 62 compatible = "tianma,tm070jdhg30"; 63 backlight = <&backlight_lcd0>; 64 power-supply = <®_5v>; 65 66 port { 67 dsi0_panel_in: endpoint { 68 remote-endpoint = <&sn65dsi84_bridge_out>; 69 }; 70 }; 71 }; 72 73 reserved-memory { 74 #address-cells = <2>; 75 #size-cells = <2>; 76 ranges; 77 78 /* 79 * 12 MiB reserved for OP-TEE (BL32) 80 * +-----------------------+ 0x43e0_0000 81 * | SHMEM 2MiB | 82 * +-----------------------+ 0x43c0_0000 83 * | | TA_RAM 8MiB | 84 * + TZDRAM +--------------+ 0x4340_0000 85 * | | TEE_RAM 2MiB | 86 * +-----------------------+ 0x4320_0000 87 */ 88 optee_reserved: optee@43200000 { 89 no-map; 90 reg = <0 0x43200000 0 0x00c00000>; 91 }; 92 93 scp_mem: memory@50000000 { 94 compatible = "shared-dma-pool"; 95 reg = <0 0x50000000 0 0x2900000>; 96 no-map; 97 }; 98 99 /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ 100 bl31_secmon_reserved: memory@54600000 { 101 no-map; 102 reg = <0 0x54600000 0x0 0x200000>; 103 }; 104 105 apu_mem: memory@55000000 { 106 compatible = "shared-dma-pool"; 107 reg = <0 0x55000000 0 0x1400000>; /* 20 MB */ 108 }; 109 110 vpu_mem: memory@57000000 { 111 compatible = "shared-dma-pool"; 112 reg = <0 0x57000000 0 0x1400000>; /* 20 MB */ 113 }; 114 115 adsp_mem: memory@60000000 { 116 compatible = "shared-dma-pool"; 117 reg = <0 0x60000000 0 0xf00000>; 118 no-map; 119 }; 120 121 afe_dma_mem: memory@60f00000 { 122 compatible = "shared-dma-pool"; 123 reg = <0 0x60f00000 0 0x100000>; 124 no-map; 125 }; 126 127 adsp_dma_mem: memory@61000000 { 128 compatible = "shared-dma-pool"; 129 reg = <0 0x61000000 0 0x100000>; 130 no-map; 131 }; 132 }; 133 134 regulator-efuse { 135 compatible = "regulator-output"; 136 vout-supply = <&mt6359_vefuse_ldo_reg>; 137 }; 138 139 reg_1v8: regulator-1v8 { 140 compatible = "regulator-fixed"; 141 regulator-name = "reg_1v8"; 142 regulator-min-microvolt = <1800000>; 143 regulator-max-microvolt = <1800000>; 144 regulator-always-on; 145 }; 146 147 reg_3v3: regulator-3v3 { 148 compatible = "regulator-fixed"; 149 regulator-name = "reg_3v3"; 150 regulator-min-microvolt = <3300000>; 151 regulator-max-microvolt = <3300000>; 152 regulator-always-on; 153 }; 154 155 reg_5v: regulator-5v { 156 compatible = "regulator-fixed"; 157 regulator-name = "reg_5v"; 158 regulator-min-microvolt = <5000000>; 159 regulator-max-microvolt = <5000000>; 160 regulator-always-on; 161 }; 162 163 sdcard_en_3v3: regulator-sdcard-en { 164 compatible = "regulator-fixed"; 165 regulator-always-on; 166 regulator-name = "sdcard_en_3v3"; 167 regulator-min-microvolt = <3300000>; 168 regulator-max-microvolt = <3300000>; 169 gpio = <&pio 111 GPIO_ACTIVE_HIGH>; 170 enable-active-high; 171 }; 172 173 usb_p0_vbus: regulator-usb-p0-vbus { 174 compatible = "regulator-fixed"; 175 regulator-name = "vbus_p0"; 176 regulator-min-microvolt = <5000000>; 177 regulator-max-microvolt = <5000000>; 178 gpio = <&pio 84 GPIO_ACTIVE_HIGH>; 179 enable-active-high; 180 }; 181 182 usb_p1_vbus: regulator-usb-p1-vbus { 183 compatible = "regulator-fixed"; 184 pinctrl-names = "default"; 185 pinctrl-0 = <&usb1_hub_pins>; 186 regulator-name = "vbus_p1"; 187 regulator-min-microvolt = <1800000>; 188 regulator-max-microvolt = <1800000>; 189 gpio = <&pio 147 GPIO_ACTIVE_HIGH>; 190 enable-active-high; 191 }; 192 193 usb_p2_vbus: regulator-usb-p2-vbus { 194 compatible = "regulator-fixed"; 195 pinctrl-names = "default"; 196 pinctrl-0 = <&usb2_eth_pins>; 197 regulator-name = "vbus_p2"; 198 regulator-min-microvolt = <1800000>; 199 regulator-max-microvolt = <1800000>; 200 gpio = <&pio 80 GPIO_ACTIVE_HIGH>; 201 enable-active-high; 202 }; 203 204 wifi_pwrseq: wifi-pwrseq { 205 compatible = "mmc-pwrseq-simple"; 206 pinctrl-names = "default"; 207 pinctrl-0 = <&wifi_pwrseq_pins>; 208 post-power-on-delay-ms = <200>; 209 reset-gpios = <&pio 89 GPIO_ACTIVE_LOW>; 210 }; 211}; 212 213&adsp { 214 memory-region = <&adsp_dma_mem>, <&adsp_mem>; 215 status = "okay"; 216}; 217 218&afe { 219 memory-region = <&afe_dma_mem>; 220 status = "okay"; 221}; 222 223&cpu0 { 224 cpu-supply = <&mt6359_vcore_buck_reg>; 225}; 226 227&cpu1 { 228 cpu-supply = <&mt6359_vcore_buck_reg>; 229}; 230 231&cpu2 { 232 cpu-supply = <&mt6359_vcore_buck_reg>; 233}; 234 235&cpu3 { 236 cpu-supply = <&mt6359_vcore_buck_reg>; 237}; 238 239&cpu6 { 240 cpu-supply = <&mt6315_6_vbuck1>; 241}; 242 243&cpu7 { 244 cpu-supply = <&mt6315_6_vbuck1>; 245}; 246 247&disp_pwm0 { 248 pinctrl-names = "default"; 249 pinctrl-0 = <&disp_pwm0_pins>; 250 status = "okay"; 251}; 252 253&disp_dsi0 { 254 #address-cells = <1>; 255 #size-cells = <0>; 256 status = "okay"; 257 258 ports { 259 #address-cells = <1>; 260 #size-cells = <0>; 261 262 port@0 { 263 reg = <0>; 264 dsi0_in: endpoint { 265 remote-endpoint = <&dither0_out>; 266 }; 267 }; 268 269 port@1 { 270 reg = <1>; 271 dsi0_out: endpoint { 272 remote-endpoint = <&sn65dsi84_bridge_in>; 273 }; 274 }; 275 }; 276}; 277 278&dither0_in { 279 remote-endpoint = <&postmask0_out>; 280}; 281 282&dither0_out { 283 remote-endpoint = <&dsi0_in>; 284}; 285 286ð { 287 phy-mode ="rgmii-id"; 288 phy-handle = <ðernet_phy0>; 289 pinctrl-names = "default", "sleep"; 290 pinctrl-0 = <ð_default_pins>; 291 pinctrl-1 = <ð_sleep_pins>; 292 mediatek,mac-wol; 293 snps,reset-gpio = <&pio 27 GPIO_ACTIVE_LOW>; 294 snps,reset-active-low; 295 snps,reset-delays-us = <0 11000 1000>; 296 status = "okay"; 297}; 298 299ð_mdio { 300 ethernet_phy0: ethernet-phy@7 { 301 compatible = "ethernet-phy-ieee802.3-c22"; 302 reg = <0x7>; 303 interrupts-extended = <&pio 148 IRQ_TYPE_LEVEL_LOW>; 304 }; 305}; 306 307&gamma0_out { 308 remote-endpoint = <&postmask0_in>; 309}; 310 311&gpu { 312 mali-supply = <&mt6359_vproc2_buck_reg>; 313 status = "okay"; 314}; 315 316&i2c0 { 317 pinctrl-names = "default"; 318 pinctrl-0 = <&i2c0_pins>; 319 clock-frequency = <100000>; 320 status = "okay"; 321 322 i2c-mux@73 { 323 compatible = "nxp,pca9546"; 324 reg = <0x73>; 325 pinctrl-names = "default"; 326 pinctrl-0 = <&i2c0_mux_pins>; 327 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>; 328 #address-cells = <1>; 329 #size-cells = <0>; 330 331 i2c_mux_gp_0: i2c@0 { 332 reg = <0>; 333 clock-frequency = <100000>; 334 #address-cells = <1>; 335 #size-cells = <0>; 336 }; 337 338 i2c_mux_gp_1: i2c@1 { 339 reg = <1>; 340 clock-frequency = <100000>; 341 #address-cells = <1>; 342 #size-cells = <0>; 343 }; 344 345 i2c_mux_gp_2: i2c@2 { 346 reg = <2>; 347 clock-frequency = <100000>; 348 #address-cells = <1>; 349 #size-cells = <0>; 350 }; 351 352 i2c_mux_gp_3: i2c@3 { 353 reg = <3>; 354 clock-frequency = <100000>; 355 #address-cells = <1>; 356 #size-cells = <0>; 357 }; 358 }; 359}; 360 361&i2c1 { 362 pinctrl-names = "default"; 363 pinctrl-0 = <&i2c1_pins>; 364 clock-frequency = <400000>; 365 status = "okay"; 366}; 367 368&i2c2 { 369 pinctrl-names = "default"; 370 pinctrl-0 = <&i2c2_pins>; 371 clock-frequency = <400000>; 372 status = "okay"; 373 374 i2c-mux@73 { 375 compatible = "nxp,pca9546"; 376 reg = <0x73>; 377 pinctrl-names = "default"; 378 pinctrl-0 = <&i2c_mux_smarc_lcd_pins>; 379 reset-gpios = <&pio 5 GPIO_ACTIVE_LOW>; 380 #address-cells = <1>; 381 #size-cells = <0>; 382 383 i2c_mux_lcd_0: i2c@0 { 384 reg = <0>; 385 clock-frequency = <100000>; 386 #address-cells = <1>; 387 #size-cells = <0>; 388 }; 389 390 i2c_mux_lcd_1: i2c@1 { 391 reg = <1>; 392 clock-frequency = <100000>; 393 #address-cells = <1>; 394 #size-cells = <0>; 395 }; 396 397 i2c_mux_lcd_2: i2c@2 { 398 reg = <2>; 399 clock-frequency = <100000>; 400 #address-cells = <1>; 401 #size-cells = <0>; 402 }; 403 404 i2c_mux_lcd_3: i2c@3 { 405 reg = <3>; 406 clock-frequency = <100000>; 407 #address-cells = <1>; 408 #size-cells = <0>; 409 }; 410 }; 411}; 412 413&i2c3 { 414 pinctrl-names = "default"; 415 pinctrl-0 = <&i2c3_pins>; 416 clock-frequency = <400000>; 417 status = "okay"; 418}; 419 420&i2c4 { 421 pinctrl-names = "default"; 422 pinctrl-0 = <&i2c4_pins>; 423 clock-frequency = <400000>; 424 status = "okay"; 425}; 426 427&i2c_mux_gp_0 { 428 rv3028: rtc@52 { 429 compatible = "microcrystal,rv3028"; 430 reg = <0x52>; 431 interrupts-extended = <&pio 42 IRQ_TYPE_LEVEL_LOW>; 432 pinctrl-names = "default"; 433 pinctrl-0 = <&rv3028_pins>; 434 #clock-cells = <0>; 435 wakeup-source; 436 }; 437}; 438 439&i2c_mux_gp_1 { 440 usb-typec@60 { 441 compatible = "ti,hd3ss3220"; 442 reg = <0x60>; 443 interrupts-extended = <&pio 45 IRQ_TYPE_LEVEL_LOW>; 444 pinctrl-names = "default"; 445 pinctrl-0 = <&hd3ss3220_pins>; 446 447 ports { 448 #address-cells = <1>; 449 #size-cells = <0>; 450 451 port@0 { 452 reg = <0>; 453 hd3ss3220_in_ep: endpoint { 454 remote-endpoint = <&ss_ep>; 455 }; 456 }; 457 458 port@1 { 459 reg = <1>; 460 hd3ss3220_out_ep: endpoint { 461 remote-endpoint = <&usb_role_switch>; 462 }; 463 }; 464 }; 465 }; 466}; 467 468&i2c_mux_gp_2 { 469 codec@1a { 470 compatible = "wlf,wm8962"; 471 reg = <0x1a>; 472 clocks = <&topckgen CLK_TOP_I2SO1>; 473 AVDD-supply = <®_1v8>; 474 CPVDD-supply = <®_1v8>; 475 DBVDD-supply = <®_3v3>; 476 DCVDD-supply = <®_1v8>; 477 MICVDD-supply = <®_3v3>; 478 PLLVDD-supply = <®_1v8>; 479 SPKVDD1-supply = <®_5v>; 480 SPKVDD2-supply = <®_5v>; 481 gpio-cfg = < 482 0x0000 /* n/c */ 483 0x0000 /* gpio2: */ 484 0x0000 /* gpio3: */ 485 0x0000 /* n/c */ 486 0x8081 /* gpio5:HP detect */ 487 0x8095 /* gpio6:Mic detect */ 488 >; 489 }; 490}; 491 492&i2c_mux_lcd_2 { 493 bridge@2c { 494 compatible = "ti,sn65dsi84"; 495 reg = <0x2c>; 496 pinctrl-names = "default"; 497 pinctrl-0 = <&dsi0_sn65dsi84_pins>; 498 enable-gpios = <&pio 25 GPIO_ACTIVE_HIGH>; 499 500 ports { 501 #address-cells = <1>; 502 #size-cells = <0>; 503 504 port@0 { 505 reg = <0>; 506 507 sn65dsi84_bridge_in: endpoint { 508 remote-endpoint = <&dsi0_out>; 509 data-lanes = <1 2 3 4>; 510 }; 511 }; 512 513 port@2 { 514 reg = <2>; 515 516 sn65dsi84_bridge_out: endpoint { 517 remote-endpoint = <&dsi0_panel_in>; 518 }; 519 }; 520 }; 521 }; 522 523 touchscren@5d { 524 compatible = "goodix,gt911"; 525 reg = <0x5d>; 526 pinctrl-names = "default"; 527 pinctrl-0 = <&ts_dsi0_goodix_pins>; 528 interrupts-extended = <&pio 146 IRQ_TYPE_LEVEL_HIGH>; 529 irq-gpios = <&pio 146 GPIO_ACTIVE_HIGH>; 530 reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; 531 }; 532}; 533 534&mfg0 { 535 domain-supply = <&mt6359_vproc2_buck_reg>; 536}; 537 538&mfg1 { 539 domain-supply = <&mt6359_vsram_others_ldo_reg>; 540}; 541 542&mmc0 { 543 bus-width = <8>; 544 cap-mmc-highspeed; 545 cap-mmc-hw-reset; 546 hs400-ds-delay = <0x1481b>; 547 max-frequency = <200000000>; 548 mmc-hs200-1_8v; 549 mmc-hs400-1_8v; 550 non-removable; 551 no-sd; 552 no-sdio; 553 supports-cqe; 554 pinctrl-names = "default", "state_uhs"; 555 pinctrl-0 = <&mmc0_default_pins>; 556 pinctrl-1 = <&mmc0_uhs_pins>; 557 vmmc-supply = <&mt6359_vemc_1_ldo_reg>; 558 vqmmc-supply = <&mt6359_vufs_ldo_reg>; 559 status = "okay"; 560}; 561 562&mmc1 { 563 bus-width = <4>; 564 cap-sd-highspeed; 565 max-frequency = <200000000>; 566 sd-uhs-sdr104; 567 sd-uhs-sdr50; 568 pinctrl-names = "default", "state_uhs"; 569 pinctrl-0 = <&mmc1_default_pins>; 570 pinctrl-1 = <&mmc1_uhs_pins>; 571 cd-gpios = <&pio 2 GPIO_ACTIVE_LOW>; 572 vqmmc-supply = <&mt6359_vsim1_ldo_reg>; 573 vmmc-supply = <&sdcard_en_3v3>; 574 status = "okay"; 575}; 576 577&mmc2 { 578 bus-width = <4>; 579 cap-sd-highspeed; 580 cap-sdio-irq; 581 keep-power-in-suspend; 582 max-frequency = <200000000>; 583 no-mmc; 584 non-removable; 585 no-sd; 586 sd-uhs-sdr104; 587 wakeup-source; 588 pinctrl-names = "default", "state_uhs", "state_eint"; 589 pinctrl-0 = <&mmc2_default_pins>; 590 pinctrl-1 = <&mmc2_uhs_pins>; 591 pinctrl-2 = <&mmc2_eint_pins>; 592 interrupt-names = "msdc", "sdio_wakeup"; 593 interrupts-extended = <&gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH 0>, 594 <&pio 172 IRQ_TYPE_LEVEL_LOW>; 595 vmmc-supply = <&mt6359_vcn33_2_bt_ldo_reg>; 596 vqmmc-supply = <&mt6359_vcn18_ldo_reg>; 597 mmc-pwrseq = <&wifi_pwrseq>; 598 status = "okay"; 599}; 600 601&mipi_tx_config0 { 602 status = "okay"; 603}; 604 605&mt6359codec { 606 mediatek,mic-type-0 = <1>; 607 mediatek,mic-type-1 = <3>; 608}; 609 610&mt6359_vbbck_ldo_reg { 611 regulator-always-on; 612}; 613 614&mt6359_vcn18_ldo_reg { 615 regulator-name = "vcn18_pmu"; 616 regulator-always-on; 617 regulator-boot-on; 618}; 619 620&mt6359_vcn33_1_bt_ldo_reg { 621 regulator-name = "vcn33_1_pmu"; 622 regulator-always-on; 623}; 624 625&mt6359_vcn33_2_bt_ldo_reg { 626 regulator-name = "vcn33_2_pmu"; 627 regulator-min-microvolt = <3300000>; 628 regulator-max-microvolt = <3300000>; 629 regulator-always-on; 630 regulator-boot-on; 631}; 632 633&mt6359_vcore_buck_reg { 634 regulator-name = "dvdd_proc_l"; 635 regulator-always-on; 636}; 637 638&mt6359_vemc_1_ldo_reg { 639 regulator-always-on; 640}; 641 642&mt6359_vgpu11_buck_reg { 643 regulator-name = "dvdd_core"; 644 regulator-always-on; 645}; 646 647&mt6359_vmodem_buck_reg { 648 regulator-always-on; 649}; 650 651&mt6359_vpa_buck_reg { 652 regulator-name = "vpa_pmu"; 653 regulator-always-on; 654}; 655 656&mt6359_vproc2_buck_reg { 657 /* The name "vgpu" is required by mtk-regulator-coupler */ 658 regulator-name = "vgpu"; 659 regulator-min-microvolt = <550000>; 660 regulator-max-microvolt = <800000>; 661 regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>; 662 regulator-coupled-max-spread = <225000>; 663}; 664 665&mt6359_vs2_buck_reg { 666 regulator-min-microvolt = <1600000>; 667 regulator-boot-on; 668}; 669 670&mt6359_vpu_buck_reg { 671 regulator-name = "dvdd_adsp"; 672 regulator-always-on; 673}; 674 675&mt6359_vrf12_ldo_reg { 676 regulator-name = "va12_abb2_pmu"; 677 regulator-always-on; 678}; 679 680&mt6359_vsram_md_ldo_reg { 681 regulator-always-on; 682}; 683 684&mt6359_vsram_others_ldo_reg { 685 /* The name "vsram_gpu" is required by mtk-regulator-coupler */ 686 regulator-name = "vsram_gpu"; 687 regulator-min-microvolt = <750000>; 688 regulator-max-microvolt = <800000>; 689 regulator-coupled-with = <&mt6359_vproc2_buck_reg>; 690 regulator-coupled-max-spread = <225000>; 691}; 692 693&mt6359_vsim1_ldo_reg { 694 regulator-name = "vsim1_pmu"; 695 regulator-max-microvolt = <1800000>; 696 regulator-enable-ramp-delay = <480>; 697}; 698 699&mt6359_vufs_ldo_reg { 700 regulator-name = "vufs18_pmu"; 701 regulator-always-on; 702}; 703 704&ovl0_in { 705 remote-endpoint = <&vdosys0_ep_main>; 706}; 707 708&pcie { 709 pinctrl-names = "default"; 710 pinctrl-0 = <&pcie_default_pins>; 711 status = "okay"; 712}; 713 714&pciephy { 715 status = "okay"; 716}; 717 718&pmic { 719 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; 720 721 keys { 722 compatible = "mediatek,mt6359-keys"; 723 mediatek,long-press-mode = <1>; 724 power-off-time-sec = <0>; 725 726 power-key { 727 linux,keycodes = <KEY_POWER>; 728 wakeup-source; 729 }; 730 }; 731}; 732 733&postmask0_in { 734 remote-endpoint = <&gamma0_out>; 735}; 736 737&postmask0_out { 738 remote-endpoint = <&dither0_in>; 739}; 740 741&scp_cluster { 742 status = "okay"; 743}; 744 745&scp_c0 { 746 memory-region = <&scp_mem>; 747 status = "okay"; 748}; 749 750&spi0 { 751 pinctrl-0 = <&spi0_pins>; 752 pinctrl-names = "default"; 753 mediatek,pad-select = <0>; 754 status = "okay"; 755}; 756 757&spi1 { 758 pinctrl-0 = <&spi1_pins>; 759 pinctrl-names = "default"; 760 mediatek,pad-select = <0>; 761 status = "okay"; 762}; 763 764&spmi { 765 #address-cells = <2>; 766 #size-cells = <0>; 767 768 mt6315_6: pmic@6 { 769 compatible = "mediatek,mt6315-regulator"; 770 reg = <0x6 SPMI_USID>; 771 772 regulators { 773 mt6315_6_vbuck1: vbuck1 { 774 regulator-name = "vbuck1"; 775 regulator-min-microvolt = <300000>; 776 regulator-max-microvolt = <1193750>; 777 regulator-enable-ramp-delay = <256>; 778 regulator-allowed-modes = <0 1 2>; 779 regulator-always-on; 780 }; 781 782 mt6315_6_vbuck3: vbuck3 { 783 regulator-name = "vbuck3"; 784 regulator-min-microvolt = <300000>; 785 regulator-max-microvolt = <1193750>; 786 regulator-enable-ramp-delay = <256>; 787 regulator-allowed-modes = <0 1 2>; 788 regulator-always-on; 789 }; 790 791 mt6315_6_vbuck4: vbuck4 { 792 regulator-name = "vbuck4"; 793 regulator-min-microvolt = <1193750>; 794 regulator-max-microvolt = <1193750>; 795 regulator-enable-ramp-delay = <256>; 796 regulator-allowed-modes = <0 1 2>; 797 regulator-always-on; 798 799 regulator-state-mem { 800 regulator-on-in-suspend; 801 regulator-suspend-microvolt = <1193750>; 802 }; 803 }; 804 }; 805 }; 806}; 807 808&uart0 { 809 pinctrl-0 = <&uart0_pins>; 810 pinctrl-names = "default"; 811 status = "okay"; 812}; 813 814&uart1 { 815 pinctrl-0 = <&uart1_pins>; 816 pinctrl-names = "default"; 817 status = "okay"; 818}; 819 820&uart2 { 821 pinctrl-0 = <&uart2_pins>; 822 pinctrl-names = "default"; 823 status = "okay"; 824}; 825 826&ssusb0 { 827 dr_mode = "otg"; 828 maximum-speed = "high-speed"; 829 usb-role-switch; 830 wakeup-source; 831 vusb33-supply = <&mt6359_vusb_ldo_reg>; 832 pinctrl-0 = <&usbotg_pins>; 833 pinctrl-names = "default"; 834 status = "okay"; 835 836 connector { 837 compatible = "usb-c-connector"; 838 label = "USB-C"; 839 data-role = "dual"; 840 841 ports { 842 #address-cells = <1>; 843 #size-cells = <0>; 844 845 port@0 { 846 reg = <0>; 847 hs_ep: endpoint { 848 remote-endpoint = <&usb_hs_ep>; 849 }; 850 }; 851 852 port@1 { 853 reg = <1>; 854 ss_ep: endpoint { 855 remote-endpoint = <&hd3ss3220_in_ep>; 856 }; 857 }; 858 }; 859 }; 860 861 ports { 862 #address-cells = <1>; 863 #size-cells = <0>; 864 865 port@0 { 866 reg = <0>; 867 usb_hs_ep: endpoint { 868 remote-endpoint = <&hs_ep>; 869 }; 870 }; 871 872 port@1 { 873 reg = <1>; 874 usb_role_switch: endpoint { 875 remote-endpoint = <&hd3ss3220_out_ep>; 876 }; 877 }; 878 }; 879}; 880 881&u2port0 { 882 status = "okay"; 883}; 884 885&u3phy0 { 886 status = "okay"; 887}; 888 889&xhci0 { 890 vbus-supply = <&usb_p0_vbus>; 891 vusb33-supply = <&mt6359_vusb_ldo_reg>; 892 status = "okay"; 893}; 894 895&ssusb1 { 896 dr_mode = "host"; 897 wakeup-source; 898 vusb33-supply = <&mt6359_vusb_ldo_reg>; 899 pinctrl-0 = <&usb1_pins>; 900 pinctrl-names = "default"; 901 status = "okay"; 902}; 903 904&u2port1 { 905 status = "okay"; 906}; 907 908&u3port1 { 909 status = "okay"; 910}; 911 912&u3phy1 { 913 status = "okay"; 914}; 915 916&xhci1 { 917 vbus-supply = <&usb_p1_vbus>; 918 vusb33-supply = <&mt6359_vusb_ldo_reg>; 919 status = "okay"; 920}; 921 922&ssusb2 { 923 dr_mode = "host"; 924 maximum-speed = "high-speed"; 925 wakeup-source; 926 vusb33-supply = <&mt6359_vusb_ldo_reg>; 927 status = "okay"; 928}; 929 930&u2port2 { 931 status = "okay"; 932}; 933 934&u3phy2 { 935 status = "okay"; 936}; 937 938&xhci2 { 939 vbus-supply = <&usb_p2_vbus>; 940 vusb33-supply = <&mt6359_vusb_ldo_reg>; 941 #address-cells = <1>; 942 #size-cells = <0>; 943 status = "okay"; 944 945 ethernet@1 { 946 compatible = "usb424,7850"; 947 reg = <1>; 948 #address-cells = <1>; 949 #size-cells = <0>; 950 951 mdio { 952 #address-cells = <1>; 953 #size-cells = <0>; 954 955 ethernet-phy@1 { 956 reg = <1>; 957 microchip,led-modes = < 958 LAN78XX_LINK_1000_ACTIVITY 959 LAN78XX_LINK_10_ACTIVITY 960 LAN78XX_LINK_10_100_ACTIVITY 961 LAN78XX_LINK_ACTIVITY 962 >; 963 }; 964 }; 965 }; 966}; 967 968&vdosys0 { 969 port { 970 #address-cells = <1>; 971 #size-cells = <0>; 972 973 vdosys0_ep_main: endpoint@0 { 974 reg = <0>; 975 remote-endpoint = <&ovl0_in>; 976 }; 977 }; 978}; 979 980&watchdog { 981 pinctrl-names = "default"; 982 pinctrl-0 = <&watchdog_pins>; 983}; 984 985&pio { 986 audio_pins: audio-pins { 987 pins-aud-pmic { 988 pinmux = <PINMUX_GPIO101__FUNC_O_AUD_CLK_MOSI 989 PINMUX_GPIO102__FUNC_O_AUD_SYNC_MOSI 990 PINMUX_GPIO103__FUNC_O_AUD_DAT_MOSI0 991 PINMUX_GPIO104__FUNC_O_AUD_DAT_MOSI1 992 PINMUX_GPIO105__FUNC_I0_AUD_DAT_MISO0 993 PINMUX_GPIO106__FUNC_I0_AUD_DAT_MISO1>; 994 }; 995 996 pins-pcm-wifi { 997 pinmux = <PINMUX_GPIO121__FUNC_B0_PCM_CLK 998 PINMUX_GPIO122__FUNC_B0_PCM_SYNC 999 PINMUX_GPIO123__FUNC_O_PCM_DO 1000 PINMUX_GPIO124__FUNC_I0_PCM_DI>; 1001 }; 1002 1003 pins-i2s { 1004 pinmux = <PINMUX_GPIO119__FUNC_O_I2SO1_MCK 1005 PINMUX_GPIO112__FUNC_O_I2SO1_WS 1006 PINMUX_GPIO120__FUNC_O_I2SO1_BCK 1007 PINMUX_GPIO113__FUNC_O_I2SO1_D0 1008 PINMUX_GPIO110__FUNC_I0_I2SIN_D0>; 1009 }; 1010 }; 1011 1012 disp_pwm0_pins: disp-pwm0-pins { 1013 pins { 1014 pinmux = <PINMUX_GPIO29__FUNC_O_DISP_PWM0>; 1015 bias-pull-down; 1016 }; 1017 }; 1018 1019 dsi0_sn65dsi84_pins: dsi0-sn65dsi84-pins { 1020 pins-irq { 1021 pinmux = <PINMUX_GPIO128__FUNC_B_GPIO128>; 1022 bias-pull-down; 1023 input-enable; 1024 }; 1025 1026 pins-enable { 1027 pinmux = <PINMUX_GPIO25__FUNC_B_GPIO25>; 1028 bias-pull-down; 1029 }; 1030 }; 1031 1032 eth_default_pins: eth-default-pins { 1033 pins-txd { 1034 pinmux = <PINMUX_GPIO131__FUNC_O_GBE_TXD3>, 1035 <PINMUX_GPIO132__FUNC_O_GBE_TXD2>, 1036 <PINMUX_GPIO133__FUNC_O_GBE_TXD1>, 1037 <PINMUX_GPIO134__FUNC_O_GBE_TXD0>; 1038 drive-strength = <8>; 1039 }; 1040 pins-cc { 1041 pinmux = <PINMUX_GPIO139__FUNC_B0_GBE_TXC>, 1042 <PINMUX_GPIO142__FUNC_O_GBE_TXEN>, 1043 <PINMUX_GPIO141__FUNC_I0_GBE_RXDV>; 1044 drive-strength = <8>; 1045 }; 1046 pins-rxd { 1047 pinmux = <PINMUX_GPIO135__FUNC_I0_GBE_RXD3>, 1048 <PINMUX_GPIO136__FUNC_I0_GBE_RXD2>, 1049 <PINMUX_GPIO137__FUNC_I0_GBE_RXD1>, 1050 <PINMUX_GPIO138__FUNC_I0_GBE_RXD0>, 1051 <PINMUX_GPIO140__FUNC_I0_GBE_RXC>; 1052 drive-strength = <8>; 1053 bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 1054 }; 1055 pins-mdio { 1056 pinmux = <PINMUX_GPIO143__FUNC_O_GBE_MDC>, 1057 <PINMUX_GPIO144__FUNC_B1_GBE_MDIO>; 1058 drive-strength = <8>; 1059 input-enable; 1060 }; 1061 pins-power { 1062 pinmux = <PINMUX_GPIO27__FUNC_B_GPIO27>; /* GP_EQOS_RESET */ 1063 output-high; 1064 }; 1065 pins-intr { 1066 pinmux = <PINMUX_GPIO148__FUNC_B_GPIO148>; /* GPIRQ_EQOS_PHY */ 1067 bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 1068 input-enable; 1069 }; 1070 }; 1071 1072 eth_sleep_pins: eth-sleep-pins { 1073 pins-txd { 1074 pinmux = <PINMUX_GPIO131__FUNC_B_GPIO131>, 1075 <PINMUX_GPIO132__FUNC_B_GPIO132>, 1076 <PINMUX_GPIO133__FUNC_B_GPIO133>, 1077 <PINMUX_GPIO134__FUNC_B_GPIO134>; 1078 }; 1079 pins-cc { 1080 pinmux = <PINMUX_GPIO139__FUNC_B_GPIO139>, 1081 <PINMUX_GPIO142__FUNC_B_GPIO142>, 1082 <PINMUX_GPIO141__FUNC_B_GPIO141>, 1083 <PINMUX_GPIO140__FUNC_B_GPIO140>; 1084 }; 1085 pins-rxd { 1086 pinmux = <PINMUX_GPIO135__FUNC_B_GPIO135>, 1087 <PINMUX_GPIO136__FUNC_B_GPIO136>, 1088 <PINMUX_GPIO137__FUNC_B_GPIO137>, 1089 <PINMUX_GPIO138__FUNC_B_GPIO138>; 1090 }; 1091 pins-mdio { 1092 pinmux = <PINMUX_GPIO143__FUNC_B_GPIO143>, 1093 <PINMUX_GPIO144__FUNC_B_GPIO144>; 1094 input-disable; 1095 bias-disable; 1096 }; 1097 }; 1098 1099 gpio_keys_pins: gpio-keys-pins { 1100 pins-keys { 1101 pinmux = <PINMUX_GPIO129__FUNC_B_GPIO129>, 1102 <PINMUX_GPIO65__FUNC_B_GPIO65>, 1103 <PINMUX_GPIO66__FUNC_B_GPIO66>; 1104 bias-pull-up; 1105 }; 1106 }; 1107 1108 hd3ss3220_pins: hd3ss3320-pins { 1109 pins-irq { 1110 pinmux = <PINMUX_GPIO45__FUNC_B_GPIO45>; 1111 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1112 input-enable; 1113 }; 1114 }; 1115 1116 hdmi_vreg_pins: hdmi-vreg-pins { 1117 pins-pwr { 1118 pinmux = <PINMUX_GPIO50__FUNC_O_HDMITX20_PWR5V>; 1119 bias-disable; 1120 }; 1121 }; 1122 1123 hdmi_pins: hdmi-pins { 1124 pins-hotplug { 1125 pinmux = <PINMUX_GPIO51__FUNC_I0_HDMITX20_HTPLG>; 1126 bias-pull-down; 1127 }; 1128 1129 pins-cec { 1130 pinmux = <PINMUX_GPIO52__FUNC_B1_HDMITX20_CEC>; 1131 bias-disable; 1132 }; 1133 1134 pins-ddc { 1135 pinmux = <PINMUX_GPIO53__FUNC_B1_HDMITX20_SCL>, 1136 <PINMUX_GPIO54__FUNC_B1_HDMITX20_SDA>; 1137 drive-strength = <10>; 1138 }; 1139 }; 1140 1141 i2c0_pins: i2c0-pins { 1142 pins-bus { 1143 pinmux = <PINMUX_GPIO56__FUNC_B1_SDA0>, 1144 <PINMUX_GPIO55__FUNC_B1_SCL0>; 1145 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 1146 drive-strength-microamp = <1000>; 1147 }; 1148 }; 1149 1150 i2c0_mux_pins: i2c0-mux-pins { 1151 pins-reset { 1152 pinmux = <PINMUX_GPIO6__FUNC_B_GPIO6>; 1153 bias-pull-up; 1154 }; 1155 }; 1156 1157 i2c1_pins: i2c1-pins { 1158 pins-bus { 1159 pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>, 1160 <PINMUX_GPIO57__FUNC_B1_SCL1>; 1161 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 1162 drive-strength-microamp = <1000>; 1163 }; 1164 }; 1165 1166 i2c2_pins: i2c2-pins { 1167 pins-bus { 1168 pinmux = <PINMUX_GPIO60__FUNC_B1_SDA2>, 1169 <PINMUX_GPIO59__FUNC_B1_SCL2>; 1170 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 1171 drive-strength-microamp = <1000>; 1172 }; 1173 }; 1174 1175 i2c3_pins: i2c3-pins { 1176 pins-bus { 1177 pinmux = <PINMUX_GPIO62__FUNC_B1_SDA3>, 1178 <PINMUX_GPIO61__FUNC_B1_SCL3>; 1179 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 1180 drive-strength-microamp = <1000>; 1181 }; 1182 }; 1183 1184 i2c4_pins: i2c4-pins { 1185 pins-bus { 1186 pinmux = <PINMUX_GPIO64__FUNC_B1_SDA4>, 1187 <PINMUX_GPIO63__FUNC_B1_SCL4>; 1188 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 1189 drive-strength-microamp = <1000>; 1190 }; 1191 }; 1192 1193 i2c_mux_smarc_lcd_pins: i2c-mux-smarc-lcd-pins { 1194 pins-reset { 1195 pinmux = <PINMUX_GPIO5__FUNC_B_GPIO5>; 1196 bias-pull-down; 1197 }; 1198 }; 1199 1200 mmc0_default_pins: mmc0-default-pins { 1201 pins-cmd-dat { 1202 pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>, 1203 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>, 1204 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>, 1205 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>, 1206 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>, 1207 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>, 1208 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>, 1209 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>, 1210 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>; 1211 input-enable; 1212 drive-strength = <6>; 1213 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1214 }; 1215 1216 pins-clk { 1217 pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>; 1218 drive-strength = <6>; 1219 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1220 }; 1221 1222 pins-rst { 1223 pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>; 1224 drive-strength = <6>; 1225 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1226 }; 1227 }; 1228 1229 mmc0_uhs_pins: mmc0-uhs-pins { 1230 pins-cmd-dat { 1231 pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>, 1232 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>, 1233 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>, 1234 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>, 1235 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>, 1236 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>, 1237 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>, 1238 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>, 1239 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>; 1240 input-enable; 1241 drive-strength = <8>; 1242 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1243 }; 1244 1245 pins-clk { 1246 pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>; 1247 drive-strength = <8>; 1248 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1249 }; 1250 1251 pins-ds { 1252 pinmux = <PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>; 1253 drive-strength = <8>; 1254 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1255 }; 1256 1257 pins-rst { 1258 pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>; 1259 drive-strength = <8>; 1260 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1261 }; 1262 }; 1263 1264 mmc1_default_pins: mmc1-default-pins { 1265 pins-cmd-dat { 1266 pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>, 1267 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>, 1268 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>, 1269 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>, 1270 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>; 1271 input-enable; 1272 drive-strength = <6>; 1273 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1274 }; 1275 1276 pins-pwr { 1277 pinmux = <PINMUX_GPIO111__FUNC_B_GPIO111>; 1278 bias-pull-down; 1279 }; 1280 1281 pins-pullup { 1282 pinmux = <PINMUX_GPIO11__FUNC_B_GPIO11>; 1283 bias-pull-up; 1284 }; 1285 1286 pins-clk { 1287 pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>; 1288 drive-strength = <6>; 1289 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1290 }; 1291 1292 pins-insert { 1293 pinmux = <PINMUX_GPIO2__FUNC_B_GPIO2>; 1294 bias-pull-up; 1295 }; 1296 }; 1297 1298 mmc1_uhs_pins: mmc1-uhs-pins { 1299 pins-cmd-dat { 1300 pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>, 1301 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>, 1302 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>, 1303 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>, 1304 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>; 1305 input-enable; 1306 drive-strength = <6>; 1307 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1308 }; 1309 1310 pins-clk { 1311 pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>; 1312 drive-strength = <6>; 1313 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1314 }; 1315 }; 1316 1317 mmc2_default_pins: mmc2-default-pins { 1318 pins-clk { 1319 pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>; 1320 drive-strength = <4>; 1321 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1322 }; 1323 1324 pins-cmd-dat { 1325 pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>, 1326 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>, 1327 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>, 1328 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>, 1329 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>; 1330 input-enable; 1331 drive-strength = <6>; 1332 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1333 }; 1334 }; 1335 1336 mmc2_uhs_pins: mmc2-uhs-pins { 1337 pins-clk { 1338 pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>; 1339 drive-strength = <4>; 1340 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 1341 }; 1342 1343 pins-cmd-dat { 1344 pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>, 1345 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>, 1346 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>, 1347 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>, 1348 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>; 1349 input-enable; 1350 drive-strength = <6>; 1351 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1352 }; 1353 }; 1354 1355 mmc2_eint_pins: mmc2-eint-pins { 1356 pins-dat1 { 1357 pinmux = <PINMUX_GPIO172__FUNC_B_GPIO172>; 1358 input-enable; 1359 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1360 }; 1361 }; 1362 1363 rv3028_pins: rv3028-pins { 1364 pins-irq { 1365 pinmux = <PINMUX_GPIO42__FUNC_B_GPIO42>; 1366 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1367 input-enable; 1368 }; 1369 }; 1370 1371 spi0_pins: spi0-pins { 1372 pins-spi { 1373 pinmux = <PINMUX_GPIO69__FUNC_O_SPIM0_CSB>, 1374 <PINMUX_GPIO70__FUNC_O_SPIM0_CLK>, 1375 <PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI>, 1376 <PINMUX_GPIO72__FUNC_B0_SPIM0_MISO>; 1377 bias-disable; 1378 }; 1379 }; 1380 1381 spi1_pins: spi1-pins { 1382 pins-spi { 1383 pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>, 1384 <PINMUX_GPIO76__FUNC_O_SPIM1_CLK>, 1385 <PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>, 1386 <PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>; 1387 bias-disable; 1388 }; 1389 }; 1390 1391 pcie_default_pins: pcie-default-pins { 1392 pins { 1393 pinmux = <PINMUX_GPIO47__FUNC_I1_WAKEN>, 1394 <PINMUX_GPIO48__FUNC_O_PERSTN>, 1395 <PINMUX_GPIO49__FUNC_B1_CLKREQN>; 1396 bias-pull-up; 1397 }; 1398 }; 1399 1400 ts_dsi0_goodix_pins: ts-dsi0-goodix-pins { 1401 pins-irq { 1402 pinmux = <PINMUX_GPIO146__FUNC_B_GPIO146>; 1403 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 1404 input-enable; 1405 }; 1406 1407 pins-reset { 1408 pinmux = <PINMUX_GPIO7__FUNC_B_GPIO7>; 1409 bias-pull-down; 1410 }; 1411 }; 1412 1413 uart0_pins: uart0-pins { 1414 pins { 1415 pinmux = <PINMUX_GPIO31__FUNC_O_UTXD0>, 1416 <PINMUX_GPIO32__FUNC_I1_URXD0>; 1417 bias-pull-up; 1418 }; 1419 }; 1420 1421 uart1_pins: uart1-pins { 1422 pins { 1423 pinmux = <PINMUX_GPIO33__FUNC_O_UTXD1>, 1424 <PINMUX_GPIO34__FUNC_I1_URXD1>; 1425 bias-pull-up; 1426 }; 1427 }; 1428 1429 uart2_pins: uart2-pins { 1430 pins { 1431 pinmux = <PINMUX_GPIO35__FUNC_O_UTXD2>, 1432 <PINMUX_GPIO36__FUNC_I1_URXD2>; 1433 bias-pull-up; 1434 }; 1435 }; 1436 1437 usbotg_pins: usbotg-pins { 1438 pins-iddig { 1439 pinmux = <PINMUX_GPIO83__FUNC_B_GPIO83>; 1440 input-enable; 1441 bias-pull-up; 1442 }; 1443 1444 pins-valid { 1445 pinmux = <PINMUX_GPIO85__FUNC_I0_VBUSVALID>; 1446 input-enable; 1447 }; 1448 1449 pins-vbus { 1450 pinmux = <PINMUX_GPIO84__FUNC_O_USB_DRVVBUS>; 1451 output-high; 1452 }; 1453 }; 1454 1455 usb1_hub_pins: usb1-hub-pins { 1456 pins { 1457 pinmux = <PINMUX_GPIO147__FUNC_B_GPIO147>; 1458 output-low; 1459 }; 1460 }; 1461 1462 usb1_pins: usb1-pins { 1463 pins { 1464 pinmux = <PINMUX_GPIO88__FUNC_I0_VBUSVALID_1P>; 1465 input-enable; 1466 }; 1467 }; 1468 1469 usb2_eth_pins: usb2-eth-pins { 1470 pins { 1471 pinmux = <PINMUX_GPIO80__FUNC_B_GPIO80>; 1472 output-low; 1473 }; 1474 }; 1475 1476 wifi_pwrseq_pins: wifi-pwrseq-pins { 1477 pins { 1478 pinmux = <PINMUX_GPIO89__FUNC_B_GPIO89>; 1479 output-low; 1480 }; 1481 }; 1482 1483 watchdog_pins: watchdog-pins { 1484 pins { 1485 pinmux = <PINMUX_GPIO100__FUNC_O_WATCHDOG>; 1486 bias-pull-up; 1487 }; 1488 }; 1489}; 1490